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Change subject: soc/intel/alderlake: Add crashlog trigger on all reset toggle
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59951/comment/c22cfe32_35d368c5
PS1, Line 9: This feature should
: not be enabled by default.
> Why? What problem does it cause?
If this feature is enabled, each PMC reset would trigger crashlog.
Like global reset/cold reset/warm reset.
When we analyze the crashlog, we would find out the reason is "Trigger_on_all_resets". And we would see "Hardware error" in the kernel log.
It would cause too many false alarm.
We would use this feature when we meet unknown reset. We could find out the reset reason through this feature.
That's why we won't enable this feature by default.
I'll update the commit completely.
https://review.coreboot.org/c/coreboot/+/59951/comment/97cd67cd_628cfd11
PS1, Line 13: apreset
> What is apreset?
ec command "apreset"
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Change subject: mb/var/gimble4es: Set PsysPmax to 143 W
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
(You do not need to score your own change-sets.)
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Change subject: mb/google/brya/var/gimble4es: Configure Acoustic noise mitigation
......................................................................
Patch Set 1:
(1 comment)
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https://review.coreboot.org/c/coreboot/+/59949/comment/45870471_aa4cf29b
PS1, Line 10: - Set slow slew rate VCCIA and VCCGT to 16
Why? Where is that documented?
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Change subject: mb/google/octopus: add audio codec into SSFC support for ApelE
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59856/comment/f5c7a354_1529c1c1
PS5, Line 9: Add ALC5682I-VS codec support.
: ALC5682I-VD/ALC5682I-VS load different hid name depending on SSFC.
: Define SSFC BIT9-11 for codec selection.
Please re-flow for 75 characters per line.
https://review.coreboot.org/c/coreboot/+/59856/comment/2dd323b6_f06ebc49
PS5, Line 15: TEST=Set CBI SSFC BIT9-11 to select codec,
: and test audio work
Fits it one like.
https://review.coreboot.org/c/coreboot/+/59856/comment/304636be_f9d063f8
PS5, Line 16: work
works
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Change subject: mb/google/octopus/var/ampton: add touchscreen into SSFC support
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Patch Set 8:
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https://review.coreboot.org/c/coreboot/+/59859/comment/37a5cbf5_4013365f
PS8, Line 14: work
works
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Change subject: [TESTME] sb/amd/pi/hudson/early_init: fix setting SPI_USE_SPI100 in SPI100_ENABLE
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Michał could you please run a test on apu2 with and without this patch? You would have to call hudson_set_spi100 somewhere in romstage though before testing anything.
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Change subject: mb/google/octopus/var/ampton: add touchscreen into SSFC support
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Patch Set 8:
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https://review.coreboot.org/c/coreboot/+/59859/comment/4ef62981_398975bc
PS8, Line 9: ELAN9008(eKTH6913UAY)
Please add a space before the (.
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Change subject: drivers/intel/mipi_camera: Add ACPI entry to provide silicon type info
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Patch Set 4:
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https://review.coreboot.org/c/coreboot/+/59869/comment/7b22ed2c_a9540a91
PS4, Line 10: IPU driver
IPU kernel driver
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Change subject: drivers/intel/mipi_camera: Add ACPI entry to provide silicon type info
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/59869/comment/4610d3e7_a775da89
PS4, Line 335: Enables support for ES silicon ACPI entry for IPU.
What is ES silicon? Please elabobrate?
Also, why can’t this go into the devicetree?
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Change subject: soc/intel/alderlake: Add crashlog trigger on all reset toggle
......................................................................
Patch Set 1:
(1 comment)
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https://review.coreboot.org/c/coreboot/+/59951/comment/788544ab_5e5f369e
PS1, Line 13: apreset
What is apreset?
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