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Change subject: mb/google/octopus: add ALC5682I-VS to be supported in the SSFC
......................................................................
mb/google/octopus: add ALC5682I-VS to be supported in the SSFC
Add ALC5682I-VS codec support.
ALC5682I-VD/ALC5682I-VS load different hid name
depending on SSFC.
BUG=b:198722640
BRANCH=octopus
TEST=Set CBI SSFC BIT9-11 to select codec,
and test audio works
Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8
Signed-off-by: Paul Huang <paul2_huang(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/octopus/mainboard.c
M src/mainboard/google/octopus/variants/baseboard/include/baseboard/cbi_ssfc.h
M src/mainboard/google/octopus/variants/baseboard/nhlt.c
3 files changed, 17 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/59856/6
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Change subject: soc/intel/tigerlake: Hook up DPTF device to devicetree
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59953/comment/3865273a_085b58cd
PS1, Line 9: will add into
> is added to?
Done
https://review.coreboot.org/c/coreboot/+/59953/comment/6c53d099_66b6bcad
PS1, Line 9: It will cause DUT cannot boot into OS when PLD group increment is not correct.
> It causes the DUT to not boot into the OS, …
Done
https://review.coreboot.org/c/coreboot/+/59953/comment/7406dff6_7a043edd
PS1, Line 9: CB:59401
> As it’s merged already, please use commit message hash and summary to refernence this.
Done
https://review.coreboot.org/c/coreboot/+/59953/comment/b2cfee5e_76de0a5d
PS1, Line 10:
> Please describe the solution. Something like (no idea if correct): […]
Done
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Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
Patch Set 3: Code-Review+1
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
mb/google/brya/var/primus: Fix PLD group order
In ec/google/chromeec: Add PLD to EC conn in ACPI table(667471b8d807da5a5a9277db47e069ad3b1351c7), PLD is added to ACPI table. It causes the DUT to not boot into the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2 to solve this issue.
BUG=b:209568644
BRANCH=none
TEST=build coreboot and system boot into OS.
Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com>
Change-Id: If5ce6ca061d9d56ba0bbb1f157b2ba278d3fa9c3
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59953/3
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Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
Patch Set 2: Code-Review+1
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to look at the new patch set (#2).
Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
mb/google/brya/var/primus: Fix PLD group order
In 667471b8d807da5a5a9277db47e069ad3b1351c7, PLD is added to ACPI table. It causes the DUT to not boot into the OS. So fix the PLD group order to solve this issue.
BUG=b:209568644
BRANCH=none
TEST=build coreboot and system boot into OS.
Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com>
Change-Id: If5ce6ca061d9d56ba0bbb1f157b2ba278d3fa9c3
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59953/2
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Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59949 )
Change subject: mb/google/brya/var/gimble4es: Configure Acoustic noise mitigation
......................................................................
Patch Set 1: -Code-Review
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59949/comment/20897773_eae18044
PS1, Line 10: - Set slow slew rate VCCIA and VCCGT to 16
> Why? Where is that documented?
Hi Paul,
Same as this patch => https://review.coreboot.org/c/coreboot/+/59535
Please refer to this comment, thanks.
https://partnerissuetracker.corp.google.com/issues/206704930#comment5
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Change subject: mb/google/corsola: get SKU ID from EC (CBI)
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59944/comment/47e93435_7205354c
PS5, Line 9: Retrieve the SKU ID for Corsola via CBI interface.
> There is low and high channel?
SKU ID is retrieved from Chrome EC on corsola.
The aux adc voltage is a backup solution.
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Change subject: mb/google/brya/var/primus: Fix PLD group order
......................................................................
Patch Set 1:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59953/comment/f69ab6ad_effdcbb8
PS1, Line 9: will add into
is added to?
https://review.coreboot.org/c/coreboot/+/59953/comment/d42e73fe_37f831f6
PS1, Line 9: It will cause DUT cannot boot into OS when PLD group increment is not correct.
It causes the DUT to not boot into the OS, …
https://review.coreboot.org/c/coreboot/+/59953/comment/6b3bbe62_790ae161
PS1, Line 9: CB:59401
As it’s merged already, please use commit message hash and summary to refernence this.
https://review.coreboot.org/c/coreboot/+/59953/comment/8419e19e_df4d9400
PS1, Line 10:
Please describe the solution. Something like (no idea if correct):
> Fix that by changing the order from 3 to 2.
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