coreboot-gerrit December 2021

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Bao Zheng (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57747 to look at the new patch set (#35). Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... amdfwtool: Add ISH header support for A/B recovery layout The rom layout for A/B recovery with ISH: EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A 0x4A -> ISH B -> PSP L2 B -> BIOS L2 B Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/Makefile M util/amdfwtool/Makefile.inc M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 4 files changed, 61 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57747/35 -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 35 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Add support for AMD's BIOS A/B recovery feature
by Bao Zheng (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56773 to look at the new patch set (#43). Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature ...................................................................... amdfwtool: Add support for AMD's BIOS A/B recovery feature The rom layout for A/B recovery: EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A 0x4A -> PSP L2 B -> BIOS L2 B The coreboot doesn't implement the AMD's A/B recovery. This is only for the ROM layout. To save some flash space, the entire B section can be eliminated. To enable A/B recovery in PSP layout, add "--recovery-ab" to amdfwtool. TEST=Majolica(Cezanne) Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 204 insertions(+), 66 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/43 -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 43 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/octopus/var/ampton: add touchscreen into SSFC support
by Paul2 Huang (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul Menzel, Marco Chen. Paul2 Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59859 ) Change subject: mb/google/octopus/var/ampton: add touchscreen into SSFC support ...................................................................... Patch Set 9: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59859/comment/c4acbf72_a3a0a2bf PS8, Line 9: ELAN9008(eKTH6913UAY) > Please add a space before the (. Done https://review.coreboot.org/c/coreboot/+/59859/comment/be919058_b756743c PS8, Line 14: work > works Done File src/mainboard/google/octopus/variants/baseboard/include/baseboard/cbi_ssfc.h: https://review.coreboot.org/c/coreboot/+/59859/comment/9ab5545f_307e89cd PS7, Line 44: SSFC_TOUCHSCREEN_ELAN9008, > * Could you have them with different i2c slave address by either FW or HW strap pin? […] (1) Checking with EE and vendor (2) Yes, if ELAN0001 and ELAN9008 both exist in overridetree.cb, then touchscreen no function, until we remove ELAN0001 from overridetree.cb. -- To view, visit https://review.coreboot.org/c/coreboot/+/59859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0919d40a6c39ffaed52bb9e24a3509eb353127c Gerrit-Change-Number: 59859 Gerrit-PatchSet: 9 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 14:22:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Comment-In-Reply-To: Marco Chen <marcochen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Update arm-trusted-firmware submodule to upstream master
by Yu-Ping Wu (Code Review) 07 Dec '21

07 Dec '21

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59955 ) Change subject: Update arm-trusted-firmware submodule to upstream master ...................................................................... Update arm-trusted-firmware submodule to upstream master Updating from commit id 586aafa3a: 2021-07-19 05:36:18 +0200 - (Merge "errata: workaround for Neoverse V1 errata 1791573" into integration) to commit id 73193689c: 2021-12-06 16:47:33 +0100 - (Merge changes I7c9f8490,Ia92c6d19 into integration) This brings in 684 new commits. Change-Id: I4173f3cb646839ad12c4e43e8c50b0be53364f04 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M 3rdparty/arm-trusted-firmware 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/59955/1 diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware index 586aafa..7319368 160000 --- a/3rdparty/arm-trusted-firmware +++ b/3rdparty/arm-trusted-firmware @@ -1 +1 @@ -Subproject commit 586aafa3a4b13971339f78e430075592c3fe74b5 +Subproject commit 73193689c0e9cf13ad0ddbb9da25e9a66c4e14b3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59955 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4173f3cb646839ad12c4e43e8c50b0be53364f04 Gerrit-Change-Number: 59955 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP]: mb/google/brya: Disable autonomus GPIO PM
by Maulik V Vaghela (Code Review) 07 Dec '21

07 Dec '21

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59954 ) Change subject: [WIP]: mb/google/brya: Disable autonomus GPIO PM ...................................................................... [WIP]: mb/google/brya: Disable autonomus GPIO PM Change-Id: I6da66d8e62928d4cfff7ef2fc3a2e0ab5761bc78 Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela(a)intel.com> --- M src/mainboard/google/brya/variants/brya0/overridetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/59954/1 diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 3822a2c..c5ec598 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -35,6 +35,18 @@ end chip soc/intel/alderlake + # This disabled autonomous GPIO power management, otherwise + # old cr50 FW only supports short pulses; need to clarify + # the minimum PCH IRQ pulse width with Intel, b/180111628 + register "gpio_override_pm" = "1" + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + register "gpio_pm[COMM_4]" = "0" + register "gpio_pm[COMM_5]" = "0" + + register "SaGv" = "SaGv_Enabled" register "PsysPmax" = "145" -- To view, visit https://review.coreboot.org/c/coreboot/+/59954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6da66d8e62928d4cfff7ef2fc3a2e0ab5761bc78 Gerrit-Change-Number: 59954 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/octopus: add ALC5682I-VS to be supported in the SSFC
by Marco Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul Menzel, Paul2 Huang. Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59856 ) Change subject: mb/google/octopus: add ALC5682I-VS to be supported in the SSFC ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/octopus/mainboard.c: https://review.coreboot.org/c/coreboot/+/59856/comment/50768b02_996c7521 PS4, Line 218: cfg->hid = "RTL5682"; > After test with patchset #6, make another object for VS in the overridetree. […] Just a guess - the `register "name" = ""RT58""` is the same between VD and VS objects so maybe we don't allow the same name among objects? Please change the name to try and consult with SoC team. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/59856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8 Gerrit-Change-Number: 59856 Gerrit-PatchSet: 6 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 13:45:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Comment-In-Reply-To: Marco Chen <marcochen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus/var/ampton: add touchscreen into SSFC support
by Paul2 Huang (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul2 Huang. Hello build bot (Jenkins), Henry Sun, Marco Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59859 to look at the new patch set (#9). Change subject: mb/google/octopus/var/ampton: add touchscreen into SSFC support ...................................................................... mb/google/octopus/var/ampton: add touchscreen into SSFC support Add ELAN9008 (eKTH6913UAY) support. BUG=b:204441413 BRANCH=octopus TEST=Set CBI SSFC BIT15-17 to select touchscreen controller, and test touchscreen works Change-Id: Ie0919d40a6c39ffaed52bb9e24a3509eb353127c Signed-off-by: Paul Huang <paul2_huang(a)pegatron.corp-partner.google.com> --- M src/mainboard/google/octopus/variants/ampton/Makefile.inc M src/mainboard/google/octopus/variants/ampton/overridetree.cb A src/mainboard/google/octopus/variants/ampton/variant.c M src/mainboard/google/octopus/variants/baseboard/cbi_ssfc.c M src/mainboard/google/octopus/variants/baseboard/include/baseboard/cbi_ssfc.h 5 files changed, 98 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/59859/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/59859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0919d40a6c39ffaed52bb9e24a3509eb353127c Gerrit-Change-Number: 59859 Gerrit-PatchSet: 9 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Hook up SMBus device to devicetree
by Angel Pons (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Felix Singer, Sean Rhodes, Jeremy Soller, Nick Vaccaro, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59883 ) Change subject: soc/intel/tigerlake: Hook up SMBus device to devicetree ...................................................................... Patch Set 7: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59883/comment/490d20d9_c62607a7 PS7, Line 13: despite SmbusEnable is not set. `despite` (and `in spite of`) need to be followed by a noun, a gerund or `the fact that` + subordinate clause: despite SmbusEnable not being set. -- To view, visit https://review.coreboot.org/c/coreboot/+/59883 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0789af20beb147fc1a6a7d046cdcea15cb44ce4c Gerrit-Change-Number: 59883 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 07 Dec 2021 13:21:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus: add ALC5682I-VS to be supported in the SSFC
by Paul2 Huang (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Henry Sun, Paul Menzel, Marco Chen. Paul2 Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59856 ) Change subject: mb/google/octopus: add ALC5682I-VS to be supported in the SSFC ...................................................................... Patch Set 6: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59856/comment/b115806a_d5ce1bbe PS5, Line 7: add audio codec into SSFC support for ApelE > We already have audio codec in SSFC so maybe this CL just `add ALC5682I-VS to be supported in the SS […] Done https://review.coreboot.org/c/coreboot/+/59856/comment/4d2d3801_609efda8 PS5, Line 11: Define SSFC BIT9-11 for codec selection > This CL didn't define SSFC bits but just add new codec support into existed bits. Done https://review.coreboot.org/c/coreboot/+/59856/comment/f5a1c25b_c95f0f69 PS5, Line 9: Add ALC5682I-VS codec support. : ALC5682I-VD/ALC5682I-VS load different hid name depending on SSFC. : Define SSFC BIT9-11 for codec selection. > Please re-flow for 75 characters per line. Done https://review.coreboot.org/c/coreboot/+/59856/comment/2f630286_af9e219b PS5, Line 16: work > works Done https://review.coreboot.org/c/coreboot/+/59856/comment/c0a2e849_91b87430 PS5, Line 15: TEST=Set CBI SSFC BIT9-11 to select codec, : and test audio work > Fits it one like. Done File src/mainboard/google/octopus/mainboard.c: https://review.coreboot.org/c/coreboot/+/59856/comment/3871d2c5_ad0d81a7 PS4, Line 218: cfg->hid = "RTL5682"; > Originally we expect overridetree. […] After test with patchset #6, make another object for VS in the overridetree.cb, then the VD codec never shows. I add debug log like this: if ((audio_dev->chip_ops == &drivers_i2c_generic_ops) { printk(BIOS_INFO, "PAUL: codec = %d\n", codec); printk(BIOS_INFO, "PAUL: hid = %s\n", cfg->hid); if (SSFC_VD && hid == 10EC5682) { .... } if (SSFC_VS && hid == RTL5682) { .... } } 1. Add VS object in the overridetree.cb, coreboot log shows ``` SSFC not set in CBI PAUL: codec = 2 PAUL: hid = RTL5682 I2C Device has been disabled PCI:00.2: Could not disable the device FMAP: area GBB found @ 3c0000 (262144 bytes) ``` 2. Remove VS object in the overridetree.cb, coreboot log shows ``` SSFC not set in CBI PAUL: codec = 2 PAUL: hid = 10EC5682 enable RT5682 VD. PCI:00.2: Could not disable the device FMAP: area GBB found @ 3c0000 (262144 bytes) ``` File src/mainboard/google/octopus/mainboard.c: https://review.coreboot.org/c/coreboot/+/59856/comment/0ab3a69d_3a0aea17 PS5, Line 212: if ((audio_dev->chip_ops == &drivers_i2c_generic_ops) && > Could we category it with line 195 together since they all need to be drivers_i2c_generic_ops? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8 Gerrit-Change-Number: 59856 Gerrit-PatchSet: 6 Gerrit-Owner: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Comment-Date: Tue, 07 Dec 2021 13:12:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Marco Chen <marcochen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Drop unused SataEnable setting
by Angel Pons (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Felix Singer, Nick Vaccaro, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59884 ) Change subject: soc/intel/tigerlake: Drop unused SataEnable setting ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59884 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id645bfcade7ca1d495fb8df538113b3d10392a82 Gerrit-Change-Number: 59884 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 07 Dec 2021 13:11:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021