coreboot-gerrit December 2021

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Change in coreboot[master]: Denverton-NS boards: Factor out common PCI IRQ config
by Kyösti Mälkki (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michael Niewöhner, Michal Motyl, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60102 ) Change subject: Denverton-NS boards: Factor out common PCI IRQ config ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: While it is boilerplate and copy-paste, the correct AML depends of the enabled PCI devices and devicetree.cb. So the introduced teleplatforms board would need Kconfig to override using the one under soc/. -- To view, visit https://review.coreboot.org/c/coreboot/+/60102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7f15f4781fbef7bee1f0cd40692180ec49acd9f Gerrit-Change-Number: 60102 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:55:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Denverton-NS boards: Drop useless `thermal.asl`
by Kyösti Mälkki (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michael Niewöhner, Michal Motyl. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60103 ) Change subject: Denverton-NS boards: Drop useless `thermal.asl` ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11571885059e8d5f930f741172c74b25faa09a15 Gerrit-Change-Number: 60103 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:49:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: Swap TPM I2C with touchscreen I2C
by Shon Wang (Code Review) 14 Dec '21

14 Dec '21

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60106 ) Change subject: mb/google/brya/var/vell: Swap TPM I2C with touchscreen I2C ...................................................................... mb/google/brya/var/vell: Swap TPM I2C with touchscreen I2C According to the latest schematic, exchange I2C port for TPM/touchscreen. TPM: I2C3 -> I2C1 Touchscreen: I2C1 -> I2C3 BUG=b:210572663 TEST=FW_NAME=vell emerge-brya coreboot Change-Id: If72717a2c073f5b871c3109399f466a04a9d2484 Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/vell/gpio.c M src/mainboard/google/brya/variants/vell/overridetree.cb 3 files changed, 31 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/60106/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 41f3f71..832f9ec 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -89,7 +89,8 @@ default 0x1 if BOARD_GOOGLE_FELWINTER default 0x3 if BOARD_GOOGLE_ANAHERA default 0x3 if BOARD_GOOGLE_ANAHERA4ES - default 0x3 if BOARD_GOOGLE_VELL + default 0x1 if BOARD_GOOGLE_VELL + default 0x3 if BOARD_GOOGLE_VELL4ES config DRIVER_TPM_I2C_ADDR hex diff --git a/src/mainboard/google/brya/variants/vell/gpio.c b/src/mainboard/google/brya/variants/vell/gpio.c index 3c4f6e3..bdaa8bd 100644 --- a/src/mainboard/google/brya/variants/vell/gpio.c +++ b/src/mainboard/google/brya/variants/vell/gpio.c @@ -92,10 +92,10 @@ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 0, DEEP), - /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ - PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2), - /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */ - PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2), + /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */ + PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + /* H7 : IC1_SCL ==> PCH_I2C_TPM_SCL */ + PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), /* * D1 : ISH_GP1 ==> FP_RST_ODL * FP_RST_ODL comes out of reset as hi-z and does not have an external pull-down. diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 2b06ff5..dfc9da0 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -39,13 +39,27 @@ #+-------------------+---------------------------+ #| GSPI1 | Fingerprint MCU | #| I2C0 | Audio | - #| I2C1 | Touchscreen | - #| I2C2 | | - #| I2C3 | cr50 TPM. Early init is | + #| I2C1 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | + #| I2C2 | | + #| I2C3 | Touchscreen | #| I2C5 | Trackpad | #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[1] = { + .early_init = 1, + .speed = I2C_SPEED_FAST, + .rise_time_ns = 600, + .fall_time_ns = 400, + .data_hold_time_ns = 50, + }, + .i2c[3] = { + .rise_time_ns = 650, + .fall_time_ns = 400, + .data_hold_time_ns = 50, + }, + }" register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port @@ -125,7 +139,7 @@ end end device ref pcie4_0 on - # Enable CPU PCIE RP 1 using CLK 3 + # Enable CPU PCIE RP 1 using CLK 0 register "cpu_pcie_rp[CPU_RP(1)]" = "{ .clk_req = 1, .clk_src = 1, @@ -184,6 +198,13 @@ end end #I2C0 device ref i2c1 on + chip drivers/i2c/tpm + register "hid" = ""GOOG0005"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" + device i2c 50 on end + end + end + device ref i2c3 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" register "desc" = ""ELAN Touchscreen"" -- To view, visit https://review.coreboot.org/c/coreboot/+/60106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If72717a2c073f5b871c3109399f466a04a9d2484 Gerrit-Change-Number: 60106 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Denverton-NS boards: Factor out common PCI IRQ config
by Felix Singer (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michael Niewöhner, Michal Motyl, Patrick Rudolph. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60102 ) Change subject: Denverton-NS boards: Factor out common PCI IRQ config ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/denverton_ns/acpi/pci_irqs.asl: https://review.coreboot.org/c/coreboot/+/60102/comment/fd500374_f9d82617 PS1, Line 3: /* This is board specific information: IRQ routing */ remove -- To view, visit https://review.coreboot.org/c/coreboot/+/60102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7f15f4781fbef7bee1f0cd40692180ec49acd9f Gerrit-Change-Number: 60102 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:39:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8
by Kyösti Mälkki (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Dmitry Ponamorev, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, King Sumo. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57194 ) Change subject: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8 ...................................................................... Patch Set 22: (10 comments) File src/mainboard/teleplatforms/D4E4S16P8/Kconfig: https://review.coreboot.org/c/coreboot/+/57194/comment/43c8f227_3217672a PS19, Line 31: default "1.0.12" > I meant there is a visible choice in menuconfig named LOCALVERSION. […] Done File src/mainboard/teleplatforms/D4E4S16P8/Kconfig: https://review.coreboot.org/c/coreboot/+/57194/comment/b96aa412_66b5e23c PS21, Line 17: string > Not needed since CB:56553 Done https://review.coreboot.org/c/coreboot/+/57194/comment/0ee6e3c7_3db32d83 PS21, Line 21: string > Not needed since CB:56554 Done https://review.coreboot.org/c/coreboot/+/57194/comment/d81a894e_dbfc1c99 PS21, Line 24: config MAINBOARD_VENDOR : string : default "teleplatforms" > Already set in `src/mainboard/teleplatforms/Kconfig` Done File src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard_pci_irqs.asl: https://review.coreboot.org/c/coreboot/+/57194/comment/dde3909e_e09c7579 PS21, Line 3: board specific > CB:60102 Well it's coupled with devicetree.cb, so both should change then? File src/mainboard/teleplatforms/D4E4S16P8/acpi/thermal.asl: PS21: > If there are no plans to add more stuff here, I'd drop the file. Done File src/mainboard/teleplatforms/D4E4S16P8/acpi_tables.c: https://review.coreboot.org/c/coreboot/+/57194/comment/fa546e84_a146466f PS21, Line 13: /* Disable USB ports in S5 */ : gnvs->s5u0 = 0; : gnvs->s5u1 = 0; > These values are only used with mainboard-specific SMI handlers and/or ACPI. […] Done https://review.coreboot.org/c/coreboot/+/57194/comment/26974e4a_a2a2d711 PS21, Line 17: /* TPM Present */ : gnvs->tpmp = 0; > Doesn't seem to be used anywhere in coreboot. Default is already zero, so I'd drop this. Done File src/mainboard/teleplatforms/D4E4S16P8/ramstage.c: https://review.coreboot.org/c/coreboot/+/57194/comment/0f0e0e0c_250f392c PS21, Line 26: 0x56 > EEPROM_ADDR Done File src/mainboard/teleplatforms/D4E4S16P8/romstage.c: https://review.coreboot.org/c/coreboot/+/57194/comment/3ed2ea05_cbf70450 PS20, Line 437: {SOUTH_GROUP0_CTBTRIGINOUT, > Would be interesting to use the coreboot GPIO configuration mechanism instead, which scaleway/tagada […] Followup, if it ever gets done like that. -- To view, visit https://review.coreboot.org/c/coreboot/+/57194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If654fc7a391643b50f2e52755fd7c11a37bfd188 Gerrit-Change-Number: 57194 Gerrit-PatchSet: 22 Gerrit-Owner: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: King Sumo <kingsumos(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: King Sumo <kingsumos(a)gmail.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:39:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dmitry Ponamorev <dponamorev(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8
by Kyösti Mälkki (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Dmitry Ponamorev, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph, King Sumo. Kyösti Mälkki has uploaded a new patch set (#22) to the change originally created by Dmitry Ponamorev. ( https://review.coreboot.org/c/coreboot/+/57194 ) Change subject: mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8 ...................................................................... mb/teleplatforms/D4E4S16P8: Add new CRB teleplatforms/D4E4S16P8 These sources are to compile the coreboot firmware image for the teleplatforms D4E4S16P8 motherboard. The board is based on an Intel Atom C3758 processor. Change-Id: If654fc7a391643b50f2e52755fd7c11a37bfd188 Signed-off-by: Dmitry Ponamorev <dponamorev(a)gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- A src/mainboard/teleplatforms/D4E4S16P8/Kconfig A src/mainboard/teleplatforms/D4E4S16P8/Kconfig.name A src/mainboard/teleplatforms/D4E4S16P8/Makefile.inc A src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard.asl A src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard_pci_irqs.asl A src/mainboard/teleplatforms/D4E4S16P8/acpi/platform.asl A src/mainboard/teleplatforms/D4E4S16P8/acpi_tables.c A src/mainboard/teleplatforms/D4E4S16P8/board_info.txt A src/mainboard/teleplatforms/D4E4S16P8/devicetree.cb A src/mainboard/teleplatforms/D4E4S16P8/dsdt.asl A src/mainboard/teleplatforms/D4E4S16P8/hsio.c A src/mainboard/teleplatforms/D4E4S16P8/ramstage.c A src/mainboard/teleplatforms/D4E4S16P8/romstage.c A src/mainboard/teleplatforms/Kconfig A src/mainboard/teleplatforms/Kconfig.name 15 files changed, 1,671 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/57194/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/57194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If654fc7a391643b50f2e52755fd7c11a37bfd188 Gerrit-Change-Number: 57194 Gerrit-PatchSet: 22 Gerrit-Owner: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: King Sumo <kingsumos(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dmitry Ponamorev <dponamorev(a)gmail.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: King Sumo <kingsumos(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [Test] TBT disable from coreboot
by Sonam Sanju (Code Review) 14 Dec '21

14 Dec '21

Sonam Sanju has removed Tim Wawrzynczak from this change. ( https://review.coreboot.org/c/coreboot/+/60105 ) Change subject: [Test] TBT disable from coreboot ...................................................................... Removed reviewer Tim Wawrzynczak. -- To view, visit https://review.coreboot.org/c/coreboot/+/60105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibed333c1448d4ebf3d864cea37c944392eb4909f Gerrit-Change-Number: 60105 Gerrit-PatchSet: 1 Gerrit-Owner: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: [Test] TBT disable from coreboot
by build bot (Jenkins) (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60105 ) Change subject: [Test] TBT disable from coreboot ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/redrix/overridetree.cb: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135509): https://review.coreboot.org/c/coreboot/+/60105/comment/1f728d72_b73fe2ed PS1, Line 450: device ref tcss_xhci off trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/60105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibed333c1448d4ebf3d864cea37c944392eb4909f Gerrit-Change-Number: 60105 Gerrit-PatchSet: 1 Gerrit-Owner: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:25:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [Test] TBT disable from coreboot
by Sonam Sanju (Code Review) 14 Dec '21

14 Dec '21

Sonam Sanju has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60105 ) Change subject: [Test] TBT disable from coreboot ...................................................................... [Test] TBT disable from coreboot Change-Id: Ibed333c1448d4ebf3d864cea37c944392eb4909f Signed-off-by: Sonam Sanju <sonam.sanju(a)intel.com> --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/redrix/overridetree.cb 2 files changed, 17 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/60105/1 diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index b330e98..03f7a0f 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -36,9 +36,9 @@ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN - register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" - register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC1)" - register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC2)" +# register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" +# register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC1)" +# register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC2)" register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -125,12 +125,12 @@ device domain 0 on device ref igpu on end device ref dtt on end - device ref tbt_pcie_rp0 on end - device ref tbt_pcie_rp1 on end - device ref tbt_pcie_rp2 on end - device ref tcss_xhci on end - device ref tcss_dma0 on end - device ref tcss_dma1 on end + device ref tbt_pcie_rp0 off end + device ref tbt_pcie_rp1 off end + device ref tbt_pcie_rp2 off end + device ref tcss_xhci off end + device ref tcss_dma0 off end + device ref tcss_dma1 off end device ref xhci on end device ref shared_sram on end device ref cnvi_wifi on diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 617ebc5..190ade5 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -159,18 +159,18 @@ device ref pcie_rp6 on probe DB_LTE LTE_PCIE end - device ref tcss_dma0 on + device ref tcss_dma0 off chip drivers/intel/usb4/retimer register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" use tcss_usb3_port1 as dfp[0].typec_port - device generic 0 on end + device generic 0 off end end end - device ref tcss_dma1 on + device ref tcss_dma1 off chip drivers/intel/usb4/retimer register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" use tcss_usb3_port3 as dfp[0].typec_port - device generic 0 on end + device generic 0 off end end end device ref pcie_rp8 on @@ -447,20 +447,20 @@ end end end - device ref tcss_xhci on + device ref tcss_xhci off chip drivers/usb/acpi - device ref tcss_root_hub on + device ref tcss_root_hub off chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)" - device ref tcss_usb3_port1 on end + device ref tcss_usb3_port1 off end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(3, 1)" - device ref tcss_usb3_port3 on end + device ref tcss_usb3_port3 off end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/60105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibed333c1448d4ebf3d864cea37c944392eb4909f Gerrit-Change-Number: 60105 Gerrit-PatchSet: 1 Gerrit-Owner: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Denverton-NS boards: Drop useless `thermal.asl`
by Felix Singer (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michael Niewöhner, Michal Motyl. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60103 ) Change subject: Denverton-NS boards: Drop useless `thermal.asl` ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11571885059e8d5f930f741172c74b25faa09a15 Gerrit-Change-Number: 60103 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 12:18:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021