coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/var/primus: Update thermal table for primus
by Tim Wawrzynczak (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Ariel Fang, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60101 ) Change subject: mb/google/brya/var/primus: Update thermal table for primus ...................................................................... Patch Set 4: Code-Review+1 (1 comment) File src/mainboard/google/brya/variants/primus/overridetree.cb: https://review.coreboot.org/c/coreboot/+/60101/comment/dec9fbe2_777e89f4 PS4, Line 109: 89 If you insert the extra TSR at position 0, then keep in mind that, for example, this 89 will apply to the SSD TSR instead of Charger TSR now. -- To view, visit https://review.coreboot.org/c/coreboot/+/60101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02fb8eee644f9999d9c5d48e3a056499d968f85d Gerrit-Change-Number: 60101 Gerrit-PatchSet: 4 Gerrit-Owner: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 20:48:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/glados: Move selects from Kconfig.name to Kconfig
by Tim Wawrzynczak (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Felix Singer. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60060 ) Change subject: mb/google/glados: Move selects from Kconfig.name to Kconfig ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Patchset: PS3: Is there a a treewide switch to Kconfig / Kconfig.name? for google boards, we have usually left the common configs in Kconfig, and then board-specific ones with Kconfig.name. I don't care either way, just curious 😊 -- To view, visit https://review.coreboot.org/c/coreboot/+/60060 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifccf2b3521d84f6a678872bbccf9bf390c25ce37 Gerrit-Change-Number: 60060 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 14 Dec 2021 20:22:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/glados: Restore alphabetical order on Kconfig selects
by Felix Singer (Code Review) 14 Dec '21

14 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60059 ) Change subject: mb/google/glados: Restore alphabetical order on Kconfig selects ...................................................................... mb/google/glados: Restore alphabetical order on Kconfig selects Change-Id: I736234b9a960c58193fcf7bc9184c9581c6c953b Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60059 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M src/mainboard/google/glados/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 4b0275f..3c52163 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -12,16 +12,16 @@ select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE + select HAVE_SPD_IN_CBFS select INTEL_GMA_HAVE_VBT if !BOARD_GOOGLE_GLADOS select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 + select MAINBOARD_NO_FSP_GOP if !BOARD_GOOGLE_GLADOS select SOC_INTEL_SKYLAKE select SYSTEM_TYPE_LAPTOP - select MAINBOARD_HAS_LIBGFXINIT - select MAINBOARD_NO_FSP_GOP if !BOARD_GOOGLE_GLADOS - select HAVE_SPD_IN_CBFS if BOARD_GOOGLE_BASEBOARD_GLADOS -- To view, visit https://review.coreboot.org/c/coreboot/+/60059 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I736234b9a960c58193fcf7bc9184c9581c6c953b Gerrit-Change-Number: 60059 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: lib: Add a mutex
by Raul Rangel (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Raul Rangel, Julius Werner, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Hello build bot (Jenkins), Julius Werner, Rob Barnes, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59320 to look at the new patch set (#13). Change subject: lib: Add a mutex ...................................................................... lib: Add a mutex We currently have two synchronization primatives, spinlock and thread_mutex. spinlock is meant to block multiple CPUs from entering a critical section. thread_mutex is meant to block multiple coop-threads from entering a critical section. It is not AP aware at all. This CL introduces a mutex that can handle both concepts. The implementation is using the GCC/LLVM atomic builtin functions. The generated code uses the xchg instruction vs spinlock which uses (lock) decb. 8: b0 01 mov $0x1,%al a: 86 03 xchg %al,(%ebx) c: 84 c0 test %al,%al BUG=b:179699789 TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 --- A src/include/mutex.h M src/lib/Makefile.inc A src/lib/mutex.c 3 files changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59320/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/59320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 Gerrit-Change-Number: 59320 Gerrit-PatchSet: 13 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib: Add a mutex
by Raul Rangel (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Julius Werner, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59320 ) Change subject: lib: Add a mutex ...................................................................... Patch Set 12: (1 comment) File src/lib/mutex.c: https://review.coreboot.org/c/coreboot/+/59320/comment/407b2380_f21e5487 PS11, Line 43: __atomic_load_1(&mutex->locked, __ATOMIC_RELAXED) > _mutex_is_locked_smp()? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 Gerrit-Change-Number: 59320 Gerrit-PatchSet: 12 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 17:41:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: lib: Add a mutex
by Raul Rangel (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Julius Werner, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Hello build bot (Jenkins), Julius Werner, Rob Barnes, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59320 to look at the new patch set (#12). Change subject: lib: Add a mutex ...................................................................... lib: Add a mutex We currently have two synchronization primatives, spinlock and thread_mutex. spinlock is meant to block multiple CPUs from entering a critical section. thread_mutex is meant to block multiple coop-threads from entering a critical section. It is not AP aware at all. This CL introduces a mutex that can handle both concepts. The implementation is using the GCC/LLVM atomic builtin functions. The generated code uses the xchg instruction vs spinlock which uses (lock) decb. 8: b0 01 mov $0x1,%al a: 86 03 xchg %al,(%ebx) c: 84 c0 test %al,%al BUG=b:179699789 TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 --- A src/include/mutex.h M src/lib/Makefile.inc A src/lib/mutex.c 3 files changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59320/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/59320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78 Gerrit-Change-Number: 59320 Gerrit-PatchSet: 12 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP
by Raul Rangel (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Julius Werner. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59550 ) Change subject: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Ping -- To view, visit https://review.coreboot.org/c/coreboot/+/59550 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1197406d1d36391998b08e3076146bb2fff59d00 Gerrit-Change-Number: 59550 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 17:41:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: set up open-drain ChromeOS pins
by Felix Held (Code Review) 14 Dec '21

14 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60002 ) Change subject: mb/google/corsola: set up open-drain ChromeOS pins ...................................................................... mb/google/corsola: set up open-drain ChromeOS pins Set open-drain GPIOs for ChromeOS as input and high-z mode. After applying this patch, we can measure these pins from 1.0V to correct voltage (1.8V) to prevent wrong judgement of low/high. Reference document: MT8186_SoC_Pinmux_V1_1 BUG=b:209342636 TEST=measure pins voltage 1.8V on kingler board Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60002 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/mainboard/google/corsola/bootblock.c M src/mainboard/google/corsola/chromeos.c M src/mainboard/google/corsola/gpio.h 3 files changed, 46 insertions(+), 19 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/mainboard/google/corsola/bootblock.c b/src/mainboard/google/corsola/bootblock.c index 0b03d04..71f1d36 100644 --- a/src/mainboard/google/corsola/bootblock.c +++ b/src/mainboard/google/corsola/bootblock.c @@ -12,5 +12,5 @@ mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0); mtk_snfc_init(SPI_NOR_GPIO_SET1); setup_chromeos_gpios(); - gpio_eint_configure(GPIO_GSC_AP_INT, IRQ_TYPE_EDGE_RISING); + gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING); } diff --git a/src/mainboard/google/corsola/chromeos.c b/src/mainboard/google/corsola/chromeos.c index 847569e..56959c3 100644 --- a/src/mainboard/google/corsola/chromeos.c +++ b/src/mainboard/google/corsola/chromeos.c @@ -9,20 +9,35 @@ void setup_chromeos_gpios(void) { - gpio_input(GPIO_WP); - gpio_input_pullup(GPIO_EC_AP_INT); - gpio_input_pullup(GPIO_EC_IN_RW); - gpio_input_pullup(GPIO_GSC_AP_INT); - gpio_output(GPIO_EN_SPK, 0); + /* Set up open-drain pins */ + gpio_input(GPIO_SAR_INT_ODL); + gpio_input(GPIO_BT_WAKE_AP_ODL); + gpio_input(GPIO_WIFI_INT_ODL); + gpio_input(GPIO_DPBRDG_INT_ODL); + gpio_input(GPIO_EDPBRDG_INT_ODL); + gpio_input(GPIO_EC_AP_HPD_OD); + gpio_input(GPIO_TCHPAD_INT_ODL); + gpio_input(GPIO_TCHSCR_INT_1V8_ODL); + gpio_input(GPIO_EC_AP_INT_ODL); + gpio_input(GPIO_EC_IN_RW_ODL); + gpio_input(GPIO_GSC_AP_INT_ODL); + gpio_input(GPIO_AP_WP_ODL); + gpio_input(GPIO_HP_INT_ODL); + gpio_input(GPIO_PEN_EJECT_OD); + gpio_input(GPIO_UCAM_DET_ODL); + + /* Set up GPIOs */ gpio_output(GPIO_RESET, 0); + gpio_output(GPIO_XHCI_DONE, 0); + gpio_output(GPIO_EN_SPK, 0); } void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_EC_AP_INT.id, ACTIVE_LOW, -1, "EC interrupt"}, - {GPIO_EC_IN_RW.id, ACTIVE_LOW, -1, "EC in RW"}, - {GPIO_GSC_AP_INT.id, ACTIVE_HIGH, -1, "TPM interrupt"}, + {GPIO_EC_AP_INT_ODL.id, ACTIVE_LOW, -1, "EC interrupt"}, + {GPIO_EC_IN_RW_ODL.id, ACTIVE_LOW, -1, "EC in RW"}, + {GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt"}, {GPIO_EN_SPK.id, ACTIVE_HIGH, -1, "speaker enable"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); @@ -31,10 +46,10 @@ int get_ec_is_trusted(void) { /* EC is trusted if not in RW. This is active low. */ - return !!gpio_get(GPIO_EC_IN_RW); + return !!gpio_get(GPIO_EC_IN_RW_ODL); } int tis_plat_irq_status(void) { - return gpio_eint_poll(GPIO_GSC_AP_INT); + return gpio_eint_poll(GPIO_GSC_AP_INT_ODL); } diff --git a/src/mainboard/google/corsola/gpio.h b/src/mainboard/google/corsola/gpio.h index 78dd252..2c78564 100644 --- a/src/mainboard/google/corsola/gpio.h +++ b/src/mainboard/google/corsola/gpio.h @@ -5,14 +5,26 @@ #include <soc/gpio.h> -#define GPIO_EC_AP_INT GPIO(EINT13) -#define GPIO_WP GPIO(EINT16) -#define GPIO_BEEP_ON GPIO(PERIPHERAL_EN4) -#define GPIO_XHCI_DONE GPIO(PERIPHERAL_EN1) -#define GPIO_EC_IN_RW GPIO(EINT14) -#define GPIO_GSC_AP_INT GPIO(EINT15) -#define GPIO_EN_SPK GPIO(PERIPHERAL_EN3) -#define GPIO_RESET GPIO(PERIPHERAL_EN0) +#define GPIO_SAR_INT_ODL GPIO(EINT5) +#define GPIO_BT_WAKE_AP_ODL GPIO(EINT6) +#define GPIO_WIFI_INT_ODL GPIO(EINT7) +#define GPIO_DPBRDG_INT_ODL GPIO(EINT8) +#define GPIO_EDPBRDG_INT_ODL GPIO(EINT9) +#define GPIO_EC_AP_HPD_OD GPIO(EINT10) +#define GPIO_TCHPAD_INT_ODL GPIO(EINT11) +#define GPIO_TCHSCR_INT_1V8_ODL GPIO(EINT12) +#define GPIO_EC_AP_INT_ODL GPIO(EINT13) +#define GPIO_EC_IN_RW_ODL GPIO(EINT14) +#define GPIO_GSC_AP_INT_ODL GPIO(EINT15) +#define GPIO_AP_WP_ODL GPIO(EINT16) +#define GPIO_HP_INT_ODL GPIO(EINT17) +#define GPIO_PEN_EJECT_OD GPIO(EINT18) +#define GPIO_UCAM_DET_ODL GPIO(CAM_CLK2) + +#define GPIO_RESET GPIO(PERIPHERAL_EN0) +#define GPIO_XHCI_DONE GPIO(PERIPHERAL_EN1) +#define GPIO_EN_SPK GPIO(PERIPHERAL_EN3) +#define GPIO_BEEP_ON GPIO(PERIPHERAL_EN4) void setup_chromeos_gpios(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/60002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Gerrit-Change-Number: 60002 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8186: add tracker dump
by Felix Held (Code Review) 14 Dec '21

14 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59990 ) Change subject: soc/mediatek/mt8186: add tracker dump ...................................................................... soc/mediatek/mt8186: add tracker dump Tracker is a debugging tool, and MT8186 only supports AP tracker. When bus timeout occurs, the system reboots and latches some values which could be used for debugging. This function will be triggered only when it encounters the bug hanging issue. BUG=b:202871018 TEST=range of registers are dumped as expected. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ie023de2a6f7421a16b2516baa0bf0bf6fff589e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59990 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/soc/mediatek/common/tracker.c M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8186/bootblock.c M src/soc/mediatek/mt8186/include/soc/addressmap.h A src/soc/mediatek/mt8186/include/soc/tracker.h 5 files changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/common/tracker.c b/src/soc/mediatek/common/tracker.c index f3b2e9b..3485449 100644 --- a/src/soc/mediatek/common/tracker.c +++ b/src/soc/mediatek/common/tracker.c @@ -6,6 +6,11 @@ #include <soc/tracker.h> #include <soc/tracker_common.h> +__weak void tracker_setup(void) +{ + /* do nothing. */ +} + static void tracker_dump_data(void) { int i, j, k; diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index 7a2f997..2a22e6e 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -11,6 +11,7 @@ bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-y += ../common/timer.c timer.c +bootblock-y += ../common/tracker.c ../common/tracker_v1.c bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c wdt.c diff --git a/src/soc/mediatek/mt8186/bootblock.c b/src/soc/mediatek/mt8186/bootblock.c index d5b288a..e5d1e73 100644 --- a/src/soc/mediatek/mt8186/bootblock.c +++ b/src/soc/mediatek/mt8186/bootblock.c @@ -5,11 +5,13 @@ #include <soc/gic.h> #include <soc/mmu_operations.h> #include <soc/pll.h> +#include <soc/tracker_common.h> #include <soc/wdt.h> void bootblock_soc_init(void) { mtk_mmu_init(); + bustracker_init(); mtk_wdt_init(); mt_pll_init(); unmask_eint_event_mask(); diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h index 6a5ce5c..adb1d59 100644 --- a/src/soc/mediatek/mt8186/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h @@ -42,6 +42,7 @@ I2C8_DMA_BASE = IO_PHYS + 0x00200A80, I2C9_DMA_BASE = IO_PHYS + 0x00200C00, DEVAPC_BASE = IO_PHYS + 0x00207000, + DBG_TRACKER_BASE = IO_PHYS + 0x00208000, EMI0_BASE = IO_PHYS + 0x00219000, EMI0_MPU_BASE = IO_PHYS + 0x0021B000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000, diff --git a/src/soc/mediatek/mt8186/include/soc/tracker.h b/src/soc/mediatek/mt8186/include/soc/tracker.h new file mode 100644 index 0000000..9c671c9 --- /dev/null +++ b/src/soc/mediatek/mt8186/include/soc/tracker.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8186_TRACKER_H +#define SOC_MEDIATEK_MT8186_TRACKER_H + +#include <soc/tracker_v1.h> + +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/59990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie023de2a6f7421a16b2516baa0bf0bf6fff589e2 Gerrit-Change-Number: 59990 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: tests/lib/lzma-test: Fix uninitialized array error
by Paul Fagerburg (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Jakub Czapiga, Jan Dabros. Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60112 ) Change subject: tests/lib/lzma-test: Fix uninitialized array error ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b10eef3dd82068f97d4d875f3da813a5aca07a7 Gerrit-Change-Number: 60112 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 17:02:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021