coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

1 participants
5525 discussions

Change in coreboot[master]: soc/intel/common: Do not trigger crashlog on all resets by default
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Francois Toguo Fotso, Paul Menzel, Curtis Chen, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59951 ) Change subject: soc/intel/common: Do not trigger crashlog on all resets by default ...................................................................... Patch Set 6: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59951/comment/44170b99_b04faa88 PS1, Line 13: apreset > suggestion: […] Done File src/soc/intel/common/Kconfig.common: https://review.coreboot.org/c/coreboot/+/59951/comment/c538f38c_20ae8ac0 PS4, Line 87: CrashLog > nit: […] Done https://review.coreboot.org/c/coreboot/+/59951/comment/dfa8cc6f_085d79be PS4, Line 92: Enable PMC reset crashlog record. > suggestion: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59951 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ec4ff3c8a3799156de030f4556fe6ce61305139 Gerrit-Change-Number: 59951 Gerrit-PatchSet: 6 Gerrit-Owner: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:39:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Curtis Chen <curtis.chen(a)intel.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
by build bot (Jenkins) (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Subrata Banik, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60183 ) Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135684): https://review.coreboot.org/c/coreboot/+/60183/comment/612e64f2_a8cb04b8 PS3, Line 272: printk(BIOS_ERR, "%s: Invalid root port number: %u\n", __func__, pcie_rp); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/60183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 Gerrit-Change-Number: 60183 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:36:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE
by Karthik Ramasubramanian (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60139 ) Change subject: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d64fe92ffc67a421be6d5e013e636332ce86dd5 Gerrit-Change-Number: 60139 Gerrit-PatchSet: 3 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:36:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/var/vell: update overridetree for SSD setting
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Robert Chen, Wisley Chen. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60099 ) Change subject: mb/google/brya/var/vell: update overridetree for SSD setting ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d452eaa690a91814739cc1b80966fc3a9f1be37 Gerrit-Change-Number: 60099 Gerrit-PatchSet: 3 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:36:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/var/vell: update overridetree for touchpad
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Kevin Chiu, Robert Chen, Wisley Chen. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60098 ) Change subject: mb/google/brya/var/vell: update overridetree for touchpad ...................................................................... Patch Set 3: Code-Review+2 (1 comment) File src/mainboard/google/brya/variants/vell/overridetree.cb: https://review.coreboot.org/c/coreboot/+/60098/comment/d642713a_4f3b9896 PS3, Line 230: end nit: goes on previous line -- To view, visit https://review.coreboot.org/c/coreboot/+/60098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I835958349537ed490191db7c8e35847630de64ed Gerrit-Change-Number: 60098 Gerrit-PatchSet: 3 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:31:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
by build bot (Jenkins) (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Subrata Banik, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60183 ) Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135682): https://review.coreboot.org/c/coreboot/+/60183/comment/34af0403_79758778 PS2, Line 272: printk(BIOS_ERR, "%s: Invalid root port number: %u\n", __func__, pcie_rp); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/60183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 Gerrit-Change-Number: 60183 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:30:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/var/vell: update gpio override
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Kevin Chiu, Paul Menzel, Robert Chen, Nick Vaccaro, Wisley Chen. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59305 ) Change subject: mb/google/brya/var/vell: update gpio override ...................................................................... Patch Set 28: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0 Gerrit-Change-Number: 59305 Gerrit-PatchSet: 28 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:27:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Subrata Banik, Patrick Rudolph. Hello Cliff Huang, Maulik V Vaghela, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60182 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs ...................................................................... soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs The Alder Lake chip.h file has pcie_rp_config entries for the CPU PCIe ports, but the UPDs are not set. This patch hooks up those config structs to the appropriate FSP-S UPDs. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ibb2375e66d53b4b7567dbe88b941cd720fdad927 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/60182/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60182 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb2375e66d53b4b7567dbe88b941cd720fdad927 Gerrit-Change-Number: 60182 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
by build bot (Jenkins) (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Cliff Huang, Maulik V Vaghela, Subrata Banik, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60183 ) Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135677): https://review.coreboot.org/c/coreboot/+/60183/comment/6cbda200_7fac8181 PS1, Line 272: printk(BIOS_ERR, "%s: Invalid root port number: %u\n", __func__, pcie_rp); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/60183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 Gerrit-Change-Number: 60183 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 16 Dec 2021 22:21:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function
by Tim Wawrzynczak (Code Review) 16 Dec '21

16 Dec '21

Attention is currently required from: Patrick Rudolph. Hello Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60179 to look at the new patch set (#2). Change subject: soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function ...................................................................... soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function The PMC IPC method used to enable/disable PCIe srcclks uses the LCAP PN field to distinguish PCH RPs. For CPU RPs, the PMC IPC command expects the RP number to be its "virtual wire index" instead. This new function returns this virtual wire index for each of the CPU PCIe RPs. BUG=b:197983574 Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I7aa14a634dcd90c4817009db970fb209ae02c63d --- M src/soc/intel/common/block/include/intelblocks/pcie_rp.h M src/soc/intel/tigerlake/pcie_rp.c 2 files changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/60179/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60179 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa14a634dcd90c4817009db970fb209ae02c63d Gerrit-Change-Number: 60179 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2021