coreboot-gerrit December 2021

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Change in coreboot[master]: mb/google/dedede/var/beadrix: Add internal USB camera support
by Teddy Shih (Code Review) 20 Dec '21

20 Dec '21

Teddy Shih has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60252 ) Change subject: mb/google/dedede/var/beadrix: Add internal USB camera support ...................................................................... mb/google/dedede/var/beadrix: Add internal USB camera support This change adds internal USB camera into devicetree for beadrix. BUG=b:204882915, b:210772511 BRANCH=None TEST=Built and checked camera device existence with lsusb Signed-off-by: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Change-Id: Iddc58c0d27d5da0fa4652f503f15ebb308be18c7 --- M src/mainboard/google/dedede/variants/beadrix/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/60252/1 diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index e7d940d..97e77439 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -1,5 +1,8 @@ chip soc/intel/jasperlake + # USB Port Configuration + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -37,6 +40,18 @@ }" device domain 0 on + device pci 05.0 off end # IPU - MIPI Camera + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + register "desc" = ""UFCamera"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.5 on end + end + end + end + end # USB xHCI device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""PIXA2635"" -- To view, visit https://review.coreboot.org/c/coreboot/+/60252 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddc58c0d27d5da0fa4652f503f15ebb308be18c7 Gerrit-Change-Number: 60252 Gerrit-PatchSet: 1 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
by build bot (Jenkins) (Code Review) 20 Dec '21

20 Dec '21

Attention is currently required from: shkim, Henry Sun, SH Kim, Paul Menzel, Simon Yang, Edward Doan, Karthik Ramasubramanian. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60190 ) Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/dedede/variants/bugzzy/ramstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135881): https://review.coreboot.org/c/coreboot/+/60190/comment/60b6fdf3_3e6e793a PS6, Line 71: BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, wa_init_display_signal, NULL); adding a line without newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/60190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db Gerrit-Change-Number: 60190 Gerrit-PatchSet: 6 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: shkim <sh_.kim(a)samsung.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 20 Dec 2021 08:23:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/starlabs/labtop: Tidy up GPIOs
by build bot (Jenkins) (Code Review) 20 Dec '21

20 Dec '21

Attention is currently required from: Andy Pont, Michael Niewöhner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60123 ) Change subject: mb/starlabs/labtop: Tidy up GPIOs ...................................................................... Patch Set 12: (1 comment) File src/mainboard/starlabs/labtop/variants/tgl/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135879): https://review.coreboot.org/c/coreboot/+/60123/comment/e8772ff8_4b40d1d2 PS12, Line 49: PAD_CFG_NF(GPD11, NONE, DEEP, NF1), trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/60123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3678274dcd52285019fb3cf8ccd22617268ce1a Gerrit-Change-Number: 60123 Gerrit-PatchSet: 12 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Mon, 20 Dec 2021 08:18:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update overridetree for fingerprint
by Shon Wang (Code Review) 20 Dec '21

20 Dec '21

Shon Wang has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/60251 ) Change subject: mb/google/brya/var/vell: update overridetree for fingerprint ...................................................................... mb/google/brya/var/vell: update overridetree for fingerprint update override devicetree for fingerprint based on schematics BUG=b:209489126 TEST=emerge-brya coreboot Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f --- M src/mainboard/google/brya/variants/vell/overridetree.cb 1 file changed, 51 insertions(+), 37 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/60251/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f Gerrit-Change-Number: 60251 Gerrit-PatchSet: 2 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/vell: update overridetree for touchpad
by Shon Wang (Code Review) 20 Dec '21

20 Dec '21

Shon Wang has removed Tim Wawrzynczak from this change. ( https://review.coreboot.org/c/coreboot/+/60251 ) Change subject: mb/google/brya/var/vell: update overridetree for touchpad ...................................................................... Removed reviewer Tim Wawrzynczak. -- To view, visit https://review.coreboot.org/c/coreboot/+/60251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f Gerrit-Change-Number: 60251 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: mb/google/brya/var/vell: update overridetree for touchpad
by Shon Wang (Code Review) 20 Dec '21

20 Dec '21

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60251 ) Change subject: mb/google/brya/var/vell: update overridetree for touchpad ...................................................................... mb/google/brya/var/vell: update overridetree for touchpad update override devicetree for touchpad based on schematics BUG=b:209489126 TEST=emerge-brya coreboot Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f --- M src/mainboard/google/brya/variants/vell/overridetree.cb 1 file changed, 51 insertions(+), 37 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/60251/1 diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 4006af8..6c624b2 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -46,9 +46,17 @@ #| | for TPM communication | #| I2C5 | Trackpad | #+-------------------+---------------------------+ - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port + register "common_soc_config" = "{ + .i2c[0] = { + .rise_time_ns = 550, + .fall_time_ns = 400, + .data_hold_time_ns = 50, + .speed = I2C_SPEED_FAST, + }, + }" + + register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3 + # I2C Port Config register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -64,7 +72,7 @@ register "device_count" = "1" register "device[0].name" = ""LCD"" # Use Chrome OS privacy screen _HID - register "device[0].hid" = ""GOOG0010"" + #register "device[0].hid" = ""GOOG0010"" # Internal panel on the first port of the graphics chip register "device[0].addr" = "0x80010400" register "device[0].privacy.enabled" = "1" @@ -125,7 +133,7 @@ end end device ref pcie4_0 on - # Enable CPU PCIE RP 1 using CLK 1 + # Enable CPU PCIE RP 1 using CLK 0 register "cpu_pcie_rp[CPU_RP(1)]" = "{ .clk_req = 1, .clk_src = 1, @@ -226,7 +234,8 @@ register "generic.wake" = "GPE0_DW2_14" register "generic.probed" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 15 on end + device i2c 15 on + end end end device ref gspi1 on @@ -244,6 +253,8 @@ chip ec/google/chromeec use conn0 as mux_conn[0] use conn1 as mux_conn[1] + use conn2 as mux_conn[2] + use conn3 as mux_conn[3] device pnp 0c09.0 on end end end @@ -256,9 +267,19 @@ device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "2" + register "usb3_port_number" = "2" + device generic 1 alias conn1 on end + end + chip drivers/intel/pmc_mux/conn register "usb2_port_number" = "3" register "usb3_port_number" = "3" - device generic 1 alias conn1 on end + device generic 2 alias conn2 on end + end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "5" + register "usb3_port_number" = "4" + device generic 3 alias conn3 on end end end end @@ -273,11 +294,23 @@ device ref tcss_usb3_port1 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-C Port C2 (MLB)"" + register "desc" = ""USB3 Type-C Port C1 (MlB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 1)" + device ref tcss_usb3_port2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C2 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(3, 1)" device ref tcss_usb3_port3 on end end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-C Port C3 (DB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(5, 1)" + device ref tcss_usb3_port4 on end + end end end end @@ -291,11 +324,11 @@ device ref usb2_port1 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port (MLB)"" - register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(4, 2)" + register "desc" = ""USB2 Type-C Port C1 (MLB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port2 on end - end + end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" @@ -308,36 +341,17 @@ device ref usb2_port4 on end end chip drivers/usb/acpi + register "desc" = ""USB2 Type-C Port C3 (DB)"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(5, 1)" + device ref usb2_port5 on end + end + chip drivers/usb/acpi register "desc" = ""USB2 Camera"" register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port6 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port (DB)"" - register "type" = "UPC_TYPE_A" - register "group" = "ACPI_PLD_GROUP(4, 1)" - device ref usb2_port9 on end - end - chip drivers/usb/acpi - register "desc" = ""USB2 Bluetooth"" - register "type" = "UPC_TYPE_INTERNAL" - register "reset_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" - device ref usb2_port10 on end - end - chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port (DB)"" - register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(4, 1)" - device ref usb3_port1 on end - end - chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port (MLB)"" - register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(4, 2)" - device ref usb3_port3 on end - end - chip drivers/usb/acpi register "desc" = ""USB3 WWAN"" register "type" = "UPC_TYPE_INTERNAL" device ref usb3_port4 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/60251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f Gerrit-Change-Number: 60251 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/anahera: Enable SaGv
by Wisley Chen (Code Review) 20 Dec '21

20 Dec '21

Attention is currently required from: Tim Wawrzynczak. Wisley Chen has uploaded a new patch set (#3) to the change originally created by Chen Wisley. ( https://review.coreboot.org/c/coreboot/+/60249 ) Change subject: mb/google/brya/var/anahera: Enable SaGv ...................................................................... mb/google/brya/var/anahera: Enable SaGv Enable SaGv support for anahera/anahera4es. BUG=b:211362081 TEST=FW_NAME=anahera emerge-brya coreboot Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/anahera4es/overridetree.cb 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/60249/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Gerrit-Change-Number: 60249 Gerrit-PatchSet: 3 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/beadrix: Enable audio feature
by Teddy Shih (Code Review) 20 Dec '21

20 Dec '21

Teddy Shih has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60250 ) Change subject: mb/google/dedede/var/beadrix: Enable audio feature ...................................................................... mb/google/dedede/var/beadrix: Enable audio feature This change adds ALC5682I audio codec and MAX98360A amplifier for beadrix. BUG=b:204882915, b:210756131 BRANCH=None TEST= Built and heared speaker sound on OS Signed-off-by: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Change-Id: I6f12f71ec66acd420471ab9a7612b1821650ad54 --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/beadrix/overridetree.cb 2 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/60250/1 diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 212f242..b92f137 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -175,3 +175,4 @@ bool "-> Beadrix" select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 select BASEBOARD_DEDEDE_LAPTOP + select DRIVERS_GENERIC_MAX98357A diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index dab4311..e7d940d 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -48,5 +48,25 @@ device i2c 15 on end end end # I2C 0 + device pci 19.0 on + chip drivers/i2c/generic + register "hid" = ""10EC5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + end # I2C 4 + device pci 1f.3 on + chip drivers/generic/max98357a + register "hid" = ""MX98360A"" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)" + device generic 0 on end + end + end # Intel HDA end end -- To view, visit https://review.coreboot.org/c/coreboot/+/60250 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f12f71ec66acd420471ab9a7612b1821650ad54 Gerrit-Change-Number: 60250 Gerrit-PatchSet: 1 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/anahera: Enable SaGv
by Chen Wisley (Code Review) 20 Dec '21

20 Dec '21

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, Wisley Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60249 to look at the new patch set (#2). Change subject: mb/google/brya/var/anahera: Enable SaGv ...................................................................... mb/google/brya/var/anahera: Enable SaGv Enable SaGv support for anahera/anahera4es. BUG=none TEST=FW_NAME=anahera emerge-brya coreboot Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/anahera4es/overridetree.cb 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/60249/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Gerrit-Change-Number: 60249 Gerrit-PatchSet: 2 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/anahera: Enable SaGv
by Chen Wisley (Code Review) 20 Dec '21

20 Dec '21

Attention is currently required from: Wisley Chen. Hello Wisley Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/60249 to review the following change. Change subject: mb/google/brya/var/anahera: Enable SaGv ...................................................................... mb/google/brya/var/anahera: Enable SaGv Enable SaGv support for anahera BUG=none TEST=FW_NAME=anahera emerge-brya coreboot Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/60249/1 diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index dc563a4..3e1013c 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -33,6 +33,7 @@ register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_5]" = "0" + register "SaGv" = "SaGv_Enabled" # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- To view, visit https://review.coreboot.org/c/coreboot/+/60249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68c916dbc570759dba3a4c32fbb8ebfc6e387be4 Gerrit-Change-Number: 60249 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit December 2021