coreboot-gerrit December 2021

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Change in coreboot[master]: Revert "libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables pa...
by Ravi kumar (Code Review) 30 Dec '21

30 Dec '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60534 ) Change subject: Revert "libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables parser" ...................................................................... Revert "libpayload: Add CBMEM_IMD_ENTRY support to coreboot tables parser" This reverts commit 2f236c232d9ceaeeddf8efa2868a3afbd898e1b3. Change-Id: Ie3d121caf63a70657190441395b0cbbd6c8d9925 --- M payloads/libpayload/arch/x86/coreboot.c M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c 4 files changed, 68 insertions(+), 71 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/60534/1 diff --git a/payloads/libpayload/arch/x86/coreboot.c b/payloads/libpayload/arch/x86/coreboot.c index cad1396..38ede87 100644 --- a/payloads/libpayload/arch/x86/coreboot.c +++ b/payloads/libpayload/arch/x86/coreboot.c @@ -47,12 +47,20 @@ info->x86_rom_var_mtrr_index = rom_mtrr->index; } +static void cb_parse_mrc_cache(void *ptr, struct sysinfo_t *info) +{ + info->mrc_cache = get_cbmem_addr(ptr); +} + int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info) { switch(rec->tag) { case CB_TAG_X86_ROM_MTRR: cb_parse_x86_rom_var_mtrr(rec, info); break; + case CB_TAG_MRC_CACHE: + cb_parse_mrc_cache(rec, info); + break; default: return 0; } diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index e211805..2e3a416 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -322,16 +322,6 @@ uint64_t boot_media_size; }; - -struct cb_cbmem_entry { - uint32_t tag; - uint32_t size; - - uint64_t address; - uint32_t entry_size; - uint32_t id; -}; - struct cb_tsc_info { uint32_t tag; uint32_t size; @@ -454,4 +444,6 @@ (void *)(((u8 *) (_rec)) + sizeof(*(_rec)) \ + (sizeof((_rec)->map[0]) * (_idx))) +/* Helper functions */ +uintptr_t get_cbmem_addr(const void *cbmem_tab_entry); #endif diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index eba4b892..6197fc4 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -151,12 +151,6 @@ #endif /* USB Type-C Port Configuration Info */ uintptr_t type_c_info; - - /* CBFS RW/RO Metadata Cache */ - uintptr_t cbfs_ro_mcache_offset; - uint32_t cbfs_ro_mcache_size; - uintptr_t cbfs_rw_mcache_offset; - uint32_t cbfs_rw_mcache_size; }; extern struct sysinfo_t lib_sysinfo; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 6f4f4a4..af588ad 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -29,7 +29,6 @@ #include <libpayload-config.h> #include <libpayload.h> -#include <commonlib/bsd/cbmem_id.h> #include <coreboot_tables.h> #include <stdint.h> @@ -42,6 +41,12 @@ /* === Parsing code === */ /* This is the generic parsing code. */ +uintptr_t get_cbmem_addr(const void *const cbmem_tab_entry) +{ + const struct cb_cbmem_tab *const cbmem = cbmem_tab_entry; + return cbmem->cbmem_tab; +} + static void cb_parse_memory(void *ptr, struct sysinfo_t *info) { struct cb_memory *mem = ptr; @@ -78,6 +83,11 @@ info->cb_serial = virt_to_phys(ptr); } +static void cb_parse_vboot_workbuf(unsigned char *ptr, struct sysinfo_t *info) +{ + info->vboot_workbuf = get_cbmem_addr(ptr); +} + static void cb_parse_vbnv(unsigned char *ptr, struct sysinfo_t *info) { struct lb_range *vbnv = (struct lb_range *)ptr; @@ -183,6 +193,11 @@ *info = virt_to_phys(str->string); } +static void cb_parse_wifi_calibration(void *ptr, struct sysinfo_t *info) +{ + info->wifi_calibration = get_cbmem_addr(ptr); +} + static void cb_parse_ramoops(void *ptr, struct sysinfo_t *info) { struct lb_range *ramoops = (struct lb_range *)ptr; @@ -226,6 +241,21 @@ info->boot_media_size = bmp->boot_media_size; } +static void cb_parse_vpd(void *ptr, struct sysinfo_t *info) +{ + info->chromeos_vpd = get_cbmem_addr(ptr); +} + +static void cb_parse_fmap_cache(void *ptr, struct sysinfo_t *info) +{ + info->fmap_cache = get_cbmem_addr(ptr); +} + +static void cb_parse_type_c_info(void *ptr, struct sysinfo_t *info) +{ + info->type_c_info = get_cbmem_addr(ptr); +} + #if CONFIG(LP_TIMER_RDTSC) static void cb_parse_tsc_info(void *ptr, struct sysinfo_t *info) { @@ -239,57 +269,6 @@ } #endif -static void cb_parse_cbmem_entry(void *ptr, struct sysinfo_t *info) -{ - const struct cb_cbmem_entry *cbmem_entry = ptr; - - if (cbmem_entry->size != sizeof(*cbmem_entry)) - return; - - switch (cbmem_entry->id) { - case CBMEM_ID_ACPI_CNVS: - info->acpi_cnvs = cbmem_entry->address; - break; - case CBMEM_ID_ACPI_GNVS: - info->acpi_gnvs = cbmem_entry->address; - break; - case CBMEM_ID_CBFS_RO_MCACHE: - info->cbfs_ro_mcache_offset = cbmem_entry->address; - info->cbfs_ro_mcache_size = cbmem_entry->size; - break; - case CBMEM_ID_CBFS_RW_MCACHE: - info->cbfs_rw_mcache_offset = cbmem_entry->address; - info->cbfs_rw_mcache_size = cbmem_entry->size; - break; - case CBMEM_ID_CONSOLE: - info->cbmem_cons = cbmem_entry->address; - break; - case CBMEM_ID_MRCDATA: - info->mrc_cache = cbmem_entry->address; - break; - case CBMEM_ID_VBOOT_WORKBUF: - info->vboot_workbuf = cbmem_entry->address; - break; - case CBMEM_ID_TIMESTAMP: - info->tstamp_table = cbmem_entry->address; - break; - case CBMEM_ID_VPD: - info->chromeos_vpd = cbmem_entry->address; - break; - case CBMEM_ID_FMAP: - info->fmap_cache = cbmem_entry->address; - break; - case CBMEM_ID_WIFI_CALIBRATION: - info->wifi_calibration = cbmem_entry->address; - break; - case CBMEM_ID_TYPE_C_INFO: - info->type_c_info = cbmem_entry->address; - break; - default: - break; - } -} - int cb_parse_header(void *addr, int len, struct sysinfo_t *info) { struct cb_header *header; @@ -401,15 +380,33 @@ case CB_TAG_VBNV: cb_parse_vbnv(ptr, info); break; + case CB_TAG_VBOOT_WORKBUF: + cb_parse_vboot_workbuf(ptr, info); + break; case CB_TAG_MAC_ADDRS: cb_parse_mac_addresses(ptr, info); break; case CB_TAG_SERIALNO: cb_parse_string(ptr, &info->serialno); break; + case CB_TAG_TIMESTAMPS: + cb_parse_tstamp(ptr, info); + break; + case CB_TAG_CBMEM_CONSOLE: + cb_parse_cbmem_cons(ptr, info); + break; + case CB_TAG_ACPI_GNVS: + cb_parse_acpi_gnvs(ptr, info); + break; + case CB_TAG_ACPI_CNVS: + cb_parse_acpi_cnvs(ptr, info); + break; case CB_TAG_BOARD_CONFIG: cb_parse_board_config(ptr, info); break; + case CB_TAG_WIFI_CALIBRATION: + cb_parse_wifi_calibration(ptr, info); + break; case CB_TAG_RAM_OOPS: cb_parse_ramoops(ptr, info); break; @@ -425,14 +422,20 @@ case CB_TAG_BOOT_MEDIA_PARAMS: cb_parse_boot_media_params(ptr, info); break; - case CB_TAG_CBMEM_ENTRY: - cb_parse_cbmem_entry(ptr, info); - break; #if CONFIG(LP_TIMER_RDTSC) case CB_TAG_TSC_INFO: cb_parse_tsc_info(ptr, info); break; #endif + case CB_TAG_VPD: + cb_parse_vpd(ptr, info); + break; + case CB_TAG_FMAP: + cb_parse_fmap_cache(ptr, info); + break; + case CB_TAG_TYPE_C_INFO: + cb_parse_type_c_info(ptr, info); + break; default: cb_parse_arch_specific(rec, info); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/60534 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3d121caf63a70657190441395b0cbbd6c8d9925 Gerrit-Change-Number: 60534 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: HACK trogdor: optimize coreboot.rom for T32 flash script HACK
by Ravi kumar (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Ravi kumar, Shelley Chen, Sudheer Amrabadi, Julius Werner, Yu-Ping Wu, mturney mturney. Ravi kumar has uploaded a new patch set (#211) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/36278 ) Change subject: HACK trogdor: optimize coreboot.rom for T32 flash script HACK ...................................................................... HACK trogdor: optimize coreboot.rom for T32 flash script HACK Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/security/vboot/Makefile.inc A util/qualcomm/optimize_coreboot 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/36278/211 -- To view, visit https://review.coreboot.org/c/coreboot/+/36278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8 Gerrit-Change-Number: 36278 Gerrit-PatchSet: 211 Gerrit-Owner: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: google/herobrine: configure gpio to detect board ID.
by Ravi kumar (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Ravi kumar, Ravi Kumar Bokka, Sudheer Amrabadi. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56642 to look at the new patch set (#37). Change subject: google/herobrine: configure gpio to detect board ID. ...................................................................... google/herobrine: configure gpio to detect board ID. BUG=b:182963902, b:193807794 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I6de2a7e7b11ecce8325e0fd44dc7221d73729390 --- M src/mainboard/google/herobrine/board.h M src/mainboard/google/herobrine/boardid.c 2 files changed, 13 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/56642/37 -- To view, visit https://review.coreboot.org/c/coreboot/+/56642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6de2a7e7b11ecce8325e0fd44dc7221d73729390 Gerrit-Change-Number: 56642 Gerrit-PatchSet: 37 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/cse: Helper API to know CSE SPI Protection Mode
by EricR Lai (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60403 ) Change subject: soc/intel/common/cse: Helper API to know CSE SPI Protection Mode ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23f1a1c4b55d8da6e6fd0cf84bef86f49ce80cca Gerrit-Change-Number: 60403 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 11:51:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/chromeec/ec/acpi: Use Printf() for debug prints
by Felix Singer (Code Review) 30 Dec '21

30 Dec '21

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60381 ) Change subject: ec/chromeec/ec/acpi: Use Printf() for debug prints ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60381/comment/f9cb484a_cc2a0e76 PS4, Line 9: and coreboot.rom remains identical > Um, which board? Sorry, forgot to add that. I wrote the commit message first and tested it later. However, I used google/volteer/lindar. -- To view, visit https://review.coreboot.org/c/coreboot/+/60381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b06f74be155e0c4053a38a1c5fd30ff6715111e Gerrit-Change-Number: 60381 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 11:17:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: ec/chromeec/ec/acpi: Use Printf() for debug prints
by Angel Pons (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60381 ) Change subject: ec/chromeec/ec/acpi: Use Printf() for debug prints ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60381/comment/51d28297_52851403 PS4, Line 9: and coreboot.rom remains identical Um, which board? -- To view, visit https://review.coreboot.org/c/coreboot/+/60381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b06f74be155e0c4053a38a1c5fd30ff6715111e Gerrit-Change-Number: 60381 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Thu, 30 Dec 2021 11:10:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Initialize krabby display
by Yu-Ping Wu (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60447 ) Change subject: mb/google/corsola: Initialize krabby display ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Gerrit-Change-Number: 60447 Gerrit-PatchSet: 8 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 11:01:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Increase size of CBFS_MCACHE
by Yu-Ping Wu (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: Leave CR+2 to hungte -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 10:58:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Remove 'corsola' from Kconfig board names
by Yu-Ping Wu (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60515 ) Change subject: mb/google/corsola: Remove 'corsola' from Kconfig board names ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Gerrit-Change-Number: 60515 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 30 Dec 2021 10:53:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Update vboot submodule to upstream master
by Yu-Ping Wu (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hsuan Ting Chen, Hsuan-ting Chen, Julius Werner. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60078 ) Change subject: Update vboot submodule to upstream master ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife75d21ddfa0b956fdf7a638cd53b55b11f6cb7d Gerrit-Change-Number: 60078 Gerrit-PatchSet: 4 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 30 Dec 2021 10:48:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021