November 2021 - coreboot-gerrit

Change in coreboot[master]: device/azalia_device.h: Guard macro parameters
by Angel Pons (Code Review) Nov. 3, 2021

Nov. 3, 2021

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58900 ) Change subject: device/azalia_device.h: Guard macro parameters ...................................................................... device/azalia_device.h: Guard macro parameters Add parentheses around macro parameters to avoid operation order issues. Change-Id: Ic984a82da5eb31fc2921cff3265ac5ea2be098c7 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/include/device/azalia_device.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/58900/1 diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 9010507..ca77350 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -136,7 +136,7 @@ (((codec) << 28) | ((pin) << 20) | (0x71f << 8) \ | (((val) >> 24) & 0xff)) -#define AZALIA_PIN_CFG_NC(n) (0x411111f0 | (n & 0xf)) +#define AZALIA_PIN_CFG_NC(n) (0x411111f0 | ((n) & 0xf)) #define AZALIA_RESET(pin) \ (((pin) << 20) | 0x7ff00), (((pin) << 20) | 0x7ff00), \ -- To view, visit https://review.coreboot.org/c/coreboot/+/58900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic984a82da5eb31fc2921cff3265ac5ea2be098c7 Gerrit-Change-Number: 58900 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS()
by build bot (Jenkins) (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58899 ) Change subject: [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS() ...................................................................... Patch Set 1: (8 comments) File src/vendorcode/google/chromeos/chromeos.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/e23bd7c0_3223472e PS1, Line 110: #define DECLARE_CROS_GPIOS(x) \ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/cb4a1d82_741183e2 PS1, Line 110: #define DECLARE_CROS_GPIOS(x) \ Macros with flow control statements should be avoided Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/1c7600d2_9552099e PS1, Line 111: const struct cros_gpio *variant_cros_gpios(size_t *num) \ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/fc7bed27_aad62bd8 PS1, Line 112: { \ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/13db4677_5d85e9e4 PS1, Line 117: #define DECLARE_WEAK_CROS_GPIOS(x) \ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/63afdc10_e7fc2225 PS1, Line 117: #define DECLARE_WEAK_CROS_GPIOS(x) \ Macros with flow control statements should be avoided Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/1681f78a_c20b259d PS1, Line 118: const struct cros_gpio *__weak variant_cros_gpios(size_t *num) \ please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132161): https://review.coreboot.org/c/coreboot/+/58899/comment/11202e67_059bd5b1 PS1, Line 119: { \ please, no space before tabs -- To view, visit https://review.coreboot.org/c/coreboot/+/58899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6 Gerrit-Change-Number: 58899 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 03 Nov 2021 11:42:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS()
by Kyösti Mälkki (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro. Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58899 ) Change subject: [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS() ...................................................................... [RFC] ChromeOS: Add DECLARE_x_CROS_GPIOS() Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/auron/chromeos.c M src/mainboard/google/beltino/chromeos.c M src/mainboard/google/brya/variants/baseboard/brask/gpio.c M src/mainboard/google/brya/variants/baseboard/brya/gpio.c M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/cyan/chromeos.c M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/deltaur/variants/baseboard/gpio.c M src/mainboard/google/drallion/variants/drallion/gpio.c M src/mainboard/google/eve/chromeos.c M src/mainboard/google/fizz/variants/baseboard/gpio.c M src/mainboard/google/glados/chromeos.c M src/mainboard/google/guybrush/chromeos.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/jecht/chromeos.c M src/mainboard/google/kahlee/chromeos.c M src/mainboard/google/link/chromeos.c M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/rambi/chromeos.c M src/mainboard/google/reef/variants/baseboard/gpio.c M src/mainboard/google/reef/variants/coral/gpio.c M src/mainboard/google/sarien/variants/arcada/gpio.c M src/mainboard/google/sarien/variants/sarien/gpio.c M src/mainboard/google/slippy/chromeos.c M src/mainboard/google/stout/chromeos.c M src/mainboard/google/volteer/variants/baseboard/gpio.c M src/mainboard/google/zork/chromeos.c M src/mainboard/intel/adlrvp/gpio.c M src/mainboard/intel/adlrvp/gpio_m.c M src/mainboard/intel/baskingridge/chromeos.c M src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c M src/mainboard/intel/emeraldlake2/chromeos.c M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c M src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c M src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c M src/mainboard/intel/kblrvp/chromeos.c M src/mainboard/intel/kunimitsu/chromeos.c M src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c M src/mainboard/intel/strago/chromeos.c M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c M src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c M src/mainboard/intel/wtm2/chromeos.c M src/mainboard/samsung/lumpy/chromeos.c M src/mainboard/samsung/stumpy/chromeos.c M src/vendorcode/google/chromeos/chromeos.h 49 files changed, 62 insertions(+), 241 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58899/1 diff --git a/src/mainboard/emulation/qemu-q35/chromeos.c b/src/mainboard/emulation/qemu-q35/chromeos.c index 4a5a409..5cec41e 100644 --- a/src/mainboard/emulation/qemu-q35/chromeos.c +++ b/src/mainboard/emulation/qemu-q35/chromeos.c @@ -49,8 +49,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, "QEMU"), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index 849d86a..7469e8b 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -28,8 +28,4 @@ CROS_GPIO_WP_AH(CROS_WP_GPIO, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index e378103..906ebfa 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -61,8 +61,4 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index d9cbdb0..d5c5921 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -426,11 +426,7 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) { diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index 73fad72..d4970b9 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -445,11 +445,7 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) { diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 202c767..82a623a 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -75,8 +75,4 @@ CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/cyan/chromeos.c b/src/mainboard/google/cyan/chromeos.c index a343229..8c1c967 100644 --- a/src/mainboard/google/cyan/chromeos.c +++ b/src/mainboard/google/cyan/chromeos.c @@ -58,8 +58,4 @@ CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 9b3bd70..af4faf5 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -471,8 +471,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_COMM0_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/deltaur/variants/baseboard/gpio.c b/src/mainboard/google/deltaur/variants/baseboard/gpio.c index 0715f27..96ba29c 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/gpio.c +++ b/src/mainboard/google/deltaur/variants/baseboard/gpio.c @@ -407,11 +407,7 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); /* Weak implementation of overrides */ const struct pad_config *__weak variant_override_gpio_table(size_t *num) diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c index 4a33faa..6220bf2 100644 --- a/src/mainboard/google/drallion/variants/drallion/gpio.c +++ b/src/mainboard/google/drallion/variants/drallion/gpio.c @@ -254,11 +254,7 @@ CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); void variant_mainboard_post_init_params(FSPM_UPD *mupd) { diff --git a/src/mainboard/google/eve/chromeos.c b/src/mainboard/google/eve/chromeos.c index 8297049..9fa8eeb 100644 --- a/src/mainboard/google/eve/chromeos.c +++ b/src/mainboard/google/eve/chromeos.c @@ -30,8 +30,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/fizz/variants/baseboard/gpio.c b/src/mainboard/google/fizz/variants/baseboard/gpio.c index 2ebc51a..a6ccb41 100644 --- a/src/mainboard/google/fizz/variants/baseboard/gpio.c +++ b/src/mainboard/google/fizz/variants/baseboard/gpio.c @@ -260,8 +260,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio * __weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/glados/chromeos.c b/src/mainboard/google/glados/chromeos.c index 2acf5d7..51d5016 100644 --- a/src/mainboard/google/glados/chromeos.c +++ b/src/mainboard/google/glados/chromeos.c @@ -29,8 +29,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/guybrush/chromeos.c b/src/mainboard/google/guybrush/chromeos.c index ee7a0d4..419806e 100644 --- a/src/mainboard/google/guybrush/chromeos.c +++ b/src/mainboard/google/guybrush/chromeos.c @@ -22,12 +22,7 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} - +DECLARE_CROS_GPIOS(cros_gpios); void mainboard_spi_fast_speed_override(uint8_t *fast_speed) { uint32_t board_ver = board_id(); diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index d768486..68b4c7c 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -417,11 +417,7 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); /* Weak implementation of overrides */ const struct pad_config *__weak override_gpio_table(size_t *num) diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index 0c2ff7d..b1212f5 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -63,8 +63,4 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/kahlee/chromeos.c b/src/mainboard/google/kahlee/chromeos.c index 45be2f9..906752b 100644 --- a/src/mainboard/google/kahlee/chromeos.c +++ b/src/mainboard/google/kahlee/chromeos.c @@ -28,8 +28,4 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index 43021b3..56f1715 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -33,8 +33,4 @@ CROS_GPIO_WP_AH(57, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 6878cad..36eca0d 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -379,8 +379,4 @@ CROS_GPIO_WP_AH(PAD_SCC(GPIO_PCH_WP), GPIO_COMM_SCC_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index 328ad59..475727e 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -61,8 +61,4 @@ CROS_GPIO_WP_AL(70, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index dd97d1c..c0c3dff 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -384,11 +384,7 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio * __weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); const struct pad_config * __weak variant_romstage_gpio_table(size_t *num) { diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c index 150a7d2..d2e6c67 100644 --- a/src/mainboard/google/rambi/chromeos.c +++ b/src/mainboard/google/rambi/chromeos.c @@ -39,8 +39,4 @@ CROS_GPIO_WP_AH(0x2006, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index 6604a70..adc8b8a 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -395,8 +395,4 @@ CROS_GPIO_PE_AH(PAD_N(GPIO_SHIP_MODE), GPIO_COMM_N_NAME), }; -const struct cros_gpio * __weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/reef/variants/coral/gpio.c b/src/mainboard/google/reef/variants/coral/gpio.c index 01e4734..b11e598 100644 --- a/src/mainboard/google/reef/variants/coral/gpio.c +++ b/src/mainboard/google/reef/variants/coral/gpio.c @@ -406,8 +406,4 @@ CROS_GPIO_PE_AH(PAD_N(GPIO_SHIP_MODE), GPIO_COMM_N_NAME), }; -const struct cros_gpio * variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index e91415b..fbaeb39 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -259,8 +259,4 @@ CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/sarien/variants/sarien/gpio.c b/src/mainboard/google/sarien/variants/sarien/gpio.c index 7aaffdf..7f226e4 100644 --- a/src/mainboard/google/sarien/variants/sarien/gpio.c +++ b/src/mainboard/google/sarien/variants/sarien/gpio.c @@ -247,8 +247,4 @@ CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 3916a72..c2ff674 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -26,8 +26,4 @@ CROS_GPIO_WP_AH(58, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 4508b8a..082a708 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -83,8 +83,4 @@ CROS_GPIO_WP_AL(7, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index 756d870..b409f69 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -463,8 +463,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/google/zork/chromeos.c b/src/mainboard/google/zork/chromeos.c index 6443011..e116fd2 100644 --- a/src/mainboard/google/zork/chromeos.c +++ b/src/mainboard/google/zork/chromeos.c @@ -27,8 +27,4 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index c4d946b..2e376b4 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -279,8 +279,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c index 6eb670b..73629b4 100644 --- a/src/mainboard/intel/adlrvp/gpio_m.c +++ b/src/mainboard/intel/adlrvp/gpio_m.c @@ -190,8 +190,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 4c1590e..a203d76 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -45,8 +45,4 @@ CROS_GPIO_WP_AL(22, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c index f9eba5c..c296a4a 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c @@ -608,8 +608,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio * __weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 932a6d7..4288f67 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -42,8 +42,4 @@ CROS_GPIO_WP_AL(48, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index 9a8188b..86208b2 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -262,8 +262,4 @@ static const struct cros_gpio cros_gpios[] = { }; -const struct cros_gpio * __weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c index 30e249c..fae54c9 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c @@ -108,8 +108,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c index 30e249c..fae54c9 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c @@ -108,8 +108,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c index c44ce52..ef36ebf 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c @@ -350,8 +350,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_COMM0_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c index 6bfba36..7d5cae5 100644 --- a/src/mainboard/intel/kblrvp/chromeos.c +++ b/src/mainboard/intel/kblrvp/chromeos.c @@ -58,8 +58,4 @@ CROS_GPIO_WP_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c index 5886726..254f6b6 100644 --- a/src/mainboard/intel/kunimitsu/chromeos.c +++ b/src/mainboard/intel/kunimitsu/chromeos.c @@ -29,8 +29,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c index 8d7778c..7a40e76 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c @@ -348,8 +348,4 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__weak variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_WEAK_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index f4543aa..56d50da 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -40,8 +40,4 @@ CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 448aa41..3a4dd28 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -135,8 +135,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c index 18dab08..9d98590 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c @@ -131,8 +131,4 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index a154b7c..57d51e79 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -35,8 +35,4 @@ CROS_GPIO_WP_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 16d5896..3943d76 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -78,8 +78,4 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 785bde4..70ca217 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -69,8 +69,4 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *variant_cros_gpios(size_t *num) -{ - *num = ARRAY_SIZE(cros_gpios); - return cros_gpios; -} +DECLARE_CROS_GPIOS(cros_gpios); diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 47c154a..f9417fc 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -107,4 +107,18 @@ const struct cros_gpio *variant_cros_gpios(size_t *num); +#define DECLARE_CROS_GPIOS(x) \ + const struct cros_gpio *variant_cros_gpios(size_t *num) \ + { \ + *num = ARRAY_SIZE(x); \ + return x; \ + } + +#define DECLARE_WEAK_CROS_GPIOS(x) \ + const struct cros_gpio *__weak variant_cros_gpios(size_t *num) \ + { \ + *num = ARRAY_SIZE(x); \ + return x; \ + } + #endif /* __CHROMEOS_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/58899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88406fa1b54312616e6717af3d924436dc4ff1a6 Gerrit-Change-Number: 58899 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: [WIP] ChromeOS: Move cros_get_gpio_value()
by Kyösti Mälkki (Code Review) Nov. 3, 2021

Nov. 3, 2021

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58898 ) Change subject: [WIP] ChromeOS: Move cros_get_gpio_value() ...................................................................... [WIP] ChromeOS: Move cros_get_gpio_value() Change-Id: Id2a8427e8cd34abde98a267bd086eb4143433d0b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/google/deltaur/chromeos.c M src/mainboard/google/drallion/chromeos.c M src/mainboard/google/sarien/chromeos.c M src/vendorcode/google/chromeos/acpi.c M src/vendorcode/google/chromeos/chromeos.h 5 files changed, 24 insertions(+), 61 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/58898/1 diff --git a/src/mainboard/google/deltaur/chromeos.c b/src/mainboard/google/deltaur/chromeos.c index 8c9e1b7..da8eb02c 100644 --- a/src/mainboard/google/deltaur/chromeos.c +++ b/src/mainboard/google/deltaur/chromeos.c @@ -31,27 +31,6 @@ lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -static int cros_get_gpio_value(int type) -{ - const struct cros_gpio *cros_gpios; - size_t i, num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - for (i = 0; i < num_gpios; i++) { - const struct cros_gpio *gpio = &cros_gpios[i]; - if (gpio->type == type) { - int state = gpio_get(gpio->gpio_num); - if (gpio->polarity == CROS_GPIO_ACTIVE_LOW) - return !state; - else - return state; - } - } - return 0; -} - - int get_write_protect_state(void) { return cros_get_gpio_value(CROS_GPIO_WP); diff --git a/src/mainboard/google/drallion/chromeos.c b/src/mainboard/google/drallion/chromeos.c index f418cc1..886f055 100644 --- a/src/mainboard/google/drallion/chromeos.c +++ b/src/mainboard/google/drallion/chromeos.c @@ -29,27 +29,6 @@ lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -static int cros_get_gpio_value(int type) -{ - const struct cros_gpio *cros_gpios; - size_t i, num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - for (i = 0; i < num_gpios; i++) { - const struct cros_gpio *gpio = &cros_gpios[i]; - if (gpio->type == type) { - int state = gpio_get(gpio->gpio_num); - if (gpio->polarity == CROS_GPIO_ACTIVE_LOW) - return !state; - else - return state; - } - } - return 0; -} - - int get_write_protect_state(void) { return cros_get_gpio_value(CROS_GPIO_WP); diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index 96ada16..455ce5a 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -27,25 +27,6 @@ lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -static int cros_get_gpio_value(int type) -{ - const struct cros_gpio *cros_gpios; - size_t i, num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - for (i = 0; i < num_gpios; i++) { - const struct cros_gpio *gpio = &cros_gpios[i]; - if (gpio->type == type) { - int state = gpio_get(gpio->gpio_num); - if (gpio->polarity == CROS_GPIO_ACTIVE_LOW) - return !state; - else - return state; - } - } - return 0; -} int get_write_protect_state(void) diff --git a/src/vendorcode/google/chromeos/acpi.c b/src/vendorcode/google/chromeos/acpi.c index 383cd31..3cc820f 100644 --- a/src/vendorcode/google/chromeos/acpi.c +++ b/src/vendorcode/google/chromeos/acpi.c @@ -38,3 +38,25 @@ acpigen_pop_len(); } + +#if CONFIG(GENERIC_GPIO_LIB) +int cros_get_gpio_value(int type) +{ + const struct cros_gpio *cros_gpios; + size_t i, num_gpios = 0; + + cros_gpios = variant_cros_gpios(&num_gpios); + + for (i = 0; i < num_gpios; i++) { + const struct cros_gpio *gpio = &cros_gpios[i]; + if (gpio->type == type) { + int state = gpio_get(gpio->gpio_num); + if (gpio->polarity == CROS_GPIO_ACTIVE_LOW) + return !state; + else + return state; + } + } + return 0; +} +#endif diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 693336a..47c154a 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -48,6 +48,8 @@ */ void chromeos_acpi_gpio_generate(void); +int cros_get_gpio_value(int type); + enum { CROS_GPIO_REC = 1, /* Recovery */ CROS_GPIO_DEPRECATED_DEV = 2, /* Developer; -- To view, visit https://review.coreboot.org/c/coreboot/+/58898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2a8427e8cd34abde98a267bd086eb4143433d0b Gerrit-Change-Number: 58898 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: [RFC] ChromeOS: Promote variant_cros_gpio()
by Kyösti Mälkki (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Jason Glenesk, Marshall Dawson, Tim Wawrzynczak, Nick Vaccaro, Felix Held. Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58897 ) Change subject: [RFC] ChromeOS: Promote variant_cros_gpio() ...................................................................... [RFC] ChromeOS: Promote variant_cros_gpio() The only purpose of mainboard_chromeos_acpi_generate() was to pass cros_gpio array for ACPI \\OIPG package generation. Promote variant_cros_gpio() from baseboards to ChromeOS declaration. Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/amd/majolica/chromeos.c M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/auron/chromeos.c M src/mainboard/google/beltino/chromeos.c M src/mainboard/google/brya/chromeos.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/cyan/chromeos.c M src/mainboard/google/dedede/chromeos.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/deltaur/chromeos.c M src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/drallion/chromeos.c M src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h M src/mainboard/google/eve/chromeos.c M src/mainboard/google/fizz/chromeos.c M src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/glados/chromeos.c M src/mainboard/google/guybrush/chromeos.c M src/mainboard/google/hatch/chromeos.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/jecht/chromeos.c M src/mainboard/google/kahlee/chromeos.c M src/mainboard/google/link/chromeos.c M src/mainboard/google/octopus/chromeos.c M src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/poppy/chromeos.c M src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/rambi/chromeos.c M src/mainboard/google/reef/chromeos.c M src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h M src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h M src/mainboard/google/slippy/chromeos.c M src/mainboard/google/stout/chromeos.c M src/mainboard/google/volteer/chromeos.c M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/zork/chromeos.c M src/mainboard/intel/adlrvp/chromeos.c M src/mainboard/intel/adlrvp/include/baseboard/variants.h M src/mainboard/intel/baskingridge/chromeos.c M src/mainboard/intel/coffeelake_rvp/chromeos.c M src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/emeraldlake2/chromeos.c M src/mainboard/intel/glkrvp/chromeos.c M src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/icelake_rvp/chromeos.c M src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/jasperlake_rvp/chromeos.c M src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/kblrvp/chromeos.c M src/mainboard/intel/kunimitsu/chromeos.c M src/mainboard/intel/shadowmountain/chromeos.c M src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/strago/chromeos.c M src/mainboard/intel/tglrvp/chromeos.c M src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/wtm2/chromeos.c M src/mainboard/samsung/lumpy/chromeos.c M src/mainboard/samsung/stumpy/chromeos.c M src/vendorcode/google/chromeos/acpi.c M src/vendorcode/google/chromeos/chromeos.h M src/vendorcode/google/chromeos/gnvs.c 65 files changed, 87 insertions(+), 266 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/58897/1 diff --git a/src/mainboard/amd/majolica/chromeos.c b/src/mainboard/amd/majolica/chromeos.c index c73e047..239b530 100644 --- a/src/mainboard/amd/majolica/chromeos.c +++ b/src/mainboard/amd/majolica/chromeos.c @@ -16,11 +16,9 @@ return 0; } -static const struct cros_gpio cros_gpios[] = { - /* No ChromeOS GPIOs */ -}; - -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + /* No ChromeOS GPIOs */ + *num = 0; + return NULL; } diff --git a/src/mainboard/emulation/qemu-q35/chromeos.c b/src/mainboard/emulation/qemu-q35/chromeos.c index 1af2e02..4a5a409 100644 --- a/src/mainboard/emulation/qemu-q35/chromeos.c +++ b/src/mainboard/emulation/qemu-q35/chromeos.c @@ -49,7 +49,8 @@ CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, "QEMU"), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index 50eeddc..849d86a 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -28,7 +28,8 @@ CROS_GPIO_WP_AH(CROS_WP_GPIO, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index a33caca..e378103 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -61,7 +61,8 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/brya/chromeos.c b/src/mainboard/google/brya/chromeos.c index add7346..a0e5c2e 100644 --- a/src/mainboard/google/brya/chromeos.c +++ b/src/mainboard/google/brya/chromeos.c @@ -22,10 +22,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index 3e0fd05..55058f4 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -15,7 +15,6 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_gpio_override_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); const struct pad_config *variant_romstage_gpio_table(size_t *num); const struct mb_cfg *variant_memory_params(void); diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index e43d442..202c767 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -75,7 +75,8 @@ CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/cyan/chromeos.c b/src/mainboard/google/cyan/chromeos.c index b88862c..a343229 100644 --- a/src/mainboard/google/cyan/chromeos.c +++ b/src/mainboard/google/cyan/chromeos.c @@ -58,7 +58,8 @@ CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/dedede/chromeos.c b/src/mainboard/google/dedede/chromeos.c index fb904cc..a0e5c2e 100644 --- a/src/mainboard/google/dedede/chromeos.c +++ b/src/mainboard/google/dedede/chromeos.c @@ -22,11 +22,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index 78e44b4..aef3075 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -13,7 +13,6 @@ const struct pad_config *variant_base_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); const struct pad_config *variant_sleep_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); const struct pad_config *variant_override_gpio_table(size_t *num); /** diff --git a/src/mainboard/google/deltaur/chromeos.c b/src/mainboard/google/deltaur/chromeos.c index 9d3929e..8c9e1b7 100644 --- a/src/mainboard/google/deltaur/chromeos.c +++ b/src/mainboard/google/deltaur/chromeos.c @@ -51,15 +51,6 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *cros_gpios; - size_t num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - chromeos_acpi_gpio_generate(cros_gpios, num_gpios); -} int get_write_protect_state(void) { diff --git a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h index 7a4ed08..a54477a 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stddef.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -16,8 +15,6 @@ const struct pad_config *variant_early_gpio_table(size_t *num); const struct pad_config *variant_override_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); - const struct mb_cfg *variant_memory_params(void); void variant_memory_init(FSP_M_CONFIG *mem_cfg); diff --git a/src/mainboard/google/drallion/chromeos.c b/src/mainboard/google/drallion/chromeos.c index d92ebb1..f418cc1 100644 --- a/src/mainboard/google/drallion/chromeos.c +++ b/src/mainboard/google/drallion/chromeos.c @@ -49,15 +49,6 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *cros_gpios; - size_t num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - chromeos_acpi_gpio_generate(cros_gpios, num_gpios); -} int get_write_protect_state(void) { diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h index 22a2d45..db0b3a9 100644 --- a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h +++ b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h @@ -29,7 +29,4 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -struct cros_gpio; -const struct cros_gpio *variant_cros_gpios(size_t *num); - #endif diff --git a/src/mainboard/google/eve/chromeos.c b/src/mainboard/google/eve/chromeos.c index 11931c6..8297049 100644 --- a/src/mainboard/google/eve/chromeos.c +++ b/src/mainboard/google/eve/chromeos.c @@ -30,7 +30,8 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/fizz/chromeos.c b/src/mainboard/google/fizz/chromeos.c index a74c2f7..8c0646d 100644 --- a/src/mainboard/google/fizz/chromeos.c +++ b/src/mainboard/google/fizz/chromeos.c @@ -26,11 +26,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h index cf22926..ae5eeff 100644 --- a/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/gpio.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -14,8 +13,6 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); - void variant_smi_sleep(u8 slp_typ); struct nhlt; diff --git a/src/mainboard/google/glados/chromeos.c b/src/mainboard/google/glados/chromeos.c index 6a1f0b4..2acf5d7 100644 --- a/src/mainboard/google/glados/chromeos.c +++ b/src/mainboard/google/glados/chromeos.c @@ -29,7 +29,8 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/guybrush/chromeos.c b/src/mainboard/google/guybrush/chromeos.c index df99e64..ee7a0d4 100644 --- a/src/mainboard/google/guybrush/chromeos.c +++ b/src/mainboard/google/guybrush/chromeos.c @@ -22,9 +22,10 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } void mainboard_spi_fast_speed_override(uint8_t *fast_speed) diff --git a/src/mainboard/google/hatch/chromeos.c b/src/mainboard/google/hatch/chromeos.c index ee54ade..882a01c 100644 --- a/src/mainboard/google/hatch/chromeos.c +++ b/src/mainboard/google/hatch/chromeos.c @@ -25,12 +25,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *cros_gpios; - size_t num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - chromeos_acpi_gpio_generate(cros_gpios, num_gpios); -} diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h index 2f06a55..125f738 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/cnl_memcfg_init.h> #include <soc/gpio.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -28,9 +27,6 @@ /* Return GPIO pads that need to be configured before ramstage */ const struct pad_config *variant_early_gpio_table(size_t *num); -/* Return ChromeOS gpio table and fill in number of entries. */ -const struct cros_gpio *variant_cros_gpios(size_t *num); - /* Modify devictree settings during ramstage. */ void variant_devtree_update(void); diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index cf59636..0c2ff7d 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -63,7 +63,8 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/kahlee/chromeos.c b/src/mainboard/google/kahlee/chromeos.c index b85f976..45be2f9 100644 --- a/src/mainboard/google/kahlee/chromeos.c +++ b/src/mainboard/google/kahlee/chromeos.c @@ -28,7 +28,8 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index 540803c..43021b3 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -33,7 +33,8 @@ CROS_GPIO_WP_AH(57, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/octopus/chromeos.c b/src/mainboard/google/octopus/chromeos.c index 03d3b4f..3cb42c1 100644 --- a/src/mainboard/google/octopus/chromeos.c +++ b/src/mainboard/google/octopus/chromeos.c @@ -25,11 +25,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h index 5f2c6e2..bbc5d56 100644 --- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of * entries for each table. */ @@ -23,8 +22,6 @@ const struct lpddr4_cfg *variant_lpddr4_config(void); /* Return memory SKU for the board. */ size_t variant_memory_sku(void); -/* Return ChromeOS gpio table and fill in number of entries. */ -const struct cros_gpio *variant_cros_gpios(size_t *num); /* Seed the NHLT tables with the board specific information. */ struct nhlt; diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index 9f4be26..328ad59 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -61,7 +61,8 @@ CROS_GPIO_WP_AL(70, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/poppy/chromeos.c b/src/mainboard/google/poppy/chromeos.c index 5dd1e98..b86a279e 100644 --- a/src/mainboard/google/poppy/chromeos.c +++ b/src/mainboard/google/poppy/chromeos.c @@ -30,11 +30,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h index 1fdc32f..9d3e7f0 100644 --- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/gpio.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -20,7 +19,6 @@ */ const struct pad_config *variant_romstage_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); /* Config gpio by different sku id */ const struct pad_config *variant_sku_gpio_table(size_t *num); diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c index f9a1718..150a7d2 100644 --- a/src/mainboard/google/rambi/chromeos.c +++ b/src/mainboard/google/rambi/chromeos.c @@ -39,7 +39,8 @@ CROS_GPIO_WP_AH(0x2006, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c index 94d76b9..57bddfa 100644 --- a/src/mainboard/google/reef/chromeos.c +++ b/src/mainboard/google/reef/chromeos.c @@ -25,11 +25,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h index 5b08c6a..c9b8b9d 100644 --- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> /* Return the sku id based off the strapping resistors attached to SoC. */ uint8_t sku_strapping_value(void); @@ -29,9 +28,6 @@ /* Set variant board sku to ec by sku id */ void variant_board_ec_set_skuid(void); -/* Return ChromeOS gpio table and fill in number of entries. */ -const struct cros_gpio *variant_cros_gpios(size_t *num); - /* Seed the NHLT tables with the board specific information. */ struct nhlt; void variant_nhlt_oem_overrides(const char **oem_id, diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index f49b639..96ada16 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -47,15 +47,6 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *cros_gpios; - size_t num_gpios = 0; - - cros_gpios = variant_cros_gpios(&num_gpios); - - chromeos_acpi_gpio_generate(cros_gpios, num_gpios); -} int get_write_protect_state(void) { diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h b/src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h index f56a8b5..f56059c 100644 --- a/src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h +++ b/src/mainboard/google/sarien/variants/arcada/include/variant/gpio.h @@ -15,7 +15,4 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -struct cros_gpio; -const struct cros_gpio *variant_cros_gpios(size_t *num); - #endif diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h b/src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h index f56a8b5..f56059c 100644 --- a/src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h +++ b/src/mainboard/google/sarien/variants/sarien/include/variant/gpio.h @@ -15,7 +15,4 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -struct cros_gpio; -const struct cros_gpio *variant_cros_gpios(size_t *num); - #endif diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 4fffd45..3916a72 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -26,7 +26,8 @@ CROS_GPIO_WP_AH(58, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index ed78b37..4508b8a 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -83,7 +83,8 @@ CROS_GPIO_WP_AL(7, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/google/volteer/chromeos.c b/src/mainboard/google/volteer/chromeos.c index abd50c5..ceb98cb 100644 --- a/src/mainboard/google/volteer/chromeos.c +++ b/src/mainboard/google/volteer/chromeos.c @@ -24,11 +24,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h index ba4bf7f..94c39d9 100644 --- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stddef.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -17,8 +16,6 @@ const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num); const struct pad_config *variant_override_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); - const struct mb_cfg *variant_memory_params(void); int variant_memory_sku(void); void memcfg_variant_init(FSPM_UPD *mupd); diff --git a/src/mainboard/google/zork/chromeos.c b/src/mainboard/google/zork/chromeos.c index b581b90..6443011 100644 --- a/src/mainboard/google/zork/chromeos.c +++ b/src/mainboard/google/zork/chromeos.c @@ -27,7 +27,8 @@ CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c index 244b942..30e87c1 100644 --- a/src/mainboard/intel/adlrvp/chromeos.c +++ b/src/mainboard/intel/adlrvp/chromeos.c @@ -39,11 +39,3 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/adlrvp/include/baseboard/variants.h b/src/mainboard/intel/adlrvp/include/baseboard/variants.h index 9ab05f6..796a2da 100644 --- a/src/mainboard/intel/adlrvp/include/baseboard/variants.h +++ b/src/mainboard/intel/adlrvp/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> enum adl_boardid { /* ADL-P LPDDR4 RVPs */ @@ -26,9 +25,6 @@ ADL_M_LP5 = 0x2, }; -/* The next set of functions return the gpio table and fill in the number of - * entries for each table. */ -const struct cros_gpio *variant_cros_gpios(size_t *num); /* Functions to configure GPIO as per variant schematics */ void variant_configure_gpio_pads(void); void variant_configure_early_gpio_pads(void); diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 2b14014..4c1590e 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -45,7 +45,8 @@ CROS_GPIO_WP_AL(22, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.c b/src/mainboard/intel/coffeelake_rvp/chromeos.c index 5fb7922..b0a15d4 100644 --- a/src/mainboard/intel/coffeelake_rvp/chromeos.c +++ b/src/mainboard/intel/coffeelake_rvp/chromeos.c @@ -34,11 +34,3 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h index b7a1616..6ae25d4 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/cnl_memcfg_init.h> #include <soc/gpio.h> -#include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of * entries for each table. */ @@ -13,8 +12,6 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); - /* Return memory configuration structure. */ const struct cnl_mb_cfg *variant_memcfg_config(void); diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index e0f5faf..932a6d7 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -42,7 +42,8 @@ CROS_GPIO_WP_AL(48, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c index 5944406..9b2d232 100644 --- a/src/mainboard/intel/glkrvp/chromeos.c +++ b/src/mainboard/intel/glkrvp/chromeos.c @@ -24,15 +24,6 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} - int __weak get_lid_switch(void) { return -1; diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h index f1df937..24c28f9 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> -#include <vendorcode/google/chromeos/chromeos.h> /** * variant_board_id() - Get the board id for the current board variant @@ -27,9 +26,6 @@ /* Return memory SKU for the board. */ size_t variant_memory_sku(void); -/* Return ChromeOS gpio table and fill in number of entries. */ -const struct cros_gpio *variant_cros_gpios(size_t *num); - /* Seed the NHLT tables with the board specific information. */ struct nhlt; void variant_nhlt_init(struct nhlt *nhlt); diff --git a/src/mainboard/intel/icelake_rvp/chromeos.c b/src/mainboard/intel/icelake_rvp/chromeos.c index c98c4f8..c433d2a 100644 --- a/src/mainboard/intel/icelake_rvp/chromeos.c +++ b/src/mainboard/intel/icelake_rvp/chromeos.c @@ -34,11 +34,3 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h index ccbadca..48d6c1c 100644 --- a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h @@ -4,13 +4,11 @@ #define __BASEBOARD_VARIANTS_H__ #include <soc/gpio.h> -#include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of * entries for each table. */ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/intel/jasperlake_rvp/chromeos.c b/src/mainboard/intel/jasperlake_rvp/chromeos.c index c59fac8..097c015 100644 --- a/src/mainboard/intel/jasperlake_rvp/chromeos.c +++ b/src/mainboard/intel/jasperlake_rvp/chromeos.c @@ -36,11 +36,3 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h index e2e331a..120833f 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> -#include <vendorcode/google/chromeos/chromeos.h> enum jsl_board_id { jsl_ddr4 = 1, @@ -18,7 +17,6 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); const struct mb_cfg *variant_memcfg_config(uint8_t board_id); #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c index 270c84d..6bfba36 100644 --- a/src/mainboard/intel/kblrvp/chromeos.c +++ b/src/mainboard/intel/kblrvp/chromeos.c @@ -58,7 +58,8 @@ CROS_GPIO_WP_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c index 3b8725f..5886726 100644 --- a/src/mainboard/intel/kunimitsu/chromeos.c +++ b/src/mainboard/intel/kunimitsu/chromeos.c @@ -29,7 +29,8 @@ CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/shadowmountain/chromeos.c b/src/mainboard/intel/shadowmountain/chromeos.c index 35a54a8..04455a5 100644 --- a/src/mainboard/intel/shadowmountain/chromeos.c +++ b/src/mainboard/intel/shadowmountain/chromeos.c @@ -24,11 +24,3 @@ return gpio_get(GPIO_PCH_WP); } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h index a145ac9..e8886d9 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/include/baseboard/variants.h @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> #include <stddef.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * The next set of functions return the gpio table and fill in the number of @@ -14,7 +13,6 @@ */ const struct pad_config *variant_base_gpio_table(size_t *num); const struct pad_config *variant_override_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); void variant_configure_early_gpio_pads(void); diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c index f01f7f1..f4543aa 100644 --- a/src/mainboard/intel/strago/chromeos.c +++ b/src/mainboard/intel/strago/chromeos.c @@ -40,7 +40,8 @@ CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/intel/tglrvp/chromeos.c b/src/mainboard/intel/tglrvp/chromeos.c index 7da61be..58e9b23 100644 --- a/src/mainboard/intel/tglrvp/chromeos.c +++ b/src/mainboard/intel/tglrvp/chromeos.c @@ -37,11 +37,3 @@ return 0; } -void mainboard_chromeos_acpi_generate(void) -{ - const struct cros_gpio *gpios; - size_t num; - - gpios = variant_cros_gpios(&num); - chromeos_acpi_gpio_generate(gpios, num); -} diff --git a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h index fbb86f7..45ae15e 100644 --- a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h @@ -5,14 +5,12 @@ #include <soc/gpio.h> #include <soc/meminit.h> -#include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of * entries for each table. */ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); -const struct cros_gpio *variant_cros_gpios(size_t *num); size_t variant_memory_sku(void); const struct mb_cfg *variant_memory_params(void); diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 996eee2..a154b7c 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -35,7 +35,8 @@ CROS_GPIO_WP_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index d5e20bd..16d5896 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -78,7 +78,8 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index c8fbf98..785bde4 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -69,7 +69,8 @@ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; -void mainboard_chromeos_acpi_generate(void) +const struct cros_gpio *variant_cros_gpios(size_t *num) { - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; } diff --git a/src/vendorcode/google/chromeos/acpi.c b/src/vendorcode/google/chromeos/acpi.c index 5a54d70..383cd31 100644 --- a/src/vendorcode/google/chromeos/acpi.c +++ b/src/vendorcode/google/chromeos/acpi.c @@ -6,11 +6,16 @@ #endif #include "chromeos.h" -void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num) +void chromeos_acpi_gpio_generate(void) { - size_t i; + const struct cros_gpio *gpios; + size_t i, num; int gpio_num; + gpios = variant_cros_gpios(&num); + if (!gpios) + return; + acpigen_write_scope("\\"); acpigen_write_name("OIPG"); diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index b770525..693336a 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -44,16 +44,9 @@ enum cb_err get_dsm_calibration_from_key(const char *key, uint64_t *value); /* - * Create the OIPG package containing the Chrome OS gpios described by - * the chromeos_gpio array. - */ -struct cros_gpio; -void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num); - -/* * Declaration for mainboards to use to generate ACPI-specific Chrome OS needs. */ -void mainboard_chromeos_acpi_generate(void); +void chromeos_acpi_gpio_generate(void); enum { CROS_GPIO_REC = 1, /* Recovery */ @@ -110,4 +103,6 @@ #define CROS_GPIO_PE_AH(num, dev) \ CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev) +const struct cros_gpio *variant_cros_gpios(size_t *num); + #endif /* __CHROMEOS_H__ */ diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index b0a1884..36e407e 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -105,8 +105,7 @@ acpigen_write_opregion(&cnvs_op); acpigen_pop_len(); - /* Usually this creates OIPG package for GPIOs. */ - mainboard_chromeos_acpi_generate(); + chromeos_acpi_gpio_generate(); } static struct device_operations crhw_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/58897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c Gerrit-Change-Number: 58897 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: ChromeOS: Add legacy mainboard_ec_running_ro()
by Kyösti Mälkki (Code Review) Nov. 3, 2021

Nov. 3, 2021

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58896 ) Change subject: ChromeOS: Add legacy mainboard_ec_running_ro() ...................................................................... ChromeOS: Add legacy mainboard_ec_running_ro() TBD: S3 resume path case Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/stout/chromeos.c M src/mainboard/samsung/lumpy/chromeos.c M src/vendorcode/google/chromeos/chromeos.h M src/vendorcode/google/chromeos/gnvs.c 6 files changed, 29 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/58896/1 diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 356e97b..e43d442 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -61,6 +61,15 @@ return ec_rec_mode; } +bool mainboard_ec_running_ro(void) +{ + // TODO: MLR + // The firmware read/write status is a "virtual" switch and + // will be handled elsewhere. Until then hard-code to + // read/write instead of read-only for developer mode. + return false; +} + static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME), @@ -68,12 +77,5 @@ void mainboard_chromeos_acpi_generate(void) { - // TODO: MLR - // The firmware read/write status is a "virtual" switch and - // will be handled elsewhere. Until then hard-code to - // read/write instead of read-only for developer mode. - if (CONFIG(CHROMEOS_NVS)) - chromeos_set_ecfw_rw(); - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index 03b0d47..9f4be26 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -51,7 +51,7 @@ return gpio; } -static int parrot_ec_running_ro(void) +bool mainboard_ec_running_ro(void) { return !get_gpio(68); } @@ -63,8 +63,5 @@ void mainboard_chromeos_acpi_generate(void) { - if (CONFIG(CHROMEOS_NVS) && !parrot_ec_running_ro()) - chromeos_set_ecfw_rw(); - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 07fdee3..ed78b37 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -47,8 +47,7 @@ * The recovery-switch is virtual on Stout and is handled via the EC. * Stout recovery mode is only valid if RTC_PWR_STS is set and the EC * indicated the recovery keys were pressed. We use a global flag for - * rec_mode to be used after RTC_POWER_STS has been cleared. This function - * is complicated by romstage support, which can't use a global variable. + * rec_mode to be used after RTC_POWER_STS has been cleared. * Note, rec_mode is the only time the EC is in RO mode, otherwise, RW. */ int get_recovery_mode_switch(void) @@ -73,6 +72,11 @@ return ec_in_rec_mode; } +bool mainboard_ec_running_ro(void) +{ + return !!get_recovery_mode_switch(); +} + static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), @@ -81,8 +85,5 @@ void mainboard_chromeos_acpi_generate(void) { - if (CONFIG(CHROMEOS_NVS) && !get_recovery_mode_switch()) - chromeos_set_ecfw_rw(); - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index aa96153..d5e20bd 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -68,6 +68,11 @@ pci_s_write_config32(dev, SATA_SP, flags); } +bool mainboard_ec_running_ro(void) +{ + return !ec_read(0xcb); +} + static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), @@ -75,8 +80,5 @@ void mainboard_chromeos_acpi_generate(void) { - if (CONFIG(CHROMEOS_NVS) && ec_read(0xcb)) - chromeos_set_ecfw_rw(); - chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 391f7c9..b770525 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -30,7 +30,7 @@ void cbmem_add_vpd_calibration_data(void); void chromeos_set_me_hash(u32*, int); void chromeos_set_ramoops(void *ram_oops, size_t size); -void chromeos_set_ecfw_rw(void); +bool mainboard_ec_running_ro(void); void register_chromeos_device(void); /** diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index 7f76597..b0a1884 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -57,8 +57,13 @@ /* EC can override to ECFW_RW. */ chromeos_acpi->vbt2 = ACTIVE_ECFW_RO; - if (CONFIG(EC_GOOGLE_CHROMEEC) && !google_ec_running_ro()) - chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; + if (CONFIG(EC_GOOGLE_CHROMEEC)) { + if (!google_ec_running_ro()) + chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; + } else { + if (!mainboard_ec_running_ro()) + chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; + } } void chromeos_set_me_hash(u32 *hash, int len) @@ -81,13 +86,6 @@ chromeos_acpi->ramoops_len = size; } -void chromeos_set_ecfw_rw(void) -{ - if (!chromeos_acpi) - return; - chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; -} - void smbios_type0_bios_version(uintptr_t address) { if (!chromeos_acpi) -- To view, visit https://review.coreboot.org/c/coreboot/+/58896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Gerrit-Change-Number: 58896 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: ChromeOS: Create pseudo-device ACPI NVS
by Kyösti Mälkki (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Marshall Dawson, Nick Vaccaro, Julius Werner, Felix Held. Hello Lance Zhao, build bot (Jenkins), Jason Glenesk, Furquan Shaikh, Marshall Dawson, Tim Wawrzynczak, Nick Vaccaro, Julius Werner, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55502 to look at the new patch set (#10). Change subject: ChromeOS: Create pseudo-device ACPI NVS ...................................................................... ChromeOS: Create pseudo-device ACPI NVS Treate allocation and initialisation of ChromeOS related NVS as a device and move related calls into device-model. Move the CNVS OperationRegion from \CNVS to \CRHW.CNVS with local scope reference. Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/acpi.c M src/acpi/acpigen_extern.asl M src/acpi/dsdt_top.asl M src/include/acpi/acpi.h M src/lib/hardwaremain.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/google/auron/mainboard.c M src/mainboard/google/beltino/mainboard.c M src/mainboard/google/brya/mainboard.c M src/mainboard/google/butterfly/mainboard.c M src/mainboard/google/cyan/mainboard.c M src/mainboard/google/dedede/mainboard.c M src/mainboard/google/deltaur/mainboard.c M src/mainboard/google/drallion/ramstage.c M src/mainboard/google/eve/mainboard.c M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/glados/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/hatch/ramstage.c M src/mainboard/google/jecht/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/link/mainboard.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/parrot/mainboard.c M src/mainboard/google/poppy/mainboard.c M src/mainboard/google/rambi/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/sarien/ramstage.c M src/mainboard/google/slippy/mainboard.c M src/mainboard/google/stout/mainboard.c M src/mainboard/google/volteer/mainboard.c M src/mainboard/google/zork/mainboard.c M src/mainboard/intel/adlrvp/mainboard.c M src/mainboard/intel/baskingridge/mainboard.c M src/mainboard/intel/coffeelake_rvp/mainboard.c M src/mainboard/intel/emeraldlake2/mainboard.c M src/mainboard/intel/glkrvp/mainboard.c M src/mainboard/intel/icelake_rvp/mainboard.c M src/mainboard/intel/jasperlake_rvp/mainboard.c M src/mainboard/intel/kblrvp/mainboard.c M src/mainboard/intel/kunimitsu/mainboard.c M src/mainboard/intel/shadowmountain/mainboard.c M src/mainboard/intel/strago/mainboard.c M src/mainboard/intel/tglrvp/mainboard.c M src/mainboard/intel/wtm2/mainboard.c M src/mainboard/samsung/lumpy/mainboard.c M src/mainboard/samsung/stumpy/mainboard.c M src/vendorcode/google/chromeos/acpi.c M src/vendorcode/google/chromeos/acpi/chromeos.asl M src/vendorcode/google/chromeos/acpi/gnvs.asl M src/vendorcode/google/chromeos/acpi/ramoops.asl M src/vendorcode/google/chromeos/chromeos.h M src/vendorcode/google/chromeos/gnvs.c M src/vendorcode/google/chromeos/gnvs.h 54 files changed, 46 insertions(+), 152 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/55502/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/55502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9 Gerrit-Change-Number: 55502 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/prodrive/hermes: Configure pink rear vref based on eeprom
by Angel Pons (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Justin van Son, Christian Walter, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure pink rear vref based on eeprom ...................................................................... Patch Set 1: (1 comment) File src/mainboard/prodrive/hermes/variants/r04/hda_verb.c: https://review.coreboot.org/c/coreboot/+/58879/comment/2b404af9_ae73731a PS1, Line 89: get_port_c_vref_cfg(board_cfg->blue_rear_vref), > No, this one uses some kind of hidden register in the codec. […] Ack, thanks for confirming -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 03 Nov 2021 11:30:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Justin van Son <justin.van.son(a)prodrive-technologies.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: configs: Add config for Prodrive Hermes
by Justin van Son (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons, Arthur Heymans. Justin van Son has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57168 ) Change subject: configs: Add config for Prodrive Hermes ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62e79d3143851bf14dfdbe70e60c60f13dd06c3f Gerrit-Change-Number: 57168 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Nov 2021 11:26:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/prodrive/hermes: Configure pink rear vref based on eeprom
by Justin van Son (Code Review) Nov. 3, 2021

Nov. 3, 2021

Attention is currently required from: Christian Walter, Angel Pons, Arthur Heymans. Justin van Son has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure pink rear vref based on eeprom ...................................................................... Patch Set 1: Code-Review+1 (3 comments) Patchset: PS1: Looks good File src/mainboard/prodrive/hermes/variants/r04/hda_verb.c: https://review.coreboot.org/c/coreboot/+/58879/comment/9b7e5741_d15624d4 PS1, Line 82: const u32 internal_config = get_internal_audio_cfg(board_cfg->internal_audio_connection); > > line over 96 characters […] actually, you can name it front_panel. Customer asked for more clear setting name https://review.coreboot.org/c/coreboot/+/58879/comment/c9455e97_7f617057 PS1, Line 89: get_port_c_vref_cfg(board_cfg->blue_rear_vref), > Hmmm, this one is probably wrong then No, this one uses some kind of hidden register in the codec. Realtek provided the registers here -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 03 Nov 2021 11:24:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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