coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/elkhartlake: Introduce Intel PSE
by Lean Sheng Tan (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Mario Scheithauer, Angel Pons, Subrata Banik, Lean Sheng Tan, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Nico Huber, Maulik V Vaghela, Paul Menzel, Mario Scheithauer, Subrata Banik, Michael Niewöhner, Werner Zeh, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55367 to look at the new patch set (#48). Change subject: soc/intel/elkhartlake: Introduce Intel PSE ...................................................................... soc/intel/elkhartlake: Introduce Intel PSE The Intel® Programmable Services Engine (Intel® PSE) is a dedicated offload engine for IoT functions powered by an ARM Cortex-M7 microcontroller. It provides independent, low-DMIPS computing and low-speed I/Os for IoT applications, plus dedicated services for real-time computing and time-sensitive synchronization. The PSE hosts new functions, including remote out-of-band device management, network proxy, embedded controller lite and sensor hub. This CL enables the user to provide the base address of the PSE FW blob which will then be loaded by the FSP-S onto the ARM controller. PSE FW will do the initialization work of PSE controller and it's peripherals. The loading of PSE FW should have negligible impact on boot time unless PSE controller could not locate PSE FW and FSP will attempt to redo PSE FW loading and wait for PSE handshake until it times out. Once PSE controller locate PSE FW, it will do initialization concurrently by itself with coreboot booting. It also adds PSE related FSP-S UPD settings which enables the setup of peripheral ownership (assigned to the PSE or x86 subsystem) and interrupts. These assignments need to take place at a given point in the boot process and cannot be changed later. To verify if PSE FW is loaded properly, the user could enable PchPseShellEnabled flag and the log will be printed at PSE UART 2. For further info please refer to doc #611825 (for HW overview) and #614110 (for PSE EDS). Signed-off-by: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Change-Id: Ifea08fb82fea18ef66bab04b3ce378e79a0afbf7 --- M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/elkhartlake/chip.h M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/elkhartlake/romstage/fsp_params.c 5 files changed, 170 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/55367/48 -- To view, visit https://review.coreboot.org/c/coreboot/+/55367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifea08fb82fea18ef66bab04b3ce378e79a0afbf7 Gerrit-Change-Number: 55367 Gerrit-PatchSet: 48 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640
by Wentao Qin (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Xuxin Xiong. Wentao Qin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58994 ) Change subject: google/trogdor: Update the power on sequence of ps8640 ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: LGTM -- To view, visit https://review.coreboot.org/c/coreboot/+/58994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Gerrit-Change-Number: 58994 Gerrit-PatchSet: 2 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Sat, 06 Nov 2021 08:37:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640
by Xuxin Xiong (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Wentao Qin. Hello build bot (Jenkins), Wentao Qin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58994 to look at the new patch set (#2). Change subject: google/trogdor: Update the power on sequence of ps8640 ...................................................................... google/trogdor: Update the power on sequence of ps8640 For the Qualcomm PBL configuration of GPIO, we need to initial the GPIOs for VDD33# and RST# at the beginning of coreboot. According to the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#. BUG=b:204637643 BRANCH=trogdor TEST=verified the waveform of ps8640 at coreboot phase. Signed-off-by: xuxinxiong <xuxinxiong(a)huaqin.corp-partner.google.com> Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 --- M src/mainboard/google/trogdor/chromeos.c M src/mainboard/google/trogdor/mainboard.c 2 files changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58994/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Gerrit-Change-Number: 58994 Gerrit-PatchSet: 2 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640
by Xuxin Xiong (Code Review) 06 Nov '21

06 Nov '21

Xuxin Xiong has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58994 ) Change subject: google/trogdor: Update the power on sequence of ps8640 ...................................................................... google/trogdor: Update the power on sequence of ps8640 For the Qualcomm PBL configuration of GPIO, we need to initial the GPIOs for VDD33# and PD# at the beginning of coreboot. According to the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#. BUG=b:204637643 BRANCH=trogdor TEST=verified the waveform of ps8640 at coreboot phase. Signed-off-by: xuxinxiong <xuxinxiong(a)huaqin.corp-partner.google.com> Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 --- M src/mainboard/google/trogdor/chromeos.c M src/mainboard/google/trogdor/mainboard.c 2 files changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58994/1 diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c index 9006000..90de1e4 100644 --- a/src/mainboard/google/trogdor/chromeos.c +++ b/src/mainboard/google/trogdor/chromeos.c @@ -22,6 +22,8 @@ } else { gpio_output(GPIO_EN_PP3300_DX_EDP, 0); gpio_output(GPIO_EDP_BRIDGE_ENABLE, 0); + gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 0); + gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0); } if (CONFIG(TROGDOR_HAS_FINGERPRINT)) { diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 1a60131..5499a07 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -106,12 +106,18 @@ gpio_output(GPIO_EN_PP3300_DX_EDP, 1); gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 1); - gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1); - gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0); /* - * According to ps8640 app note v0.6, wait for 2ms ("t1") after - * VDD33 goes high and then deassert RST. + * According to ps8640 v1.4 spec, and the raise time of vdd33 is a bit + * long, so wait for 4ms after VDD33 goes high and then deassert PD. + */ + mdelay(4); + + gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1); + + /* + * According to ps8640 app note v0.6, wait for 2ms after VDD33 goes + * high and then deassert RST. */ mdelay(2); -- To view, visit https://review.coreboot.org/c/coreboot/+/58994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Gerrit-Change-Number: 58994 Gerrit-PatchSet: 1 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drvs/intel/gma/acpi: Add methods to use MBOX3
by xin hua wang (Code Review) 06 Nov '21

06 Nov '21

xin hua wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27711 ) Change subject: drvs/intel/gma/acpi: Add methods to use MBOX3 ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: I have few Desktop and laptops that gets bsod acpi_bios_error in MS windows with the cause of "using area of menory already reversed to the system". Its due to this line in Device (BOX3) "OperationRegion (OPRG, SystemMemory, ASLS, 0x2000)" in the https://review.coreboot.org/c/coreboot/+/27711/7/src/drivers/intel/gma/acpi… file. If I remove the OperationRegion line MS windows boots, can anyone explain what this line is doing or a fix? thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/27711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Gerrit-Change-Number: 27711 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nathaniel Roach <nroach44(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: xin hua wang <xinhuawang0101(a)gmail.com> Gerrit-Comment-Date: Sat, 06 Nov 2021 06:53:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Bill XIE (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Patrick Rudolph, Angel Pons, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51671 ) Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... Patch Set 22: (1 comment) File src/arch/x86/bootblock.ld: https://review.coreboot.org/c/coreboot/+/51671/comment/5cafc570_ef2cec11 PS22, Line 57: _ID_SECTION_END - _ECFW_PTR > It should not happen, since _ID_SECTION_END is 0xffffff80 at minimum, and _ECFW_PTR is fixed at CONF […] It can only happen when someone messes up the code. -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 22 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Sat, 06 Nov 2021 06:35:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Bill XIE (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Patrick Rudolph, Angel Pons, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51671 ) Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... Patch Set 22: (1 comment) File src/arch/x86/bootblock.ld: https://review.coreboot.org/c/coreboot/+/51671/comment/94d48418_1d79857f PS22, Line 57: _ID_SECTION_END - _ECFW_PTR > Do we know what happens when this overflows? i.e. […] It should not happen, since _ID_SECTION_END is 0xffffff80 at minimum, and _ECFW_PTR is fixed at CONFIG_ECFW_PTR_ADDR, which is hidden when configuring and assigned to 0xffffff00 in src/ec/hp/kbc1126/Kconfig. -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 22 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Sat, 06 Nov 2021 06:32:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: timestamp: Add new helper functions
by Bora Guvendik (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Subrata Banik, Julius Werner, Angel Pons, Aaron Durbin. Bora Guvendik has uploaded a new patch set (#7) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/51445 ) Change subject: timestamp: Add new helper functions ...................................................................... timestamp: Add new helper functions 1. timestamp_rewind_base This function will rewind base_time in timestamp table using the delta provided in base_freq_mhz. * 1. Calculate base_delta_tick in ts->tick_freq_mhz using base_delta * ts->tick_freq_mhz / base_freq_mhz. * 2. Update all entries in timestamp table by adding base_delta_tick * 3. Update ts->base_time as ts->base_time - base_delta_tick 2. timestamp_add_relative * This function will add a new entry to timestamp table using the time_from_base expressed in freq_mhz * 1. Calculate time_from_base in ts->tick_freq_mhz using time_from_base * ts->tick_freq_mhz / freq_mhz. * 2. Call timestamp_add_table_entry using ts_table, id, time_from_base_tick TEST=Rewind the base timestamp, add relative timestamps and verify cbmem -t output Change-Id: I6b7065ed26e231fc898ae44bcc15cba6fb42b308 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/include/timestamp.h M src/lib/timestamp.c 2 files changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/51445/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/51445 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b7065ed26e231fc898ae44bcc15cba6fb42b308 Gerrit-Change-Number: 51445 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] soc/intel/braswell: Use SOC_INTEL_COMMON_BLOCK_I2C
by Kyösti Mälkki (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Furquan Shaikh, Werner Zeh, Aaron Durbin, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Werner Zeh, Aaron Durbin, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51631 to look at the new patch set (#3). Change subject: [WIP] soc/intel/braswell: Use SOC_INTEL_COMMON_BLOCK_I2C ...................................................................... [WIP] soc/intel/braswell: Use SOC_INTEL_COMMON_BLOCK_I2C FIXME: Variant google/cyan uses I2C1 speed 100 kHz, others 1 MHz FIXME: Do SCL step response measurements and fill devicetrees. Change-Id: I2d74a887f6b478fec7ff210fbc6b7da17b862b1c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/google/cyan/devicetree.cb M src/mainboard/google/cyan/variants/cyan/overridetree.cb M src/mainboard/google/cyan/variants/edgar/include/variant/onboard.h M src/mainboard/google/cyan/variants/kefka/include/variant/onboard.h M src/mainboard/google/cyan/variants/reks/include/variant/onboard.h M src/mainboard/google/cyan/variants/relm/include/variant/onboard.h M src/mainboard/google/cyan/variants/setzer/include/variant/onboard.h M src/mainboard/google/cyan/variants/terra/include/variant/onboard.h M src/mainboard/google/cyan/variants/ultima/include/variant/onboard.h M src/mainboard/google/cyan/variants/wizpig/include/variant/onboard.h M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi/lpss.asl M src/soc/intel/braswell/chip.c M src/soc/intel/braswell/chip.h M src/soc/intel/braswell/include/soc/iomap.h 15 files changed, 44 insertions(+), 126 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/51631/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d74a887f6b478fec7ff210fbc6b7da17b862b1c Gerrit-Change-Number: 51631 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] sb,soc/intel: Use SOC_INTEL_COMMON_BLOCK_I2C
by Kyösti Mälkki (Code Review) 06 Nov '21

06 Nov '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51630 to look at the new patch set (#3). Change subject: [WIP] sb,soc/intel: Use SOC_INTEL_COMMON_BLOCK_I2C ...................................................................... [WIP] sb,soc/intel: Use SOC_INTEL_COMMON_BLOCK_I2C Change-Id: I7300e62ebe4ce9760f4267f7d1a45f15c21737fd Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi/lpss.asl M src/soc/intel/baytrail/lpss.c M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/pch/acpi/serialio.asl M src/soc/intel/broadwell/pch/serialio.c M src/southbridge/intel/lynxpoint/Kconfig M src/southbridge/intel/lynxpoint/acpi/serialio.asl M src/southbridge/intel/lynxpoint/serialio.c 9 files changed, 51 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/51630/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7300e62ebe4ce9760f4267f7d1a45f15c21737fd Gerrit-Change-Number: 51630 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021