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Change subject: src/mb/brya: Enable crashlog on brya
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/59486/comment/5526ee9a_dadbbc55
PS6, Line 51: SOC_INTEL_CRASHLOG
Actually …
[View More]we don't want this enabled by default on the non-reference devices yet. It can be enabled in debug builds for now and also on brya0 and brask in Kconfig.name
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Change subject: soc/intel/alderlake: remove tmp bar assignment for cpu crashlog
......................................................................
Patch Set 9: Code-Review+2
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Change subject: acpi,Makefile: Add preload_acpi_dsdt
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Sorry, I won't hold up the patch forever (boot time is an important metric), I just share the same c […]
For now yeah... See https://review.…
[View More]coreboot.org/c/coreboot/+/59506/2
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Change subject: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
......................................................................
Patch Set 2: Code-Review+2
(2 comments)
Patchset:
PS2:
Thanks Ben!
File src/drivers/genesyslogic/gl9750/Kconfig:
https://review.coreboot.org/c/coreboot/+/59429/comment/…
[View More]f493e736_3a39d472
PS2, Line 6: regulators (3.3V-to-1.2V) and card power switch.
suggestion: add one more sentence like
```
Enabling this driver will disable L0s support, which will allow the device to
enter the PCIe L1 link state.
```
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Change subject: lib: Add a mutex
......................................................................
Patch Set 8:
(1 comment)
File src/include/mutex.h:
https://review.coreboot.org/c/coreboot/+/59320/comment/363f53c4_36ad82b0
PS7, Line 22: else if (CONFIG(COOP_MULTITASKING))
> This …
[View More]should be […]
I've been procrastinating on adding the ENV_. My plan was to do it when I added thread support for the other stages. But It makes sense to do it now.
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Change subject: acpi,Makefile: Add preload_acpi_dsdt
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS2:
Sorry, I won't hold up the patch forever (boot time is an important metric), I just share the same concerns stated …
[View More]below, largely of the fragility of sprinkling preload() calls ad-hoc throughout the code. How does one know where to stick these calls? Presumably just guess and test?
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Change subject: rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP
......................................................................
rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP
This change consolidates the COOP rules. Co-op in theory works in all
x86 stages now, but it hasn't been enabled yet.
BUG=b:179699789
TEST=…
[View More]Boot guybrush to OS and verify preloads still work
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I1197406d1d36391998b08e3076146bb2fff59d00
---
M src/include/rules.h
M src/include/thread.h
M src/lib/cbfs.c
3 files changed, 9 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/59550/1
diff --git a/src/include/rules.h b/src/include/rules.h
index d08929c..02b55c5 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -303,6 +303,13 @@
/* When set <arch/smp/spinlock.h> is included for the spinlock implementation. */
#define ENV_STAGE_SUPPORTS_SMP (CONFIG(SMP) && STAGE_HAS_SPINLOCKS)
+#if ENV_X86 && CONFIG(COOP_MULTITASKING) && (ENV_RAMSTAGE || ENV_ROMSTAGE)
+/* TODO: Enable in all x86 stages */
+#define ENV_STAGE_SUPPORTS_COOP 1
+#else
+#define ENV_STAGE_SUPPORTS_COOP 0
+#endif
+
/**
* For pre-DRAM stages and post-CAR always build with simple device model, ie.
* PCI, PNP and CPU functions operate without use of devicetree. The reason
diff --git a/src/include/thread.h b/src/include/thread.h
index 19b69fa..4f10782 100644
--- a/src/include/thread.h
+++ b/src/include/thread.h
@@ -38,7 +38,7 @@
/* Waits until the thread has terminated and returns the error code */
enum cb_err thread_join(struct thread_handle *handle);
-#if (ENV_RAMSTAGE || ENV_ROMSTAGE) && CONFIG(COOP_MULTITASKING)
+#if ENV_STAGE_SUPPORTS_COOP
struct thread {
int id;
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 1ffc695..d1930a9 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -380,7 +380,7 @@
enum cb_err err;
struct cbfs_preload_context *context;
- if (!CONFIG(CBFS_PRELOAD) || (!ENV_RAMSTAGE && !ENV_ROMSTAGE))
+ if (!CONFIG(CBFS_PRELOAD) || !ENV_STAGE_SUPPORTS_COOP)
return CB_ERR_ARG;
context = find_cbfs_preload_context(name);
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Change subject: lib: Add a mutex
......................................................................
Patch Set 8:
(1 comment)
File src/include/mutex.h:
https://review.coreboot.org/c/coreboot/+/59320/comment/d109c109_509dbb89
PS2, Line 11: void mutex_unlock(struct mutex *mutex);
> …
[View More]Nothing in coreboot uses LTO, it's not an easy thing to support. […]
Thanks for that. I always assumed LTO was enabled.
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Hello build bot (Jenkins), Julius Werner, Rob Barnes, Kyösti Mälkki, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59320
to look at the new patch set (#8).
Change subject: lib: Add a mutex
......................................................................
lib: Add a mutex
We currently have two synchronization …
[View More]primatives, spinlock and
thread_mutex. spinlock is meant to block multiple CPUs from entering a
critical section. thread_mutex is meant to block multiple coop-threads
from entering a critical section. It is not AP aware at all.
This CL introduces a mutex that can handle both concepts. The
implementation is using the GCC/LLVM atomic builtin functions. The
generated code uses the xchg instruction vs spinlock which uses (lock)
decb.
8: b0 01 mov $0x1,%al
a: 86 03 xchg %al,(%ebx)
c: 84 c0 test %al,%al
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I41e02a54a17b1f6513b36a0274e43fc715472d78
---
A src/include/mutex.h
M src/lib/Makefile.inc
A src/lib/mutex.c
3 files changed, 85 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59320/8
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Change subject: arch/{arm,arm64,ppc64,riscv}: Add noop cpu_relax
......................................................................
Patch Set 2:
(2 comments)
File src/arch/arm/include/armv4/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/59546/comment/f33eda28_1c21c416
PS1, Line 6: __always_inline
> …
[View More]Just `inline` is enough. __always_inline is weird and shouldn't be used without good reason.
Done. I had copy/pasted it from x86.
File src/arch/arm64/include/armv8/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/59546/comment/5f211cd6_e56de44d
PS1, Line 6: static __always_inline void cpu_relax(void) { }
> Maybe add a TODO comment that this should be implement via SEV/WFE if it's ever actually used?
Done
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