coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: libpayload: Parse DDR Information through coreboot tables
by build bot (Jenkins) (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59193 ) Change subject: libpayload: Parse DDR Information through coreboot tables ...................................................................... Patch Set 4: (1 comment) File payloads/libpayload/include/mem_chip_info.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134055): https://review.coreboot.org/c/coreboot/+/59193/comment/a7206c50_b292c66d PS4, Line 44: }dram_info; space required after that close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/59193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Gerrit-Change-Number: 59193 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Tue, 23 Nov 2021 01:09:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add Modem region in memlayout to avoid modem cleanup in Secbo...
by build bot (Jenkins) (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58545 ) Change subject: sc7280: Add Modem region in memlayout to avoid modem cleanup in Secboot reboot. ...................................................................... Patch Set 9: (1 comment) File src/soc/qualcomm/sc7280/soc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134053): https://review.coreboot.org/c/coreboot/+/58545/comment/479dab8a_7b567941 PS9, Line 27: if (soc_modem_carve_out(&start, &end)) that open brace { should be on the previous line -- To view, visit https://review.coreboot.org/c/coreboot/+/58545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56bfb210606b08893ff71dd1b6679f1ec102ec95 Gerrit-Change-Number: 58545 Gerrit-PatchSet: 9 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Tue, 23 Nov 2021 01:09:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/herobrine: Initialize USB by calling SOC method
by build bot (Jenkins) (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56093 ) Change subject: mb/google/herobrine: Initialize USB by calling SOC method ...................................................................... Patch Set 39: (3 comments) File src/mainboard/google/herobrine/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134047): https://review.coreboot.org/c/coreboot/+/56093/comment/1b8394de_c9da761c PS39, Line 19: .parameter_override_x0 = 0xe6, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134047): https://review.coreboot.org/c/coreboot/+/56093/comment/3aa86013_51f4199a PS39, Line 20: .parameter_override_x1 = 0x8b, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134047): https://review.coreboot.org/c/coreboot/+/56093/comment/eee8933d_842edeee PS39, Line 21: .parameter_override_x2 = 0x16, please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/56093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic378352a97e4f3ed89089f1f7545f8ebb172b1f2 Gerrit-Change-Number: 56093 Gerrit-PatchSet: 39 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sandeep Maheswaram <sanm(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 23 Nov 2021 01:07:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard/herobrine: Add support QUP FW for I2C and SPI
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59556 ) Change subject: src/mainboard/herobrine: Add support QUP FW for I2C and SPI ...................................................................... src/mainboard/herobrine: Add support QUP FW for I2C and SPI Loading QUP FW for hoglin and senor configuration for I2C, SPI and UART. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I08b1d38fef84ef341809a901e2287f70ca5a0314 src/mainboard/herobrine: Add support for senor QUP FW for I2C and SPI Loading QUP FW for senor configuration for I2C, SPI and UART. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I6fdd09bb437547e6d12eb60c4b2917d2a3074618 --- M src/mainboard/google/herobrine/mainboard.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/59556/1 diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 4fedae1..bc9f4e5 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -80,7 +80,8 @@ qupv3_se_fw_load_and_init(QUPV3_0_SE2, SE_PROTOCOL_I2C, MIXED); /* Fingerprint SPI */ qupv3_se_fw_load_and_init(QUPV3_1_SE3, SE_PROTOCOL_SPI, MIXED); - } else if (CONFIG(BOARD_GOOGLE_PIGLIN) || CONFIG(BOARD_GOOGLE_HOGLIN)) { + } else if (CONFIG(BOARD_GOOGLE_SENOR) || CONFIG(BOARD_GOOGLE_PIGLIN) || + CONFIG(BOARD_GOOGLE_HOGLIN)) { /* APPS I2C */ qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* ESIM SPI */ -- To view, visit https://review.coreboot.org/c/coreboot/+/59556 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6fdd09bb437547e6d12eb60c4b2917d2a3074618 Gerrit-Change-Number: 59556 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: HACK: Herobrine: Reinit TPM INT GPIO
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, Sudheer Amrabadi, mturney mturney. Ravi kumar has uploaded a new patch set (#33) to the change originally created by Shelley Chen. ( https://review.coreboot.org/c/coreboot/+/57022 ) Change subject: HACK: Herobrine: Reinit TPM INT GPIO ...................................................................... HACK: Herobrine: Reinit TPM INT GPIO We noticed at some point after running the blobs that we started getting TPM communication errors and realized that some QC blob was reconfiguring this GPIO during execution. We haven't debugged to which blob actually does this, so basically reinitializing the TPM interrupt GPIO excessively to get around this issue for now. Signed-off-by: Shelley Chen <shchen(a)google.com> Change-Id: I30426cc0392a640fb6d3b1d0fafca7e9a67a76c3 --- M src/mainboard/google/herobrine/boardid.c M src/mainboard/google/herobrine/chromeos.c 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/57022/33 -- To view, visit https://review.coreboot.org/c/coreboot/+/57022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30426cc0392a640fb6d3b1d0fafca7e9a67a76c3 Gerrit-Change-Number: 57022 Gerrit-PatchSet: 33 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc: Added dram information to cbmem
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59195 to look at the new patch set (#4). Change subject: soc: Added dram information to cbmem ...................................................................... soc: Added dram information to cbmem BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7 --- M src/soc/qualcomm/common/include/soc/qclib_common.h M src/soc/qualcomm/common/qclib.c 2 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/59195/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7 Gerrit-Change-Number: 59195 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/lib: Added CBMEM tag id to parse ddr information
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59194 to look at the new patch set (#4). Change subject: src/lib: Added CBMEM tag id to parse ddr information ...................................................................... src/lib: Added CBMEM tag id to parse ddr information BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f --- M src/commonlib/include/commonlib/cbmem_id.h M src/commonlib/include/commonlib/coreboot_tables.h M src/lib/coreboot_table.c 3 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/59194/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload: Parse DDR Information through coreboot tables
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59193 to look at the new patch set (#4). Change subject: libpayload: Parse DDR Information through coreboot tables ...................................................................... libpayload: Parse DDR Information through coreboot tables BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e --- M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/libpayload.h A payloads/libpayload/include/mem_chip_info.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c 5 files changed, 57 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/59193/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e Gerrit-Change-Number: 59193 Gerrit-PatchSet: 4 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/mainboard/herobrine: Initialize SPI FW for EC and TPM
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Paul Menzel, mturney mturney, Julius Werner, Rajesh Patil. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50581 to look at the new patch set (#90). Change subject: mb/mainboard/herobrine: Initialize SPI FW for EC and TPM ...................................................................... mb/mainboard/herobrine: Initialize SPI FW for EC and TPM Initialize SPI firmware for EC and H1/TPM instances. Load QUP FW in respective Serial Engines. BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Change-Id: I8cbdd1d59a0166688d52d61646db1b6764879a7c Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/mainboard/google/herobrine/Kconfig M src/mainboard/google/herobrine/board.h M src/mainboard/google/herobrine/bootblock.c M src/mainboard/google/herobrine/chromeos.c 4 files changed, 59 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/50581/90 -- To view, visit https://review.coreboot.org/c/coreboot/+/50581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8cbdd1d59a0166688d52d61646db1b6764879a7c Gerrit-Change-Number: 50581 Gerrit-PatchSet: 90 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/herobrine: Initialize USB by calling SOC method
by Ravi kumar (Code Review) 23 Nov '21

23 Nov '21

Attention is currently required from: Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), Sandeep Maheswaram, mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56093 to look at the new patch set (#39). Change subject: mb/google/herobrine: Initialize USB by calling SOC method ...................................................................... mb/google/herobrine: Initialize USB by calling SOC method Initialize by calling `setup_usb_host0()` from SOC code BUG=b:182963902 TEST=Validated USB enumeration on qcom sc7280 development board Signed-off-by: Sandeep Maheswaram <sanm(a)codeaurora.org> Change-Id: Ic378352a97e4f3ed89089f1f7545f8ebb172b1f2 --- M src/mainboard/google/herobrine/mainboard.c M src/mainboard/google/herobrine/romstage.c 2 files changed, 25 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/56093/39 -- To view, visit https://review.coreboot.org/c/coreboot/+/56093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic378352a97e4f3ed89089f1f7545f8ebb172b1f2 Gerrit-Change-Number: 56093 Gerrit-PatchSet: 39 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sandeep Maheswaram <sanm(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021