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Change subject: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
......................................................................
drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
The device is a PCIe Gen1 to SD 3.0 card reader controller to be
used in the Chromebook. The datasheet name is GL9750S and the revision
is 01.
The patch disables ASPM L0s.
BUG=b:206014046
TEST=Verify GL9750 enters L1 by observing CLKREQ# de-asserts.
Signed-off-by: Ben Chuang <benchuanggli(a)gmail.com>
Change-Id: I6d60cef41baade7457a159d3ce2f8d2e6b66e71c
---
A src/drivers/genesyslogic/gl9750/Kconfig
A src/drivers/genesyslogic/gl9750/Makefile.inc
A src/drivers/genesyslogic/gl9750/gl9750.c
A src/drivers/genesyslogic/gl9750/gl9750.h
M src/include/device/pci_ids.h
5 files changed, 74 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/59429/3
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Change subject: mb/google/brya/var/primus: Update thermal table for primus
......................................................................
mb/google/brya/var/primus: Update thermal table for primus
- Add 4 TEMP_SENSORs
- Configure granularity of power limits
BUG=b:200836803
TEST=USE="project_primus emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Ariel_Fang <ariel_fang(a)wistron.corp-partner.google.com>
Change-Id: Id4d8dbe678b7f0870aeffa0a0118e65de9d5c22d
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
1 file changed, 20 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/59182/6
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/primus: Update thermal table for primus
......................................................................
mb/google/brya/var/primus: Update thermal table for primus
- Configure granularity of power limits
BUG=b:200836803
TEST=USE="project_primus emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Ariel_Fang <ariel_fang(a)wistron.corp-partner.google.com>
Change-Id: Id4d8dbe678b7f0870aeffa0a0118e65de9d5c22d
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
1 file changed, 20 insertions(+), 8 deletions(-)
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Change subject: mb/google/brya/var/primus: Update thermal table for primus
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/primus/overridetree.cb:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134065):
https://review.coreboot.org/c/coreboot/+/59182/comment/eaa78927_e9c84408
PS3, Line 81:
trailing whitespace
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: mb/google/brya/var/primus: Update thermal table for primus
......................................................................
mb/google/brya/var/primus: Update thermal table for primus
- Configure granularity of power limits
Signed-off-by: Ariel_Fang <ariel_fang(a)wistron.corp-partner.google.com>
Change-Id: Id4d8dbe678b7f0870aeffa0a0118e65de9d5c22d
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
1 file changed, 22 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/59182/2
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Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59486 )
Change subject: src/mb/brya: Enable crashlog on brya
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/59486/comment/af4dff35_c28c1939
PS6, Line 51: SOC_INTEL_CRASHLOG
> Actually we don't want this enabled by default on the non-reference devices yet. […]
Hi Tim,
i moved the discussion back to cros bug b:195327879
thanks.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57025 )
Change subject: HACK: Herobrine: Reinit TPM INT gpio after qclib executes
......................................................................
Patch Set 33:
(2 comments)
File src/soc/qualcomm/common/qclib.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134061):
https://review.coreboot.org/c/coreboot/+/57025/comment/ad582dfa_e16213a2
PS33, Line 254: mainboard_blob_fix();
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134061):
https://review.coreboot.org/c/coreboot/+/57025/comment/2b8868fd_39233d98
PS33, Line 254: mainboard_blob_fix();
please, no spaces at the start of a line
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