Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59518
to look at the new patch set (#9).
Change subject: security/intel/txt: Allow platforms without FIT enable Intel TXT
......................................................................
security/intel/txt: Allow platforms without FIT enable Intel TXT
There is no real code or feature dependency on
CPU_INTEL_FIRMWARE_INTERFACE_TABLE for Intel TXT.
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I2858c8de9396449a0ee30837a98fab05570a6259
---
M src/security/intel/txt/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59518/9
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Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59514
to look at the new patch set (#5).
Change subject: security/intel/txt: Correct reporting of chipset production fuse state
......................................................................
security/intel/txt: Correct reporting of chipset production fuse state
Implement the chipset production fuse state reporting as described in
the Intel TXT Software Development Guide. Also fix all occurrences
where the production fuse state is checked.
TEST=Dell OptiPlex 9010 with i7-3770/Q77 reports the chipset is
production fused
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Ic86c5a9e1d162630a1cf61435d1014edabf104b0
---
M src/security/intel/txt/common.c
M src/security/intel/txt/logging.c
M src/security/intel/txt/txt.h
3 files changed, 21 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59514/5
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Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59518 )
Change subject: security/intel/txt: Allow platforms without FIT to use Intel TXT
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59518/comment/92c8909d_5be6adbf
PS7, Line 7: enable
> nit: `to use` (`to enable` also works, but is longer)
Done
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Attention is currently required from: Michał Żygowski.
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59518
to look at the new patch set (#8).
Change subject: security/intel/txt: Allow platforms without FIT to use Intel TXT
......................................................................
security/intel/txt: Allow platforms without FIT to use Intel TXT
There is no real code or feature dependency on
CPU_INTEL_FIRMWARE_INTERFACE_TABLE for Intel TXT.
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I2858c8de9396449a0ee30837a98fab05570a6259
---
M src/security/intel/txt/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59518/8
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59320 )
Change subject: lib: Add a mutex
......................................................................
Patch Set 8:
(3 comments)
File src/include/mutex.h:
https://review.coreboot.org/c/coreboot/+/59320/comment/36123955_1fd8f3c8
PS6, Line 32: }
> Are you saying we should make ENV_STATE_SUPPORTS_SMP evaluate to 1 in x86 romstage, Kyösti? But why? […]
AMD x86 romstages run APs. There used to be poor spinlock-like support for amdfam10 as it really needed it. And there is paid efforts to bring amdfam (kgpe-d16) back upstrem. With AGESA romstage SMP is serialized by other means, BSP waits for APs to execute one by one (and possibly implement exclusion within AGESA).
Say you do some PCI configuration register read-modify-write ops. Would you put a spinlock or mutex around it? I would use a spinlock, Thus I think it makes sense to start by getting rid of the .data requirement of existing <smp/spinlock.h>, use .bss and compiller builtin __atomic_load() etc.
You could start the entire patchtrain with that, and maybe the change from spinlocks to mutexes becomes easier to grasp.
If you have SMP=y is it really worth the trouble to drop the atomicity for stages where you don't really need it? I am asking if it is really worth having _mutex_{lock/unlock]_coop() implemented separately. A better optimisation might be to have spinlock implememntations, here _mutex_(un)lock_{coop,smp} always inlined.
File src/lib/mutex.c:
https://review.coreboot.org/c/coreboot/+/59320/comment/f43cc8f3_363b0c7f
PS8, Line 12: return;
This could go into <smp/spinlock.h> ?
static __always_inline int try_get_spin_lock(x)
{
return __atomic_test_and_set(xxxx) == 0;
}
https://review.coreboot.org/c/coreboot/+/59320/comment/2e744d93_37c00e62
PS8, Line 27: } while (__atomic_load_1(&mutex->locked, __ATOMIC_RELAXED));
static __always_inline int spin_is_locked(x)
{
return __atomic_load_1(xxxx);
}
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