coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/prodrive/hermes: Configure ALC888 Port B Vref
by Angel Pons (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Justin van Son, Christian Walter, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure ALC888 Port B Vref ...................................................................... Patch Set 2: (1 comment) File src/mainboard/prodrive/hermes/hda_verb.c: https://review.coreboot.org/c/coreboot/+/58879/comment/5abb2b18_66f80e9a PS2, Line 145: 0x12 > A custom realtek driver is used here, NID 12 is (ab)used by the driver to set VREF for NID 0x18, sin […] Alright, thank you very much for the information. I'll add a comment about it. -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:45:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Justin van Son <justin.van.son(a)prodrive-technologies.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: superio/smsc/sch5545: Fix KBD and Runtime Registers init
by Felix Held (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Michał Żygowski. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59524 ) Change subject: superio/smsc/sch5545: Fix KBD and Runtime Registers init ...................................................................... Patch Set 3: Code-Review+1 (2 comments) Patchset: PS3: > Normally I would add a switch case in the superio. […] if doing that in sch5545_init is too late, it probably needs to be done in sch5545_early_init, so i'm ok with that PS3: i would have done the two logical changes as separate patches, but i'm ok with either way -- To view, visit https://review.coreboot.org/c/coreboot/+/59524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I790cac3ce1101565b64ed54d9c6b50f5e9aa4cf6 Gerrit-Change-Number: 59524 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:38:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement function to map physical port to EC port
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59666 ) Change subject: soc/intel/alderlake: Implement function to map physical port to EC port ...................................................................... Patch Set 5: (2 comments) File src/soc/intel/alderlake/retimer.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134365): https://review.coreboot.org/c/coreboot/+/59666/comment/a7cfbd07_3de0300c PS5, Line 19: for (uint8_t i = 0; i < MAX_TYPE_C_PORTS; i++) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134365): https://review.coreboot.org/c/coreboot/+/59666/comment/d7b9842b_0f0c20a7 PS5, Line 31: die("Couldn't find correct port mapping or Invalid input port \n"); unnecessary whitespace before a quoted newline -- To view, visit https://review.coreboot.org/c/coreboot/+/59666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3735b7c7794b46123aba3beac8c0268ce72d658c Gerrit-Change-Number: 59666 Gerrit-PatchSet: 5 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:36:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Configure ALC888 Port B Vref
by Justin van Son (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Christian Walter, Angel Pons, Arthur Heymans. Justin van Son has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure ALC888 Port B Vref ...................................................................... Patch Set 2: (1 comment) File src/mainboard/prodrive/hermes/hda_verb.c: https://review.coreboot.org/c/coreboot/+/58879/comment/8b7adeac_e7d2ee70 PS2, Line 145: 0x12 > To check: Datasheet says port B uses NID 0x18. A custom realtek driver is used here, NID 12 is (ab)used by the driver to set VREF for NID 0x18, since the driver resets the codec when it starts, and the VREF registers for the ports themselves are volatile. -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:35:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement function to map physical port to EC port
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59666 ) Change subject: soc/intel/alderlake: Implement function to map physical port to EC port ...................................................................... Patch Set 4: (2 comments) File src/soc/intel/alderlake/retimer.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134362): https://review.coreboot.org/c/coreboot/+/59666/comment/fc8b4e32_caf663ef PS4, Line 20: for (uint8_t i = 0; i < MAX_TYPE_C_PORTS; i++) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134362): https://review.coreboot.org/c/coreboot/+/59666/comment/c2b6dafe_7cb81c60 PS4, Line 32: die("Couldn't find correct port mapping or Invalid input port \n"); unnecessary whitespace before a quoted newline -- To view, visit https://review.coreboot.org/c/coreboot/+/59666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3735b7c7794b46123aba3beac8c0268ce72d658c Gerrit-Change-Number: 59666 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:34:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: HACK: Herobrine: Reinit TPM INT gpio after qclib executes
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, Sudheer Amrabadi, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57025 ) Change subject: HACK: Herobrine: Reinit TPM INT gpio after qclib executes ...................................................................... Patch Set 35: Verified-1 (2 comments) File src/soc/qualcomm/common/qclib.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134353): https://review.coreboot.org/c/coreboot/+/57025/comment/9326ef05_6f65d132 PS35, Line 254: mainboard_blob_fix(); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134353): https://review.coreboot.org/c/coreboot/+/57025/comment/e8195b70_9eb2a22b PS35, Line 254: mainboard_blob_fix(); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/57025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c43d120ebb49800c82aec263ff8c215b60c5201 Gerrit-Change-Number: 57025 Gerrit-PatchSet: 35 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:32:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Shelley Chen, Ravi kumar, Sudheer Amrabadi, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 ) Change subject: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK ...................................................................... Patch Set 97: Verified-1 (2 comments) File src/drivers/spi/spi_flash.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134351): https://review.coreboot.org/c/coreboot/+/50586/comment/ae7757ee_caffe7f3 PS97, Line 533: while (1) suspect code indent for conditional statements (24, 24) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134351): https://review.coreboot.org/c/coreboot/+/50586/comment/83c5b55c_21db4628 PS97, Line 554: while (1) suspect code indent for conditional statements (24, 24) -- To view, visit https://review.coreboot.org/c/coreboot/+/50586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied5b647d0fcc8e3effff3bb7c8680ed5a0c1f3d4 Gerrit-Change-Number: 50586 Gerrit-PatchSet: 97 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Sajida Bhanu <quic_c_sbhanu(a)quicinc.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:31:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter
by Felix Held (Code Review) 25 Nov '21

25 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59614 ) Change subject: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter ...................................................................... mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter The DPTF parameters were verified by the thermal team. BUG=b:207463762 BRANCH=brya TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59614 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/felwinter/overridetree.cb 1 file changed, 96 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved EricR Lai: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index cbab38d..1f835d6 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -41,7 +41,102 @@ }" device domain 0 on - device ref dtt on end + device ref dtt on + chip drivers/intel/dptf + ## sensor information + register "options.tsr[0].desc" = ""DRAM_SOC"" + register "options.tsr[1].desc" = ""Ambient"" + register "options.tsr[2].desc" = ""Charger"" + register "options.tsr[3].desc" = ""WWAN"" + + ## Active Policy + register "policies.active" = "{ + [0] = { + .target = DPTF_CPU, + .thresholds = { + TEMP_PCT(55, 65), + TEMP_PCT(52, 59), + TEMP_PCT(49, 50), + TEMP_PCT(46, 43), + TEMP_PCT(43, 37), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_1, + .thresholds = { + TEMP_PCT(55, 65), + TEMP_PCT(52, 59), + TEMP_PCT(49, 50), + TEMP_PCT(46, 43), + TEMP_PCT(43, 37), + } + } + }" + + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000), + [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), + [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000), + }" + + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), + [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN), + }" + + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 13000, + .max_power = 15000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 28 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 55000, + .max_power = 55000, + .time_window_min = 32 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000, + } + }" + + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 255, 1700 }, + [1] = { 24, 1500 }, + [2] = { 16, 1000 }, + [3] = { 8, 500 } + }" + + ## Fan Performance Control (Percent, Speed, Noise, Power) + register "controls.fan_perf" = "{ + [0] = { 90, 6700, 220, 2200, }, + [1] = { 80, 5800, 180, 1800, }, + [2] = { 70, 5000, 145, 1450, }, + [3] = { 60, 4900, 115, 1150, }, + [4] = { 50, 3838, 90, 900, }, + [5] = { 40, 2904, 55, 550, }, + [6] = { 30, 2337, 30, 300, }, + [7] = { 20, 1608, 15, 150, }, + [8] = { 10, 800, 10, 100, }, + [9] = { 0, 0, 0, 50, } + }" + + ## Fan options + register "options.fan.fine_grained_control" = "1" + register "options.fan.step_size" = "2" + + device generic 0 alias dptf_policy on end + end + end device ref tbt_pcie_rp0 off end device ref tbt_pcie_rp1 on probe DB_USB USB4_KB8001 -- To view, visit https://review.coreboot.org/c/coreboot/+/59614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 Gerrit-Change-Number: 59614 Gerrit-PatchSet: 6 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: sc7280: Add support for edp driver & mdp driver
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59612 ) Change subject: sc7280: Add support for edp driver & mdp driver ...................................................................... Patch Set 2: Verified-1 (118 comments) File src/mainboard/google/herobrine/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/029e47b6_c6d45745 PS2, Line 62: if (display_init_required()) { suspect code indent for conditional statements (8, 24) File src/soc/qualcomm/sc7280/display/edp_aux.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/316f70fe_e65497e4 PS2, Line 99: printk(BIOS_ERR,"%s: invalid size or buffer \n",__func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/8dde71b7_f8e13879 PS2, Line 99: printk(BIOS_ERR,"%s: invalid size or buffer \n",__func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4066a06b_fd3a8477 PS2, Line 99: printk(BIOS_ERR,"%s: invalid size or buffer \n",__func__); unnecessary whitespace before a quoted newline Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/630c31d0_aaaca49e PS2, Line 106: printk(BIOS_ERR,"%s: invalid msg: size(%zu), request(%x)\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/143040bf_581f44cd PS2, Line 113: printk(BIOS_ERR,"edp aux transfer tx failed\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/36ea6b7d_63d0561a PS2, Line 115: if (read) { suspect code indent for conditional statements (8, 24) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/10588fd6_78c53267 PS2, Line 118: printk(BIOS_ERR,"edp aux transfer rx failed\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/c5304ba1_14b4dc50 PS2, Line 138: if (err <EDID_LENGTH) { spaces required around that '<' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/7b8acff2_0aba8499 PS2, Line 139: printk(BIOS_ERR, "ERROR: Failed to read EDID. :0x%x\n",err); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/0118d2c5_7f47a4ea PS2, Line 148: if (err>0) spaces required around that '>' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/a77bee36_ca4f9ecc PS2, Line 149: err = edp_aux_transfer(EDID_I2C_ADDR, DP_AUX_I2C_READ, &edid[EDID_LENGTH], line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/aafd358d_211299f8 PS2, Line 151: if (err<EDID_LENGTH) { spaces required around that '<' (ctx:VxV) File src/soc/qualcomm/sc7280/display/edp_ctrl.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4c016b89_c3623346 PS2, Line 405: static void edp_link_train_clock_recovery_delay(const uint8_t dpcd[DP_RECEIVER_CAP_SIZE]) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/6b096470_012f5efc PS2, Line 409: printk(BIOS_ERR,"AUX interval %d, out of range (max 4)\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/79a3b2a0_7b849516 PS2, Line 426: if ((lane_status & DP_LANE_CR_DONE) == 0) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/16ecb54f_47b042f0 PS2, Line 428: printk(BIOS_ERR,"clock recovery ok failed : %x\n", lane_status); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/404f657b_9d935223 PS2, Line 435: static void edp_link_train_channel_eq_delay(const uint8_t dpcd[DP_RECEIVER_CAP_SIZE]) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/fcaf305a_ea097b51 PS2, Line 440: printk(BIOS_INFO,"AUX interval %d, out of range (max 4)\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/3c27690a_5e306903 PS2, Line 471: write32(&edp_ahbclk->interrupt_status,EDP_INTERRUPT_STATUS1_MASK); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4461c9a3_94677bf3 PS2, Line 490: if (dpcd[DP_EDP_CONFIGURATION_CAP] & DP_ALTERNATE_SCRAMBLER_RESET_CAP) suspect code indent for conditional statements (8, 10) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/90c3ece7_46764d6f PS2, Line 539: if (edp_aux_transfer(DP_TRAINING_LANE0_SET, DP_AUX_NATIVE_WRITE, buf, 2) <2) { spaces required around that '<' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/5f926bfa_11c049bf PS2, Line 540: printk(BIOS_ERR,"%s: Set sw/pe to panel failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/11910a42_a9d4cb14 PS2, Line 551: printk(BIOS_INFO,"pattern=%x\n", p); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/1b9cb068_9debb3ab PS2, Line 553: printk(BIOS_ERR,"%s: Set training pattern to panel failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/32ae044e_e3ce206b PS2, Line 570: printk(BIOS_INFO,"lane=%d req_voltage_swing=0x%x\n", i, data); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/d3df05c9_fa4d2b07 PS2, Line 581: printk(BIOS_INFO,"lane=%d req_pre_emphasis=0x%x\n", i, data); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/ced58b1b_3501bf44 PS2, Line 587: printk(BIOS_INFO,"v_level=%d, p_level=%d\n", ctrl->v_level, ctrl->p_level); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/330e7625_57d15249 PS2, Line 596: printk(BIOS_INFO,"train=%d", train); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/90d51d0e_19258ee5 PS2, Line 606: printk(BIOS_INFO,"%s: set link_train=%u failed\n", __func__, data); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/2c3e95e9_effecce5 PS2, Line 611: printk(BIOS_INFO,"v=%d p=%d\n", ctrl->v_level, ctrl->p_level); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/73fb53d4_92b56397 PS2, Line 643: printk(BIOS_ERR,"%s: read link status failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/084db94d_0f174b28 PS2, Line 698: printk(BIOS_ERR,"%s: read link status failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/a0ba0c9c_502f88c9 PS2, Line 746: printk(BIOS_INFO,"new rate=0x%x\n", ctrl->link_rate_khz); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/6e10e57f_d562ef2d PS2, Line 809: if (edp_aux_transfer(DP_LINK_BW_SET, DP_AUX_NATIVE_WRITE, &values[0], 1)< 0) spaces required around that '<' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/b2a875e8_65a97478 PS2, Line 830: printk(BIOS_ERR,"%s: read link status failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/505781f8_0ed3c4a5 PS2, Line 836: printk(BIOS_ERR,"link reconfig\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/6eaba0a5_8afa1dc3 PS2, Line 839: if (edp_clock_recovery_reduced_lanes(link_status, ctrl->lane_cnt) == 0) { line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/f8184829_2f13ac8c PS2, Line 841: printk(BIOS_ERR,"%s: Training 1 failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/5f1f0f84_a1ecd3bd PS2, Line 844: printk(BIOS_ERR,"link reconfig\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/1e1fb866_541880c3 PS2, Line 848: printk(BIOS_ERR,"%s: Training 1 failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/c82f4de3_79985af1 PS2, Line 855: printk(BIOS_INFO,"Training 1 completed successfully\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/8634ec5c_5df32325 PS2, Line 858: if (edp_clear_training_pattern(dpcd)) suspect code indent for conditional statements (8, 10) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/8b828e0c_548cd709 PS2, Line 859: return EDP_TRAIN_FAIL; Statements should start on a tabstop Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/f44e2e65_d538a859 PS2, Line 861: ret = edp_start_link_train_2(ctrl,dpcd); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/97a468be_56154575 PS2, Line 866: printk(BIOS_ERR,"%s: read link status failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/980e91a4_0eab6881 PS2, Line 872: printk(BIOS_ERR,"link reconfig\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/b81eea31_966d982d PS2, Line 875: printk(BIOS_ERR,"%s: Training 2 failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/468bb160_8d4d3ae8 PS2, Line 880: printk(BIOS_ERR,"%s: Training 1 failed\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/dac6fc9a_64abc95b PS2, Line 883: printk(BIOS_ERR,"link reconfig\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/a7210adc_2217c275 PS2, Line 892: printk(BIOS_INFO,"Training 2 completed successfully\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/3e66831c_1c97a1d9 PS2, Line 971: printk(BIOS_ERR,"Invalid pixel mux divider\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/50d61df1_754d7ade PS2, Line 982: printk(BIOS_INFO,"num=0x%x, den=0x%x\n", *pixel_m, *pixel_n); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/ff2a4940_1516b8d2 PS2, Line 997: if (DP_LINK_BW_5_4 == rate) Comparisons should place the constant on the right side of the test Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/c63c04fe_18339be6 PS2, Line 1000: if (DP_LINK_BW_8_1 == rate) Comparisons should place the constant on the right side of the test Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/61d7fb7d_008fca5f PS2, Line 1003: printk(BIOS_INFO,"mvid=0x%x, nvid=0x%x\n", mvid, nvid); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/00d3c1a1_14111b7d PS2, Line 1020: tu->last_partial_tu_fp =(tu->n_remainder_symbols_per_lane_fp / tu->tu_size); spaces required around that '=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/a951af3c_638a5e44 PS2, Line 1098: if (tu->new_err_fp <tu->diff_abs_fp) spaces required around that '<' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/063a4270_f2234cd2 PS2, Line 1115: int64_t temp =0; spaces required around that '=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/93d02afc_4acb6b1b PS2, Line 1116: int64_t temp_fp =0; spaces required around that '=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/0133df7c_5affc419 PS2, Line 1136: if (((tu->lwidth % tu->nlanes) != 0) && (tu->ratio_fp < f)) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/c5330c42_b25c98df PS2, Line 1142: tu->err_fp = 1000 * f ; space prohibited before semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/58623aa5_4a010be2 PS2, Line 1143: if (tu->ratio_fp > f) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/77abb5a6_a8967a9d PS2, Line 1147: for (tu->tu_size = 32; tu->tu_size <= 64; tu->tu_size++) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/9b436012_47aff60f PS2, Line 1154: if(tu->new_err_fp < tu->err_fp) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/189fc844_6bdbdc2e PS2, Line 1154: if(tu->new_err_fp < tu->err_fp) space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/20f9e9b7_5eff760e PS2, Line 1256: printk(BIOS_ERR,"TU: valid_boundary_link: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/3a40bdcb_1aa9168e PS2, Line 1258: printk(BIOS_ERR,"TU: delay_start_link: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/e069382b_40f540be PS2, Line 1260: printk(BIOS_ERR,"TU: boundary_moderation_en: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/13dfdf3e_9567e2fa PS2, Line 1262: printk(BIOS_ERR,"TU: valid_lower_boundary_link: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/e12f35d0_69427f9e PS2, Line 1264: printk(BIOS_ERR,"TU: upper_boundary_count: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/51d7f8a1_e94179f7 PS2, Line 1266: printk(BIOS_ERR,"TU: lower_boundary_count: %d\n", space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4f830857_b2e4e1f5 PS2, Line 1268: printk(BIOS_ERR,"TU: tu_size_minus1: %d\n", tu_table->tu_size_minus1); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4f065bdb_98b65b98 PS2, Line 1275: edp_ctrl_calc_tu( ctrl, edid, &tu_config); space prohibited after that open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/251b0670_065d0b87 PS2, Line 1320: data |= (0x1) ; space prohibited before semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4a170a38_6db13fec PS2, Line 1346: static void edp_ctrl_link_enable(struct edp_ctrl* ctrl, "foo* bar" should be "foo *bar" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4baee25b_3048dba4 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/ded26ad6_410624f4 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4bccb7e5_ffa6c848 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/64705464_fb254dc0 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/8d4c0c43_306fa143 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/9b07061a_06f44f27 PS2, Line 1366: mdss_clock_configure(MDSS_CLK_EDP_LINK,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/d65b474a_8b5d223f PS2, Line 1368: if(ret !=0) spaces required around that '!=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/ae8137de_67c9add0 PS2, Line 1368: if(ret !=0) space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/21f4d360_e14b9d01 PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/02551778_e20edf91 PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/79013007_8697a13a PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/34a1bad0_b45600bf PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/353bf17d_e31cf5a7 PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/7dd19d1b_ed1bea66 PS2, Line 1371: mdss_clock_configure(MDSS_CLK_EDP_LINK_INTF,0,1,0,0,0,0); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/bb9c9df0_ec884067 PS2, Line 1373: if(ret !=0) spaces required around that '!=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/1b2a80d5_25c26b0c PS2, Line 1373: if(ret !=0) space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/ce0108f0_eb7aa22a PS2, Line 1379: if(ret !=0) spaces required around that '!=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/de54154d_f4fd54ac PS2, Line 1379: if(ret !=0) space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/34f73fee_70916cac PS2, Line 1394: while(ret == EDP_TRAIN_RECONFIG) { space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/9906c9ce_3c0081ec PS2, Line 1396: edp_ctrl_irq_enable( 0); space prohibited after that open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/fe43d67c_b36cf33e PS2, Line 1400: edp_ctrl_irq_enable( 1); space prohibited after that open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/1210a855_e90aa9a0 PS2, Line 1417: printk(BIOS_ERR,"ERROR: edp native read failure\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/bd0e2ba8_90aa40a6 PS2, Line 1424: printk(BIOS_ERR,"ERROR: edp native read failure\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/efaf1de1_b358f62c PS2, Line 1434: edp_ctrl_irq_enable( 1); space prohibited after that open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4f73ab4d_73cb8f70 PS2, Line 1439: printk(BIOS_ERR,"ERROR: edp training failure\n"); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/96428597_eb4f11ce PS2, Line 1466: printk(BIOS_ERR,"%s: AUX channel is NOT ready\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/d0713e3a_d5f73495 PS2, Line 1477: int ret =0; spaces required around that '=' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/d3938af2_5c2f3eea PS2, Line 1485: if(edp_read_edid(edid) == 0) that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/32b73ffa_d5f5c2e4 PS2, Line 1485: if(edp_read_edid(edid) == 0) space required before the open parenthesis '(' File src/soc/qualcomm/sc7280/display/edp_phy_7nm.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/19ffd5f2_5a14d03f PS2, Line 45: printk(BIOS_ERR,"%s: refgen not ready : 0x%x\n", __func__,read32(&edp_phy_pll->qserdes_com_cmn_status)); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/e4accb24_9d9ec35c PS2, Line 45: printk(BIOS_ERR,"%s: refgen not ready : 0x%x\n", __func__,read32(&edp_phy_pll->qserdes_com_cmn_status)); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/c71e269a_c11ad144 PS2, Line 45: printk(BIOS_ERR,"%s: refgen not ready : 0x%x\n", __func__,read32(&edp_phy_pll->qserdes_com_cmn_status)); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/3c2229ee_ee7f6c3a PS2, Line 214: printk(BIOS_ERR,"%s: Invalid link rate. rate = %u\n", __func__, space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/47eb3030_74099e57 PS2, Line 281: printk(BIOS_ERR,"%s: Invalid link rate. rate = %u\n", __func__, space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/e8749193_69e8c506 PS2, Line 293: printk(BIOS_ERR,"%s: PLL not locked. Status\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/95065417_3df7aaed PS2, Line 301: printk(BIOS_ERR,"%s: PHY not ready. Status\n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/e0422ecd_dc75f76d PS2, Line 309: printk(BIOS_ERR,"%s: PLL not locked. Status\n", __func__); space required after that ',' (ctx:VxV) File src/soc/qualcomm/sc7280/display/mdss.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/87fd0979_93dc062f PS2, Line 55: printk(BIOS_ERR,"%s: \n", __func__); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/4e96e3a0_d5896707 PS2, Line 55: printk(BIOS_ERR,"%s: \n", __func__); unnecessary whitespace before a quoted newline Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/d3f7aa95_a0fce22c PS2, Line 213: mdss_clock_configure(MDSS_CLK_MDP, 300 * MHz, 0, 0, 0 , 0 , 0 ); space prohibited before that ',' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/cf000893_ef4d3833 PS2, Line 213: mdss_clock_configure(MDSS_CLK_MDP, 300 * MHz, 0, 0, 0 , 0 , 0 ); space prohibited before that ',' (ctx:WxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134349): https://review.coreboot.org/c/coreboot/+/59612/comment/fc48b477_64edf1db PS2, Line 213: mdss_clock_configure(MDSS_CLK_MDP, 300 * MHz, 0, 0, 0 , 0 , 0 ); space prohibited before that close parenthesis ')' -- To view, visit https://review.coreboot.org/c/coreboot/+/59612 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I388bce93a4d174ca51a02add1fd9b04c46899fa6 Gerrit-Change-Number: 59612 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:29:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: acpi: Convert ACPI_DEVICE_SLEEP_* values to an enum
by Felix Held (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Subrata Banik. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59634 ) Change subject: acpi: Convert ACPI_DEVICE_SLEEP_* values to an enum ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: oh, didn't think of using those defines in the asl code. do you think that that might become relevant at some point? -- To view, visit https://review.coreboot.org/c/coreboot/+/59634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b8586b46823b5da3614a0b2a2f2f16802e96962 Gerrit-Change-Number: 59634 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:29:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021