coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

1 participants
6394 discussions

Change in coreboot[master]: src/lib: Add CBMEM tag id to parse ddr information
by Julius Werner (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59194 ) Change subject: src/lib: Add CBMEM tag id to parse ddr information ...................................................................... Patch Set 5: (1 comment) File src/commonlib/include/commonlib/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/59194/comment/2dee98b5_3ea2eaf0 PS5, Line 82: 0x10 > > They're not actually random, they're meant to be readable in a hexdump. […] Well, it's an emergent pattern more than a rule... I think at first it was supposed to be a random number but then people try being cheeky and pick something with a meaning behind it, and eventually everyone does. But yeah I agree it could be standardized... in fact it would be good if we had a macro like MAGIC_LE32('M', 'C', 'H', 'P') that translates into a little-endian integer, and rewrote all these source files in a more readable way. -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 17:40:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init
by Subrata Banik (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Sridhar Siricilla, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55364 ) Change subject: soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init ...................................................................... Patch Set 13: Code-Review+1 (1 comment) File src/soc/intel/alderlake/romstage/romstage.c: https://review.coreboot.org/c/coreboot/+/55364/comment/cc405ed4_5005ca5a PS13, Line 135: timestamp_add_now(TS_BEFORE_CSE_FW_SYNC); nit: you can submit timestamp CL separately if you wish ? that way this CL is just moving things from post memory state to pre memory state. -- To view, visit https://review.coreboot.org/c/coreboot/+/55364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad7403650df8bc4e40aa6e48ccfeba95a5789a2d Gerrit-Change-Number: 55364 Gerrit-PatchSet: 13 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 17:39:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/lib: Add CBMEM tag id to parse ddr information
by Arthur Heymans (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59194 ) Change subject: src/lib: Add CBMEM tag id to parse ddr information ...................................................................... Patch Set 5: (1 comment) File src/commonlib/include/commonlib/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/59194/comment/128eaf27_1f91c6a7 PS5, Line 82: 0x10 > They're not actually random, they're meant to be readable in a hexdump. So this one could be something like 0x5048434D ('MCHP'). Oh... I always used a random number... It would be good to document this (outside the scope of this CL ofc). -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 17:31:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/lib: Add CBMEM tag id to parse ddr information
by Julius Werner (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59194 ) Change subject: src/lib: Add CBMEM tag id to parse ddr information ...................................................................... Patch Set 5: (3 comments) File src/commonlib/include/commonlib/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/59194/comment/29c86f47_c6a0023b PS5, Line 82: 0x10 > maybe write it down in 0x%08x format like the rest? Also a more 'random looking' number might be bet […] They're not actually random, they're meant to be readable in a hexdump. So this one could be something like 0x5048434D ('MCHP'). https://review.coreboot.org/c/coreboot/+/59194/comment/6b047f72_6d7bde73 PS5, Line 152: no extra space File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/59194/comment/10ddee1e_13bd202f PS5, Line 88: /* The following options are CMOS-related */ Your entry is not CMOS-related so it should be added above here (as 0x0043). *However*, I think I'd actually prefer you don't add this to the coreboot table at all. This practice of having a separate coreboot table entry for each CBMEM area is sort of an anti-pattern that we should try to get away from if possible. If you can wait submitting this until CB:59491 lands, you can use the function introduced there to look it up through the lb_cbmem_entry tag. -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 17:27:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: asrock/e3c246d4i: Add Intel Coffee Lake board
by Angel Pons (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Paul Menzel, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56339 ) Change subject: asrock/e3c246d4i: Add Intel Coffee Lake board ...................................................................... Patch Set 9: (1 comment) File src/mainboard/asrock/e3c246d4i/gpio.h: PS9: Duplicate of include/mainboard/gpio.h -- To view, visit https://review.coreboot.org/c/coreboot/+/56339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66e168c8af5de9862b0724fa397ecd709843af1a Gerrit-Change-Number: 56339 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 25 Nov 2021 14:50:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [TESTME] mb/prodrive/hermes: Fix R04 internal audio verb
by Angel Pons (Code Review) 25 Nov '21

25 Nov '21

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/52549 ) Change subject: [TESTME] mb/prodrive/hermes: Fix R04 internal audio verb ...................................................................... Abandoned Superseded by CB:59545 -- To view, visit https://review.coreboot.org/c/coreboot/+/52549 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf86aaa927500f3044edffffe9ad05607eeabb Gerrit-Change-Number: 52549 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

1 0

Change in coreboot[master]: mb/prodrive/hermes: Configure ALC888 port B Vref
by Angel Pons (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Justin van Son, Christian Walter, Angel Pons. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure ALC888 port B Vref ...................................................................... Patch Set 2: (1 comment) File src/mainboard/prodrive/hermes/hda_verb.c: https://review.coreboot.org/c/coreboot/+/58879/comment/71304379_c964b17c PS2, Line 145: 0x12 > Alright, thank you very much for the information. I'll add a comment about it. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 14:36:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Justin van Son <justin.van.son(a)prodrive-technologies.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/prodrive/hermes: Configure ALC888 port B Vref
by Angel Pons (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Justin van Son, Christian Walter, Arthur Heymans. Angel Pons has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/58879 ) Change subject: mb/prodrive/hermes: Configure ALC888 port B Vref ...................................................................... mb/prodrive/hermes: Configure ALC888 port B Vref Define a new field in the board config EEPROM layout for port B Vref. Write port B Vref settings to unused non-volatile NID 0x12 instead of NID 0x18, the actual port B NID. Because per-port Vref settings don't persist after codec resets, a custom Realtek driver (ab)uses NID 0x12 to restore port B Vref after resetting the codec. Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/prodrive/hermes/eeprom.h M src/mainboard/prodrive/hermes/hda_verb.c 2 files changed, 29 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/58879/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa11ba9c74f643e94046d4983fbce65dbedd1025 Gerrit-Change-Number: 58879 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: src/lib: Add CBMEM tag id to parse ddr information
by Arthur Heymans (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59194 ) Change subject: src/lib: Add CBMEM tag id to parse ddr information ...................................................................... Patch Set 5: (1 comment) File src/commonlib/include/commonlib/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/59194/comment/2a69ae26_00ec359c PS5, Line 82: 0x10 maybe write it down in 0x%08x format like the rest? Also a more 'random looking' number might be better? -- To view, visit https://review.coreboot.org/c/coreboot/+/59194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594bd9266a6379e3a85de507eaf4c56619b17a6f Gerrit-Change-Number: 59194 Gerrit-PatchSet: 5 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 14:29:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/i2c: Return negative values on error
by Yu-Ping Wu (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Paul Menzel, Felix Held. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59539 ) Change subject: soc/mediatek/i2c: Return negative values on error ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/common/i2c.c: https://review.coreboot.org/c/coreboot/+/59539/comment/fe3f1a33_1b054717 PS3, Line 282: return ret; > looked at the definitions that get assigned to ret in the different cases and ret will always be a p […] Those enum values have been changed to negative in this patch. Is that what you mean? -- To view, visit https://review.coreboot.org/c/coreboot/+/59539 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I955b9aae11e20d75fac414d15714330e364dad2f Gerrit-Change-Number: 59539 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Wei-Shun Chang <weishunc(a)google.com> Gerrit-Reviewer: Xin Ji <xji(a)analogix.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 13:45:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2021