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Hello build bot (Jenkins), Angel Pons, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: superio/smsc/sch5545: Clear PMEs in the early init
......................................................................
superio/smsc/sch5545: Clear PMEs in the early init
Disable PMEs and clear global PME status to avoid undesired wakeups
or hangs in later stages. These bits are set by OS via ACPI can survive
S5 state so it is necessary to set them back to defaults after an
ungraceful shutdown.
TEST=Dell OptiPlex 9010 does not hang anymore after ungraceful shutdown
when configuring GPE0_EN register in southbridge LPC init
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I790cac3ce1101565b64ed54d9c6b50f5e9aa4cf6
---
M src/superio/smsc/sch5545/sch5545_early_init.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/59524/4
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Change subject: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFS
......................................................................
Patch Set 10:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59519/comment/711451b8_b0d18164
PS8, Line 18: SINTI
> typo: SINIT
Done
File src/security/intel/txt/ramstage.c:
https://review.coreboot.org/c/coreboot/+/59519/comment/32fb7ff2_016d1f05
PS8, Line 320:
> nit: drop blank line
Done
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Change subject: security/intel/txt: Correct reporting of chipset production fuse state
......................................................................
Patch Set 6: Code-Review+2
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Change subject: security/intel/txt: Correct reporting of chipset production fuse state
......................................................................
Patch Set 6:
(1 comment)
File src/security/intel/txt/common.c:
https://review.coreboot.org/c/coreboot/+/59514/comment/db27017f_853664b4
PS4, Line 222: if ((acm_header->flags & ACM_FORMAT_FLAGS_DEBUG) ==
: (read64((void *)TXT_VER_FSBIF) & TXT_VER_PRODUCTION_FUSED))
> This check should also be updated, but note that it's incorrect. […]
Good catch. Done.
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Change subject: security/intel/txt: Allow platforms without FIT enable Intel TXT
......................................................................
Patch Set 10: Code-Review+2
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Change subject: security/intel/txt: Allow platforms without FIT enable Intel TXT
......................................................................
Patch Set 10:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59518/comment/eb106670_a244f911
PS7, Line 7: enable
> Done
Seems like this was undone after the rebase.
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Change subject: security/intel/txt: Implement GETSEC PARAMETER dumping
......................................................................
Patch Set 6: Verified+1
(2 comments)
File src/security/intel/txt/logging.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134394):
https://review.coreboot.org/c/coreboot/+/59516/comment/ba3e2b8a_d0c56de2
PS6, Line 253: if (txt_feature_flags & GETSEC_PARAMS_TXT_EXT_CRTM_SUPPORT) {
braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134394):
https://review.coreboot.org/c/coreboot/+/59516/comment/3b705644_870829fd
PS6, Line 259: if (txt_feature_flags & GETSEC_PARAMS_TXT_EXT_MACHINE_CHECK) {
braces {} are not necessary for any arm of this statement
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Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59514
to look at the new patch set (#6).
Change subject: security/intel/txt: Correct reporting of chipset production fuse state
......................................................................
security/intel/txt: Correct reporting of chipset production fuse state
Implement the chipset production fuse state reporting as described in
the Intel TXT Software Development Guide. Also fix all occurrences
where the production fuse state is checked.
TEST=Dell OptiPlex 9010 with i7-3770/Q77 reports the chipset is
production fused
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Ic86c5a9e1d162630a1cf61435d1014edabf104b0
---
M src/security/intel/txt/common.c
M src/security/intel/txt/logging.c
M src/security/intel/txt/txt.h
3 files changed, 20 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59514/6
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Change subject: security/intel/txt: Implement GETSEC PARAMETER dumping
......................................................................
Patch Set 5: Verified+1
(2 comments)
File src/security/intel/txt/logging.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134385):
https://review.coreboot.org/c/coreboot/+/59516/comment/df8b95e4_f18ed4f3
PS5, Line 253: if (txt_feature_flags & GETSEC_PARAMS_TXT_EXT_CRTM_SUPPORT) {
braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134385):
https://review.coreboot.org/c/coreboot/+/59516/comment/1180d6b0_c96bb69a
PS5, Line 259: if (txt_feature_flags & GETSEC_PARAMS_TXT_EXT_MACHINE_CHECK) {
braces {} are not necessary for any arm of this statement
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Hello build bot (Jenkins), Angel Pons, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59519
to look at the new patch set (#9).
Change subject: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFS
......................................................................
security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFS
Since we may have either BIOS ACM or both BIOS and SINIT ACMs in CBFS,
the size of txt_heap_acm_element will be different. We cannot always
hardcode the size of ACM addresses array for two ACMs. If only the
BIOS was included, the BDR parsing failed in TBoot due to invalid size
of HEAP_ACM element. Check if SINIT ACM is present in CBFS and push
properly formatted BDR region onto the TXT heap. Use two separate
txt_heap_acm_element structures with different lengths.
TEST=Boot QubesOS 4.0 with TBoot 1.8.2 on Dell OptiPlex 9010 with and
without SINIT ACM in CBFS and see that TBoot no longer complains on
the wrong size of HEAP_ACM element
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Ib0c37a66d96e1ca3fb4d3f665e3ad35c6f1c5c1e
---
M src/security/intel/txt/ramstage.c
M src/security/intel/txt/txt_register.h
2 files changed, 115 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/59519/9
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