coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

1 participants
6394 discussions

Change in coreboot[master]: mb/google/brya/var/brask: Enable LAN driver to write MAC
by Tim Wawrzynczak (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: David Wu, Alan Huang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59087 ) Change subject: mb/google/brya/var/brask: Enable LAN driver to write MAC ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59087/comment/5eac8729_458a4958 PS3, Line 7: write suggestion: `program` https://review.coreboot.org/c/coreboot/+/59087/comment/1b242038_c3c5f0ed PS3, Line 10: writting `programming` ? Otherwise it kind of sounds like you mean writing the value to VPD, not programming the LAN with its MAC -- To view, visit https://review.coreboot.org/c/coreboot/+/59087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb95b02fd6d61621ef46db4d63b48456a0a72732 Gerrit-Change-Number: 59087 Gerrit-PatchSet: 3 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:40:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: intel: cse_lite: Use cbfs_unverified_area API
by Raul Rangel (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Tim Wawrzynczak, Julius Werner, Patrick Rudolph. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59679 ) Change subject: intel: cse_lite: Use cbfs_unverified_area API ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/59679/comment/848ef97c_2f5a3d99 PS2, Line 676: cbfs_unverified_area_map > I wonder if anyone even noticed this was insecure when it was first written. […] Ah, I think you wanted to avoid the vboot penalty on always hashing the firmware? It looks like the hash is stored in FW_MAIN_X, then the firmware is mapped and the hash is manually calculated. Will CBFS_VERIFICATION allow moving this file into FW_MAIN_X? -- To view, visit https://review.coreboot.org/c/coreboot/+/59679 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4855280d6d06cf1aa646fded916fd830b287b30 Gerrit-Change-Number: 59679 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:38:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/net/r8168: Add support for Realtek RT8125
by Tim Wawrzynczak (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: David Wu, Paul Menzel, Zhuohao Lee, Alan Huang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59086 ) Change subject: drivers/net/r8168: Add support for Realtek RT8125 ...................................................................... Patch Set 13: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59086/comment/2fc892e1_d1595668 PS13, Line 13: TEST=emerge-brask coreboot chromeos-bootimage. Test on brask whose NIC is : RT8125. Check if the default MAC is written into the NIC. 72 characters wide please File src/drivers/net/r8168.c: https://review.coreboot.org/c/coreboot/+/59086/comment/191a20af_d32c2ac1 PS4, Line 255: /* : * Refer to RTL8111H datasheet 7.2 Customizable LED Configuration : * Starting from offset 0x18 : * Bit[15:12] LED Feature Control(FC) : * Bit[11:08] LED Select for PINLED2 : * Bit[07:04] LED Select for PINLED1 : * Bit[03:00] LED Select for PINLED0 : * : * Speed Link10M Link100M Link1000M ACT/Full : * LED0 Bit0 Bit1 Bit2 Bit3 : * LED1 Bit4 Bit5 Bit6 Bit7 : * LED2 Bit8 Bit9 Bit10 Bit11 : * FC Bit12 Bit13 Bit14 Bit15 : */ : : /* Set customized LED registers */ : outw(config->customized_leds, io_base + CMD_LED0_LED1); > Yes. We are now working on this in commit https://review.coreboot.org/c/coreboot/+/59531. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4c41f94fd6e5fd6393abbb30bfc22a149f5d71 Gerrit-Change-Number: 59086 Gerrit-PatchSet: 13 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:38:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Zhuohao Lee <zhuohao(a)google.com> Comment-In-Reply-To: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel: cse_lite: Use cbfs_unverified_area API
by Raul Rangel (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Tim Wawrzynczak, Julius Werner, Patrick Rudolph. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59679 ) Change subject: intel: cse_lite: Use cbfs_unverified_area API ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/59679/comment/dab98cef_a559cee8 PS2, Line 676: cbfs_unverified_area_map I wonder if anyone even noticed this was insecure when it was first written. Tim, What's preventing the CSE firmware from moving into FW_MAIN_A/B? IMO, we should fix this instead of having a special CBFS API for this use case. -- To view, visit https://review.coreboot.org/c/coreboot/+/59679 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4855280d6d06cf1aa646fded916fd830b287b30 Gerrit-Change-Number: 59679 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:23:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update gpio override
by Tim Wawrzynczak (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Kevin Chiu, Paul Menzel, Nick Vaccaro, Wisley Chen, Shon Wang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59305 ) Change subject: mb/google/brya/var/vell: update gpio override ...................................................................... Patch Set 12: (1 comment) File src/mainboard/google/brya/variants/vell/gpio.c: https://review.coreboot.org/c/coreboot/+/59305/comment/d093293f_8190766b PS8, Line 17: /* B2 : VRALERT# ==> RGB_RST_ODL */ : PAD_CFG_GPI(GPP_B2, NONE, DEEP), > This for RGB keyboard to reset then should it be an output, to control the state? -- To view, visit https://review.coreboot.org/c/coreboot/+/59305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc91866f7555c294af7eed9e5d1550e73d8059d0 Gerrit-Change-Number: 59305 Gerrit-PatchSet: 12 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:18:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Define the helper functions
by Sridhar Siricilla (Code Review) 29 Nov '21

29 Nov '21

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Change in coreboot[master]: soc/intel/alderlake, soc/common: Add method to determine the cpu type
by Sridhar Siricilla (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Arthur Heymans, Tim Wawrzynczak, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59360 ) Change subject: soc/intel/alderlake, soc/common: Add method to determine the cpu type ...................................................................... Patch Set 4: (5 comments) File src/soc/intel/common/block/acpi/Kconfig: https://review.coreboot.org/c/coreboot/+/59360/comment/714efd7c_56287033 PS3, Line 50: Generate CPPCv3 entries for Intel hybrid processors > That is not what the code does in this CL. Ack File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/59360/comment/2a8fad4b_55f5ea25 PS1, Line 25: return global_cpu_type_bitmask; > > The bitmask is updated in the multi core context, but accessed by only BSP. […] set_cpu_type_bitmask() is run in multi core context during BS_DEV_INIT_CHIPS, but global_cpu_type_bitmaks() is run by BSP during BS_WRITE_TABLES. As these 2 function get executed during different times of execution, so global_cpu_type_bitmaks() is threadsafe. File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/59360/comment/2e9e43cf_5d8fccb7 PS3, Line 37: set_cpu_type_bitmask > Is it really useful to encode this information in a uint32_t? It won't scale past 32 big cores? Why […] I agree with you, since bitmask is 32 bits, it wont' scale up beyond 32 cores. It did without using bitmask this time. I have used array to map index to cpu type information. >Why not add the cpu type to struct device? It will not help as the CPPCv3 package has to exposed in the ascending order of LAPIC Ids ( core which has smaller LAPIC id value should be referred as CPU#0 , next immediate bigger LAPIC id's core id should be CPU#1 ..). In the CPPC3 package all elements are same across all CPUs except nominal performance whose values depends on the core type scaling factor. While exposing a CPPC3 package for a CPU, coreboot has to populate the nominal performance correctly as per CPU type. Hence, having mapping between core index to core type helps to populate the CPPCv3 package information correctly. https://review.coreboot.org/c/coreboot/+/59360/comment/d6691077_50d757f9 PS3, Line 43: get_cpu_index > global_cpu_type_bitmaks will overflow if there are more than 32 CPUs. Ack File src/soc/intel/common/block/include/intelblocks/acpi.h: https://review.coreboot.org/c/coreboot/+/59360/comment/adbdb475_bf4157ff PS3, Line 11: : #define CPUID_CORE_TYPE_INTEL_ATOM 0x20 : #define CPUID_CORE_TYPE_INTEL_CORE 0x40 > Maybe use an enum for this and also in the return value for the functions. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/59360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4ceb24d9bb1e808750bf618c29b2b9ea6d4191b Gerrit-Change-Number: 59360 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 29 Nov 2021 19:05:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: acpi/acpigen, drivers/tpm: Move definition of set_package_element_op
by build bot (Jenkins) (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Lance Zhao, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59729 ) Change subject: acpi/acpigen, drivers/tpm: Move definition of set_package_element_op ...................................................................... Patch Set 1: (1 comment) File src/include/acpi/acpigen.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134595): https://review.coreboot.org/c/coreboot/+/59729/comment/bd18c1e6_d45e5de1 PS1, Line 530: void acpigen_set_package_element_op(const char *package_name, unsigned int element, uint8_t src_op); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59729 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe70a1f369c97c67bbc1717e6adc7c5f4ba5839 Gerrit-Change-Number: 59729 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 29 Nov 2021 18:53:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbfstool/.gitignore: Add CSE tool executables
by Patrick Georgi (Code Review) 29 Nov '21

29 Nov '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59670 ) Change subject: util/cbfstool/.gitignore: Add CSE tool executables ...................................................................... util/cbfstool/.gitignore: Add CSE tool executables Commit 796aeeba96fc (util/cse_fpt: Add a new tool for managing Intel CSE FPT binaries) and commit d7fb6a90e1d0 (util/cse_serger: Add a new tool for stitching CSE components) add two utilities, and building cbfstool also generates executables for them. When building cbfstool standalone, these executables are placed in `util/cbfstool/`, and Git should never track them. Specify these executables' file names in .gitignore in order to prevent unintentional inclusion of these files in commits, which is very likely to happen when using `git add` on directories. Change-Id: I285a4d7aeee642822eaae2eb69e5d52efb4bc8c0 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59670 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/cbfstool/.gitignore 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved diff --git a/util/cbfstool/.gitignore b/util/cbfstool/.gitignore index 2de3ccb..0470a45 100644 --- a/util/cbfstool/.gitignore +++ b/util/cbfstool/.gitignore @@ -1,5 +1,7 @@ cbfs-compression-tool cbfstool +cse_fpt +cse_serger elogtool fmaptool ifittool -- To view, visit https://review.coreboot.org/c/coreboot/+/59670 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I285a4d7aeee642822eaae2eb69e5d52efb4bc8c0 Gerrit-Change-Number: 59670 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common: Add CPU related APIs
by Sridhar Siricilla (Code Review) 29 Nov '21

29 Nov '21

Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Tim Wawrzynczak, Sugnan Prabhu S, Subrata Banik, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59124 ) Change subject: soc/intel/common: Add CPU related APIs ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/include/intelblocks/cpulib.h: https://review.coreboot.org/c/coreboot/+/59124/comment/09ef028a_79b4266e PS4, Line 150: : : / > drop newline Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/59124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f43952ab4abce6e342206688ad32814970a91 Gerrit-Change-Number: 59124 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 29 Nov 2021 18:31:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2021