coreboot-gerrit October 2021

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Change in coreboot[master]: src/acpi to src/lib: Fix spelling errors
by Martin Roth (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Lance Zhao, Martin Roth, Philipp Hug, Tim Wawrzynczak, Christian Walter, Julius Werner, Ron Minnich, Felix Held. Hello Lance Zhao, build bot (Jenkins), Philipp Hug, Christian Walter, Tim Wawrzynczak, Angel Pons, Julius Werner, Philipp Hug, Ron Minnich, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58080 to look at the new patch set (#2). Change subject: src/acpi to src/lib: Fix spelling errors ...................................................................... src/acpi to src/lib: Fix spelling errors These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63 --- M src/acpi/acpi.c M src/acpi/device.c M src/arch/arm/armv7/cpu.S M src/arch/arm64/include/arch/asm.h M src/arch/riscv/fit_payload.c M src/arch/riscv/opensbi.c M src/arch/x86/c_start.S M src/commonlib/bsd/include/commonlib/bsd/compiler.h M src/commonlib/include/commonlib/iobuf.h M src/console/Kconfig M src/cpu/x86/64bit/exit32.inc M src/cpu/x86/pae/pgtbl.c M src/cpu/x86/sipi_vector.S M src/device/Kconfig M src/device/azalia_device.c M src/device/dram/ddr4.c M src/device/oprom/include/x86emu/regs.h M src/device/oprom/x86emu/LICENSE M src/device/oprom/x86emu/prim_ops.c M src/device/pci_early.c M src/device/pnp_device.c M src/device/resource_allocator_v4.c M src/drivers/amd/agesa/cache_as_ram.S M src/drivers/crb/tpm.c M src/drivers/generic/gpio_keys/chip.h M src/drivers/i2c/lm96000/chip.h M src/drivers/i2c/nct7802y/chip.h M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tpm.c M src/drivers/i2c/ww_ring/ww_ring_programs.c M src/drivers/i2c/ww_ring/ww_ring_programs.h M src/drivers/ipmi/ipmi_fru.c M src/drivers/ipmi/supermicro_oem.c M src/drivers/net/Kconfig M src/drivers/net/atl1e.c M src/drivers/net/r8168.c M src/drivers/spi/spi_sdcard.c M src/drivers/spi/tpm/tpm.c M src/ec/compal/ene932/acpi/ec.asl M src/ec/google/chromeec/ec.h M src/ec/google/chromeec/ec_commands.h M src/ec/google/wilco/commands.h M src/ec/quanta/ene_kb3940q/acpi/ec.asl M src/ec/quanta/it8518/acpi/battery.asl M src/ec/quanta/it8518/acpi/ec.asl M src/include/acpi/acpi.h M src/include/cpu/x86/save_state.h M src/include/device/i2c_simple.h M src/lib/device_tree.c M src/lib/edid.c M src/lib/nhlt.c M src/lib/region_file.c 52 files changed, 68 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/58080/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63 Gerrit-Change-Number: 58080 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Philipp Hug <philipp.hug(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Helper function to check CSE device `devfn` status
by Subrata Banik (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58064 ) Change subject: soc/intel/common: Helper function to check CSE device `devfn` status ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58064/comment/890bf406_34fe97e6 PS4, Line 7: soc/intel/common/../cse: Helper function to check CSE device `devfn` status > 72 chars wide for summary please Ack https://review.coreboot.org/c/coreboot/+/58064/comment/e32e9726_bb2a7b71 PS4, Line 10: all > any Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/58064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I208b07e89e3aa9d682837380809fbff01ea225b0 Gerrit-Change-Number: 58064 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:10:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Helper function to check CSE device `devfn` status
by Subrata Banik (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Furquan Shaikh, Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58064 to look at the new patch set (#6). Change subject: soc/intel/common: Helper function to check CSE device `devfn` status ...................................................................... soc/intel/common: Helper function to check CSE device `devfn` status This patch creates a helper function in cse common code block to check the status of any CSE `devfn`. Example: CSE, CSE_2, IDER, KT, CSE_3 and CSE_4. Currently cse common code is only able to read the device state of `PCH_DEVFN_CSE` CSE device alone. Additionally, print `slot` and 'func' number of CSE devices in case the device is either disable or hidden. BUG=b:200644229 TEST=Able to build and boot ADLRVP-P with this patch where the serial message listed the CSE devices that are disabled in the device tree as below: HECI: CSE device 16.01 is disabled HECI: CSE device 16.04 is disabled HECI: CSE device 16.05 is disabled Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Change-Id: I208b07e89e3aa9d682837380809fbff01ea225b0 --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 18 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/58064/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/58064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I208b07e89e3aa9d682837380809fbff01ea225b0 Gerrit-Change-Number: 58064 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Documentation: Fix spelling errors
by Martin Roth (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58078 ) Change subject: Documentation: Fix spelling errors ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58078/comment/7eb83267_3a731335 PS1, Line 7: . > commit summaries don't end with a period Done File Documentation/mainboard/asus/p8c_ws.md: https://review.coreboot.org/c/coreboot/+/58078/comment/af24e569_5391b0ee PS1, Line 59: - Complex WLM200NX (Qualcomm Atheros AR9220) in PCI slot > Indeed. Missed that in the review. Thanks. File Documentation/mainboard/supermicro/x9sae.md: https://review.coreboot.org/c/coreboot/+/58078/comment/b0405aec_054b2d80 PS1, Line 74: Complex > Indeed, Compex is a brand Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 Gerrit-Change-Number: 58078 Gerrit-PatchSet: 4 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:09:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/hermes: Fix PCIe ClkSrc configuration
by Michael Niewöhner (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Angel Pons. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58065 ) Change subject: mb/prodrive/hermes: Fix PCIe ClkSrc configuration ...................................................................... Patch Set 2: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58065/comment/8a62a0fb_bb6ffff2 PS2, Line 10: Apparently, FSP does not turn off unused PCIe clock sources when using > Yes, the ClkSrc configuration in FSP UPDs is wrong. […] Ah! Now I got it 😄 Yes, I guess it's not necessary since wrong values is reason enough for fixing it :-) https://review.coreboot.org/c/coreboot/+/58065/comment/7fa36c2d_935885fa PS2, Line 12: firmware. > I changed the CSME IFD to match the SPS IFD (and devicetree) and now all PCIe devices show up. […] erm, that change is required, bc the UPDs are plain wrong -- To view, visit https://review.coreboot.org/c/coreboot/+/58065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id25a34816f512510640db95251a7a792c1eebe62 Gerrit-Change-Number: 58065 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:09:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/adlrvp_m: Add hook function to return EC in RW status
by Tim Wawrzynczak (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Hsuan-ting Chen, Bernardo Perez Priego. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58099 ) Change subject: mb/adlrvp_m: Add hook function to return EC in RW status ...................................................................... Patch Set 2: (1 comment) File src/mainboard/intel/adlrvp/chromeos.c: https://review.coreboot.org/c/coreboot/+/58099/comment/77b834ae_96e624c1 PS2, Line 15: {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"}, should this be guarded by `BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_EXT_EC` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/58099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20804db450ab0b3ebe19c51ba2b294a0137d81a7 Gerrit-Change-Number: 58099 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:08:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: driver/intel/pmc_mux/conn: Add type-c port info to cbmem
by Furquan Shaikh (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Nico Huber, Nick Vaccaro, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57345 ) Change subject: driver/intel/pmc_mux/conn: Add type-c port info to cbmem ...................................................................... Patch Set 20: (1 comment) File src/drivers/intel/pmc_mux/conn/conn.c: https://review.coreboot.org/c/coreboot/+/57345/comment/cbef21eb_c801a918 PS20, Line 47: if (!acpi_is_wakeup_s3()) This check should be the first thing in the function so that you don't need to get cbmem buffer, etc. ``` const struct drivers_intel_pmc_mux_conn_config *config = config_of(dev); struct type_c_info *info; struct type_c_port_info *port_info; size_t count; /* Comment explaining why we don't need to add anything to CBMEM in this case. */ if (acpi_is_wakeup_s3()) return; info = conn_get_cbmem_buffer(); ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/57345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic56a1ad1b617e3af000664147d21165e6ea3a742 Gerrit-Change-Number: 57345 Gerrit-PatchSet: 20 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:08:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: driver/intel/pmc_mux/conn: Add type-c port info to cbmem
by Tim Wawrzynczak (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Nick Vaccaro, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57345 ) Change subject: driver/intel/pmc_mux/conn: Add type-c port info to cbmem ...................................................................... Patch Set 20: Code-Review+2 (1 comment) File src/drivers/intel/pmc_mux/conn/conn.c: https://review.coreboot.org/c/coreboot/+/57345/comment/b1b413d1_95c8c295 PS20, Line 47: if (!acpi_is_wakeup_s3()) nit: this looks like it will work, I just think it makes more sense as a separate check, i.e. ``` /* Do not re-run this code on resume */ if (acpi_is_wakeup_s3()) return; if (!info || (info->port_count >= total_conn_count)) { ... ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/57345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic56a1ad1b617e3af000664147d21165e6ea3a742 Gerrit-Change-Number: 57345 Gerrit-PatchSet: 20 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 18:07:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Fix spelling errors
by Martin Roth (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Martin Roth, Tim Wawrzynczak, Felix Held. Hello build bot (Jenkins), Paul Menzel, Tim Wawrzynczak, Angel Pons, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58078 to look at the new patch set (#2). Change subject: Documentation: Fix spelling errors ...................................................................... Documentation: Fix spelling errors These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 --- M Documentation/RFC/chip.tex M Documentation/acpi/devicetree.md M Documentation/arch/x86/index.md M Documentation/conf.py M Documentation/contributing/coding_style.md M Documentation/contributing/project_ideas.md M Documentation/drivers/index.md M Documentation/flash_tutorial/index.md M Documentation/gcov.txt M Documentation/getting_started/architecture.md M Documentation/getting_started/writing_documentation.md M Documentation/lib/payloads/fit.md M Documentation/lib/timestamp.md M Documentation/mainboard/amd/padmelon/padmelon.md M Documentation/mainboard/asus/p8c_ws.md M Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/lenovo/Ivy_Bridge_series.md M Documentation/mainboard/lenovo/Sandy_Bridge_series.md M Documentation/mainboard/lenovo/vboot.md M Documentation/mainboard/ocp/tiogapass.md M Documentation/mainboard/supermicro/x9sae.md M Documentation/mainboard/up/squared/index.md M Documentation/northbridge/intel/sandybridge/nri.md M Documentation/northbridge/intel/sandybridge/nri_freq.md M Documentation/northbridge/intel/sandybridge/nri_registers.md M Documentation/releases/coreboot-4.13-relnotes.md M Documentation/releases/coreboot-4.3-relnotes.md M Documentation/security/intel/txt.md M Documentation/security/smm.md M Documentation/security/vboot/measured_boot.md M Documentation/soc/cavium/cn81xx/index.md M Documentation/superio/common/ssdt.md M Documentation/superio/nuvoton/npcd378.md M Documentation/technotes/2020-03-unit-testing-coreboot.md M Documentation/tutorial/part1.md M Documentation/util.md 36 files changed, 45 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/58078/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 Gerrit-Change-Number: 58078 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/mainboard to src/security: Fix spelling errors
by Martin Roth (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Jason Glenesk, Martin Roth, Michał Żygowski, Frans Hendriks, Marshall Dawson, Tim Wawrzynczak, Christian Walter, Alexander Couzens, Patrick Rudolph, Piotr Król, Wim Vervoorn. Hello build bot (Jenkins), Frans Hendriks, Angel Pons, Patrick Rudolph, Piotr Król, Jason Glenesk, Michał Żygowski, Marshall Dawson, Christian Walter, Tim Wawrzynczak, Alexander Couzens, Felix Held, Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58081 to look at the new patch set (#2). Change subject: src/mainboard to src/security: Fix spelling errors ...................................................................... src/mainboard to src/security: Fix spelling errors These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79 --- M src/mainboard/amd/bilby/devicetree.cb M src/mainboard/amd/mandolin/variants/cereme/devicetree.cb M src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb M src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c M src/mainboard/emulation/qemu-armv7/memlayout.ld M src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h M src/mainboard/emulation/qemu-q35/bootblock.c M src/mainboard/facebook/fbg1701/ramstage.c M src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex M src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex M src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex M src/mainboard/google/daisy/mainboard.c M src/mainboard/google/foster/bct/jtag.cfg M src/mainboard/google/gru/pwm_regulator.c M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/mistral/romstage.c M src/mainboard/google/oak/mainboard.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/yorp/gpio.c M src/mainboard/google/peach_pit/mainboard.c M src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl M src/mainboard/google/smaug/bct/jtag.cfg M src/mainboard/google/stout/dsdt.asl M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/dg41wv/devicetree.cb M src/mainboard/intel/kblrvp/acpi/mipi_camera.asl M src/mainboard/jetway/nf81-t56n-lf/OemCustomize.c M src/mainboard/lenovo/s230u/acpi/ec.asl M src/mainboard/lippert/frontrunner-af/dsdt.asl M src/mainboard/portwell/m107/spd/KINGSTON_B5116ECMDXGGB.spd.hex M src/mainboard/portwell/m107/spd/MICRON_MT41K512M16HA-125A.spd.hex M src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex M src/mainboard/protectli/vault_bsw/romstage.c M src/mainboard/razer/blade_stealth_kbl/acpi/ec.asl M src/mainboard/roda/rk9/acpi/ec.asl M src/mainboard/roda/rk9/acpi/thermal.asl M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/ironlake/bootblock.c M src/northbridge/intel/sandybridge/raminit_common.c M src/security/intel/cbnt/logging.c M src/security/intel/stm/SmmStm.c M src/security/intel/txt/common.c M src/security/memory/memory_clear.c M src/security/tpm/tspi.h M src/security/tpm/tss/tcg-2.0/tss.c M src/security/tpm/tss/tcg-2.0/tss_marshaling.h 58 files changed, 64 insertions(+), 64 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/58081/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58081 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79 Gerrit-Change-Number: 58081 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2021