coreboot-gerrit October 2021

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Change in coreboot[master]: mb/ocp/deltalake: Fix SMBIOS type 9 bugs
by Johnny Lin (Code Review) 05 Oct '21

05 Oct '21

Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58100 ) Change subject: mb/ocp/deltalake: Fix SMBIOS type 9 bugs ...................................................................... mb/ocp/deltalake: Fix SMBIOS type 9 bugs 1. Fix PCIe slot capabilities was not really read from an IIO root port device. The Hot-Plug capability of IIO root port cannot be enabled due to FSP limitation, but the code should reflect the true capabilities by reading the root port device's CSR. 2. Clear the flag before the next for-loop iteration. Tested=On OCP Delta Lake, dmidecode -t 9 shows expected results. Change-Id: Iea437cdf3da5410b6b7a749a1be970f0948d92d9 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/mainboard/ocp/deltalake/ramstage.c 1 file changed, 12 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/58100/1 diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index 8d9de82..cdcfe83 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -198,7 +198,7 @@ uint8_t characteristics_2 = 0; uint32_t vendor_device_id; uint8_t stack_busnos[MAX_IIO_STACK]; - pci_devfn_t pci_dev; + pci_devfn_t pci_dev_slot, pci_dev = 0; unsigned int cap; uint16_t sltcap; @@ -251,14 +251,14 @@ else slot_length = SlotLengthShort; - pci_dev = PCI_DEV(stack_busnos[slotinfo[index].stack], + pci_dev_slot = PCI_DEV(stack_busnos[slotinfo[index].stack], slotinfo[index].dev_func >> 3, slotinfo[index].dev_func & 0x7); - sec_bus = pci_s_read_config8(pci_dev, PCI_SECONDARY_BUS); + sec_bus = pci_s_read_config8(pci_dev_slot, PCI_SECONDARY_BUS); if (sec_bus == 0xFF) { slot_usage = SlotUsageUnknown; } else { - /* Checking for Slot device availability */ + /* Checking for downstream device availability */ pci_dev = PCI_DEV(sec_bus, 0, 0); vendor_device_id = pci_s_read_config32(pci_dev, 0); if (vendor_device_id == 0xFFFFFFFF) @@ -269,13 +269,16 @@ characteristics_1 |= SMBIOS_SLOT_3P3V; // Provides33Volts characteristics_2 |= SMBIOS_SLOT_PME; // PmeSiganalSupported - - cap = pci_s_find_capability(pci_dev, PCI_CAP_ID_PCIE); - sltcap = pci_s_read_config16(pci_dev, cap + PCI_EXP_SLTCAP); + /* Read IIO root port device CSR for slot capabilities */ + cap = pci_s_find_capability(pci_dev_slot, PCI_CAP_ID_PCIE); + sltcap = pci_s_read_config16(pci_dev_slot, cap + PCI_EXP_SLTCAP); if (sltcap & PCI_EXP_SLTCAP_HPC) characteristics_2 |= SMBIOS_SLOT_HOTPLUG; const uint16_t slot_id = index + 1; + /* According to SMBIOS spec, the BDF number should be the end + point on the slot, for now we keep using the root port's BDF to + be aligned with our UEFI reference BIOS. */ length += smbios_write_type9(current, handle, slotinfo[index].slot_designator, slotinfo[index].slot_type, @@ -287,6 +290,8 @@ characteristics_2, stack_busnos[slotinfo[index].stack], slotinfo[index].dev_func); + characteristics_1 = 0; + characteristics_2 = 0; } return length; -- To view, visit https://review.coreboot.org/c/coreboot/+/58100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea437cdf3da5410b6b7a749a1be970f0948d92d9 Gerrit-Change-Number: 58100 Gerrit-PatchSet: 1 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 05 Oct '21

05 Oct '21

Kane Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/58093 ) Change subject: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/58093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 Gerrit-Change-Number: 58093 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 05 Oct '21

05 Oct '21

Kane Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/58094 ) Change subject: soc/intel/{apl,jsl,adl,tgl}: Remove smihandler_soc_disable_busmaster ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/58094 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec86bb8cac20c31e4283f7da3467fe09788f8044 Gerrit-Change-Number: 58094 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster
by Kane Chen (Code Review) 05 Oct '21

05 Oct '21

Attention is currently required from: Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58093 ) Change subject: soc/intel/common: Implement __weak smihandler_soc_disable_busmaster ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Hi Kane, my only concern is cnl, ekl, icl, skl, xeon_sp. […] hi Tim, Thanks for the comment. Sorry, I think I'm not able to find that many platforms to verify. But when I look at the common code, it still tries to access pmc io space after busmaster_disable_on_bus that's why I submit this code. i agree it's kind of risky without verifying on all platforms are impacted. -- To view, visit https://review.coreboot.org/c/coreboot/+/58093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ed7e6a3f60588bfb90481ea493495080dbbfd58 Gerrit-Change-Number: 58093 Gerrit-PatchSet: 2 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 05 Oct 2021 00:29:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_m: Enable touchpad
by Bernardo Perez Priego (Code Review) 04 Oct '21

04 Oct '21

Bernardo Perez Priego has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57863 ) Change subject: mb/intel/adlrvp_m: Enable touchpad ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/57863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78e5e133f7d3af47395819a79638a90fee4fd19e Gerrit-Change-Number: 57863 Gerrit-PatchSet: 2 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 23:27:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: elogtool: add pytest for elogtool
by Ricardo Quesada (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Furquan Shaikh, Jakub Czapiga, Jack Rosenthal. Ricardo Quesada has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57869 ) Change subject: elogtool: add pytest for elogtool ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Patrick/Jakub et al, would it be Ok if the code lands only as part of elogtool, without trying to integrate into coreboot's CI? Just as a helper tool to "elogtool" (similar to what other coreboot/util folders are doing) thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/57869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1241ad070d1c690c84f5ca61c0487ba27c2a287 Gerrit-Change-Number: 57869 Gerrit-PatchSet: 6 Gerrit-Owner: Ricardo Quesada <ricardoq(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 23:14:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: driver/intel/pmc_mux/conn: Add type-c port info to cbmem
by Furquan Shaikh (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57345 ) Change subject: driver/intel/pmc_mux/conn: Add type-c port info to cbmem ...................................................................... Patch Set 23: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic56a1ad1b617e3af000664147d21165e6ea3a742 Gerrit-Change-Number: 57345 Gerrit-PatchSet: 23 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 23:03:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/trogdor: Add new vaviant quackingstick
by Julius Werner (Code Review) 04 Oct '21

04 Oct '21

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58033 ) Change subject: mb/google/trogdor: Add new vaviant quackingstick ...................................................................... mb/google/trogdor: Add new vaviant quackingstick New boards introduced to trogdor family. BUG=b:201263032 BRANCH=none TEST=make Signed-off-by: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58033 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M Documentation/security/vboot/list_vboot.md M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/trogdor/Kconfig.name 3 files changed, 8 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/Documentation/security/vboot/list_vboot.md b/Documentation/security/vboot/list_vboot.md index 3e12a77..685f637 100644 --- a/Documentation/security/vboot/list_vboot.md +++ b/Documentation/security/vboot/list_vboot.md @@ -176,6 +176,7 @@ - Mrbland - Pazquel - Pompom +- Quackingstick - Trogdor - Wormdingler - Veyron_Jaq (Haier Chromebook 11) diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig index 1a8ad0c..be45bb0 100644 --- a/src/mainboard/google/trogdor/Kconfig +++ b/src/mainboard/google/trogdor/Kconfig @@ -14,8 +14,8 @@ config TROGDOR_HAS_MIPI_PANEL bool - default y if BOARD_GOOGLE_MRBLAND || BOARD_GOOGLE_WORMDINGLER - select MIPI_PANEL_AUO_B101UAN08_3 if BOARD_GOOGLE_MRBLAND + default y if BOARD_GOOGLE_MRBLAND || BOARD_GOOGLE_QUACKINGSTICK || BOARD_GOOGLE_WORMDINGLER + select MIPI_PANEL_AUO_B101UAN08_3 if BOARD_GOOGLE_MRBLAND || BOARD_GOOGLE_QUACKINGSTICK select MIPI_PANEL_BOE_TV101WUM_N53 if BOARD_GOOGLE_MRBLAND select MIPI_PANEL_INX_P110ZZD_DF0 if BOARD_GOOGLE_WORMDINGLER select MIPI_PANEL_BOE_TV110C9M_LL0 if BOARD_GOOGLE_WORMDINGLER @@ -79,6 +79,7 @@ default "Mrbland" if BOARD_GOOGLE_MRBLAND default "Pazquel" if BOARD_GOOGLE_PAZQUEL default "Pompom" if BOARD_GOOGLE_POMPOM + default "Quackingstick" if BOARD_GOOGLE_QUACKINGSTICK default "Trogdor" if BOARD_GOOGLE_TROGDOR default "Wormdingler" if BOARD_GOOGLE_WORMDINGLER diff --git a/src/mainboard/google/trogdor/Kconfig.name b/src/mainboard/google/trogdor/Kconfig.name index 136b15e..f5bd7ad 100644 --- a/src/mainboard/google/trogdor/Kconfig.name +++ b/src/mainboard/google/trogdor/Kconfig.name @@ -38,6 +38,10 @@ bool "-> Pompom" select BOARD_GOOGLE_TROGDOR_COMMON +config BOARD_GOOGLE_QUACKINGSTICK + bool "-> Quackingstick" + select BOARD_GOOGLE_TROGDOR_COMMON + config BOARD_GOOGLE_WORMDINGLER bool "-> Wormdingler" select BOARD_GOOGLE_TROGDOR_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/58033 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6 Gerrit-Change-Number: 58033 Gerrit-PatchSet: 4 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/trogdor: Add new vaviant quackingstick
by Julius Werner (Code Review) 04 Oct '21

04 Oct '21

Attention is currently required from: Paul Menzel, Bob Moragues, Sheng-Liang Pan. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58033 ) Change subject: mb/google/trogdor: Add new vaviant quackingstick ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58033 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8299ddda14eb82103f17f8464a14992aa757afa6 Gerrit-Change-Number: 58033 Gerrit-PatchSet: 3 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bob Moragues <moragues(a)chromium.org> Gerrit-Attention: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 04 Oct 2021 22:39:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: cbgfx: Clear screen by sequential access
by Julius Werner (Code Review) 04 Oct '21

04 Oct '21

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57104 ) Change subject: libpayload: cbgfx: Clear screen by sequential access ...................................................................... Patch Set 5: (1 comment) File payloads/libpayload/drivers/video/graphics.c: https://review.coreboot.org/c/coreboot/+/57104/comment/bc747049_7cfd29a3 PS4, Line 637: memset(FB, color & 0xff, fbinfo->y_resolution * bpl); > I think most people cannot identify the difference if we simply use #202020 or #21212121 ... […] The problem is probably memcpy()ing out of the framebuffer, since it's likely mapped with a memory type where read accesses are slow. Something like this would probably work better: uint8_t *line = alloca(bpl); for (int x = 0; x < fbinfo->x_resolution; x++) for (int i = 0; i < bpp / 8; i++) line[x * bpp + i] = color >> (i * 8); for (int y = 0; y < fbinfo->y_resolution; y++) memcpy(FB + y * bpl, line, bpl); -- To view, visit https://review.coreboot.org/c/coreboot/+/57104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iecaff5b6abc24ba4b3859cbc44c0d61b2a90b2d9 Gerrit-Change-Number: 57104 Gerrit-PatchSet: 5 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 04 Oct 2021 22:37:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit October 2021