coreboot-gerrit October 2021

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Change in coreboot[master]: Taeko: add support for GL9763E
by Kevin Chang (Code Review) 13 Oct '21

13 Oct '21

Kevin Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58297 ) Change subject: Taeko: add support for GL9763E ...................................................................... Taeko: add support for GL9763E support GL9763E as a eMMC boot disk BRANCH=none BUG=b:202192686 TEST=enable DRIVERS_GENESYSLOGIC_GL9763E and check eMMC on taeko. Signed-off-by: Kevin.Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: I5db2b229ce1bbea54efe15f5288f13f8d4656899 --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/58297/1 diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 7d95002..b7f73e1 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -52,6 +52,7 @@ config BOARD_GOOGLE_TAEKO bool "-> Taeko" select BOARD_GOOGLE_BASEBOARD_BRYA + select DRIVERS_GENESYSLOGIC_GL9763E config BOARD_GOOGLE_FELWINTER bool "-> Felwinter" -- To view, visit https://review.coreboot.org/c/coreboot/+/58297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5db2b229ce1bbea54efe15f5288f13f8d4656899 Gerrit-Change-Number: 58297 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/siemens/mc_ehl2: Adjust PCH serial IO settings
by Mario Scheithauer (Code Review) 13 Oct '21

13 Oct '21

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58296 ) Change subject: mb/siemens/mc_ehl2: Adjust PCH serial IO settings ...................................................................... mb/siemens/mc_ehl2: Adjust PCH serial IO settings Correct the PCH serial IO settings, suitable for this mainboard. Change-Id: I3c9915b2d52fbc6a15ac1e68c77bfb3983f7b1cd Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 6 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/58296/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 9d037ca..451c5dd 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -98,30 +98,19 @@ # LPSS Serial IO (I2C/UART/GSPI) related UPDs register "SerialIoI2cMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, - [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoDisabled, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexI2C6] = PchSerialIoDisabled, [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" - register "SerialIoI2cPadsTermination" = "{ - [PchSerialIoIndexI2C0] = 1, - [PchSerialIoIndexI2C1] = 1, - [PchSerialIoIndexI2C2] = 1, - [PchSerialIoIndexI2C3] = 1, - [PchSerialIoIndexI2C4] = 1, - [PchSerialIoIndexI2C5] = 1, - [PchSerialIoIndexI2C6] = 1, - [PchSerialIoIndexI2C7] = 1, - }" - register "SerialIoUartMode" = "{ - [PchSerialIoIndexUART0] = PchSerialIoDisabled, - [PchSerialIoIndexUART1] = PchSerialIoDisabled, + [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART1] = PchSerialIoPci, [PchSerialIoIndexUART2] = PchSerialIoSkipInit, }" -- To view, visit https://review.coreboot.org/c/coreboot/+/58296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9915b2d52fbc6a15ac1e68c77bfb3983f7b1cd Gerrit-Change-Number: 58296 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/siemens/mc_ehl2: Adjust USB settings
by Mario Scheithauer (Code Review) 13 Oct '21

13 Oct '21

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58295 ) Change subject: mb/siemens/mc_ehl2: Adjust USB settings ...................................................................... mb/siemens/mc_ehl2: Adjust USB settings Correct the USB settings, suitable for this mainboard. Change-Id: I691d91d2a76e27b8efdc18eeae737a78e9ae38fa Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/58295/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 06fdf0a..9d037ca 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -27,21 +27,21 @@ }" # USB related UPDs - register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A port 1 - register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A Port 2 - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Onboard USB - register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Port is unused - register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Port is unused + register "usb2_ports[0]" = "USB2_PORT_MID(OC2)" # X125/X135 + register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # X125/X135 + register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # X145/X155 + register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # X145/X155 + register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # USB Panel + register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # USB Panel + register "usb2_ports[6]" = "USB2_PORT_EMPTY" + register "usb2_ports[7]" = "USB2_PORT_EMPTY" + register "usb2_ports[8]" = "USB2_PORT_EMPTY" + register "usb2_ports[9]" = "USB2_PORT_EMPTY" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port1 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port2 - register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used - register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used + register "usb3_ports[2]" = "USB3_PORT_EMPTY" # UNUSED + register "usb3_ports[3]" = "USB3_PORT_EMPTY" # UNUSED # Skip the CPU repalcement check register "SkipCpuReplacementCheck" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/58295 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I691d91d2a76e27b8efdc18eeae737a78e9ae38fa Gerrit-Change-Number: 58295 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/siemens/mc_ehl2: Enable PCI devices
by Mario Scheithauer (Code Review) 13 Oct '21

13 Oct '21

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58294 ) Change subject: mb/siemens/mc_ehl2: Enable PCI devices ...................................................................... mb/siemens/mc_ehl2: Enable PCI devices Correct the remaining PCI devices, differing from the ehl1 mainboard. Change-Id: I8112fa5ea86e879741061798530150701b759156 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58294/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 062ac5f..06fdf0a 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -161,7 +161,7 @@ device pci 11.6 off end # Intel PSE IS20 device pci 11.7 off end # Intel PSE IS21 - device pci 12.0 off end # GSPI2 + device pci 12.0 on end # GSPI2 device pci 12.3 on end # Management Engine UMA Access device pci 12.4 on end # Management Engine PTT DMA Controller device pci 12.5 off end # UFS0 @@ -177,7 +177,7 @@ device pci 14.0 on end # USB3.1 xHCI device pci 14.1 off end # USB3.1 xDCI (OTG) - device pci 15.0 off end # I2C0 + device pci 15.0 on end # I2C0 device pci 15.1 on end # I2C1 device pci 15.2 on # I2C2 # Enable external RTC chip @@ -195,7 +195,7 @@ device i2c 0x32 on end # RTC RX6110 SA end end - device pci 15.3 off end # I2C3 + device pci 15.3 on end # I2C3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 on end # Management Engine Interface 2 @@ -213,7 +213,7 @@ device pci 18.6 off end # Intel PSE QEP3 device pci 19.0 on end # I2C4 - device pci 19.1 off end # I2C5 + device pci 19.1 on end # I2C5 device pci 19.2 on end # UART2 device pci 1a.0 on end # eMMC -- To view, visit https://review.coreboot.org/c/coreboot/+/58294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8112fa5ea86e879741061798530150701b759156 Gerrit-Change-Number: 58294 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/siemens/mc_ehl2: Set coreboot ready LED
by Mario Scheithauer (Code Review) 13 Oct '21

13 Oct '21

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58293 ) Change subject: mb/siemens/mc_ehl2: Set coreboot ready LED ...................................................................... mb/siemens/mc_ehl2: Set coreboot ready LED This mainboard has its own coreboot ready LED. The LED is switched on via GPIO GPP_F20. Change-Id: I3570d691e90d2cb6e11b856b876f0327da118522 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/58293/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c index 4ae857c..b979380 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c @@ -1,8 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <baseboard/variants.h> +#include <bootstate.h> #include <console/console.h> +#include <gpio.h> #include <intelblocks/pcr.h> +#include <soc/gpio.h> #include <soc/pcr_ids.h> void variant_mainboard_final(void) @@ -11,3 +14,11 @@ INTA#->PIRQC#, INTB#->PIRQD#, INTC#->PIRQA#, INTD#-> PIRQB# */ pcr_write16(PID_ITSS, 0x3150, 0x1032); } + +static void finalize_boot(void *unused) +{ + /* Set coreboot ready LED. */ + gpio_output(GPP_F20, 1); +} + +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/58293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3570d691e90d2cb6e11b856b876f0327da118522 Gerrit-Change-Number: 58293 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/sasukette: Add PIXA2635 touchpad
by Henry Sun (Code Review) 13 Oct '21

13 Oct '21

Attention is currently required from: Zhi7 Li, Karthik Ramasubramanian. Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58239 ) Change subject: mb/google/dedede/var/sasukette: Add PIXA2635 touchpad ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: LGTM, differ to Karthik to review. Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/58239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bc8353692a753ec9254ab02b4ff0481386624b2 Gerrit-Change-Number: 58239 Gerrit-PatchSet: 2 Gerrit-Owner: Zhi7 Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Echo Huang <huangrui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Zhi7 Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 13 Oct 2021 08:42:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: /mb/google/brya/var/taeko: Add fw_config probe for ALC5682-VS
by Joey Peng (Code Review) 13 Oct '21

13 Oct '21

Joey Peng has removed Tim Wawrzynczak from this change. ( https://review.coreboot.org/c/coreboot/+/58292 ) Change subject: /mb/google/brya/var/taeko: Add fw_config probe for ALC5682-VS ...................................................................... Removed reviewer Tim Wawrzynczak. -- To view, visit https://review.coreboot.org/c/coreboot/+/58292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I635b173e0fe4c46d28f2c29fecee1998b29499b1 Gerrit-Change-Number: 58292 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: /mb/google/brya/var/taeko: Add fw_config probe for ALC5682-VS
by Joey Peng (Code Review) 13 Oct '21

13 Oct '21

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58292 ) Change subject: /mb/google/brya/var/taeko: Add fw_config probe for ALC5682-VS ...................................................................... /mb/google/brya/var/taeko: Add fw_config probe for ALC5682-VS ALC5682-VD/ALC5682-VS load different kernel driver by different hid name. Update hid name depending on the AUDIO field of fw_config. Define fw config bit 3-5 in coreboot for codec. BUG=b:202913837 TEST=FW_NAME=taeko emerge-brya coreboot Change-Id: I635b173e0fe4c46d28f2c29fecee1998b29499b1 Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> --- M src/mainboard/google/brya/variants/taeko/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/58292/1 diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 70db169..c0ed9ee 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -14,6 +14,7 @@ field AUDIO 5 7 option AUDIO_UNKNOWN 0 option AUDIO_MAX98357_ALC5682I_I2S 1 + option AUDIO_MAX98357_ALC5682I_VS_I2S 2 end field KB_LAYOUT 8 9 option KB_LAYOUT_DEFAULT 0 @@ -102,6 +103,20 @@ probe AUDIO AUDIO_MAX98357_ALC5682I_I2S end end + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Headset Codec"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" + # Set the jd_src to RT5668_JD1 for jack detection + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on + probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S + end + end end device ref i2c1 on chip drivers/i2c/hid -- To view, visit https://review.coreboot.org/c/coreboot/+/58292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I635b173e0fe4c46d28f2c29fecee1998b29499b1 Gerrit-Change-Number: 58292 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/sasukette: Add PIXA2635 touchpad
by Weimin Wu (Code Review) 13 Oct '21

13 Oct '21

Attention is currently required from: Zhi7 Li. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58239 ) Change subject: mb/google/dedede/var/sasukette: Add PIXA2635 touchpad ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: double-checked -- To view, visit https://review.coreboot.org/c/coreboot/+/58239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bc8353692a753ec9254ab02b4ff0481386624b2 Gerrit-Change-Number: 58239 Gerrit-PatchSet: 2 Gerrit-Owner: Zhi7 Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Echo Huang <huangrui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Zhi7 Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 13 Oct 2021 08:17:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Add hook function to return EC in RW status
by Hsuan-ting Chen (Code Review) 13 Oct '21

13 Oct '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Selma Bensaid, Paul Menzel, Tim Wawrzynczak, Bernardo Perez Priego. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58099 ) Change subject: mb/intel/adlrvp: Add hook function to return EC in RW status ...................................................................... Patch Set 9: (1 comment) File src/mainboard/intel/adlrvp/chromeos.c: https://review.coreboot.org/c/coreboot/+/58099/comment/d3fdc64a_e1abf60a PS9, Line 51: get_ec_is_trusted We decided to revert this get_ec_is_trusted() function for now, and will proceed another reland since there were some GPIOs we did not handled them properly. (https://review.coreboot.org/c/coreboot/+/57951) So please remove this function for now, and we will add it back once we are going to re-land get_ec_is_trusted() But it is still okay to config the EC_IN_RW as the early_gpio in this CL, and only remove this override for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/58099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20804db450ab0b3ebe19c51ba2b294a0137d81a7 Gerrit-Change-Number: 58099 Gerrit-PatchSet: 9 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Wed, 13 Oct 2021 08:15:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2021