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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/guybrush/var/nipperkin: config eSPI alert as in-band
......................................................................
mb/google/guybrush/var/nipperkin: config eSPI alert as in-band
To prevent unexpected alert from eSPI to SOC, configure this alert pin
to in-band.
BUG=b:199458949
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com>
Change-Id: I18d38fe504bd9f2069b9977d5a35729691f672d1
---
M src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/57976/4
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55198 )
Change subject: [RFC,WIP] cpu/x86/lapic: Evaluate x2apic_mode just once
......................................................................
Patch Set 12: Code-Review+1
(1 comment)
File src/include/cpu/x86/lapic.h:
https://review.coreboot.org/c/coreboot/+/55198/comment/42b5bfd9_7cdec61f
PS12, Line 84: return x2apic_mode_enabled;
I think it makes sense to return false when `is_x2apic_mode()` is called before `enable_lapic()` has been called.
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Change subject: cpu/x86/lapic: Do not set read-only bits in LVTx
......................................................................
Patch Set 7: Code-Review+2
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Change subject: cpu/x86/lapic: Split virtual_wire_mode_init()
......................................................................
Patch Set 11: Code-Review+2
(1 comment)
File src/cpu/x86/lapic/lapic.c:
https://review.coreboot.org/c/coreboot/+/55261/comment/cd716b59_26292140
PS8, Line 21: printk(BIOS_INFO, "Setting up local APIC 0x%x\n", lapicid());
> I am assuming accessing the MMIO (xapic) or MSR (x2apic) register bank before the LAPIC is enabled m […]
Ack
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Change subject: acpigen,soc/amd/cezanne,intel/{common,skl}: rework CPPC table passing
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS8:
> > Out of the many changes, I think what I actually don't like is to remove the struct. Maybe we should keep the acpigen API as is but do all the other clean-up?
>
> Ack
An advantage of keeping struct types is that there's no need to use `memcpy()`, structs can be copied using a regular assignment. CB:56265 is an example.
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Change subject: libpayload: Add unit-tests framework and first test case
......................................................................
Patch Set 4:
(2 comments)
File payloads/libpayload/Makefile:
https://review.coreboot.org/c/coreboot/+/58242/comment/99d5a29a_d1d63f8a
PS4, Line 120: # 3. when make distclean is run
Please update the comments.
File payloads/libpayload/tests/Makefile.inc:
PS4:
Looks like most of the content is copied from coreboot/tests/Makefile.inc.
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: Taeko: add support for GL9763E
......................................................................
Taeko: add support for GL9763E
support GL9763E as a eMMC boot disk
BRANCH=none
BUG=b:202192686
TEST=enable DRIVERS_GENESYSLOGIC_GL9763E and check eMMC on taeko.
Cq-Depend: chromium:3153210
Signed-off-by: Kevin.Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Change-Id: I5db2b229ce1bbea54efe15f5288f13f8d4656899
---
M src/mainboard/google/brya/Kconfig.name
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/58297/2
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