coreboot-gerrit January 2021

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Change in coreboot[master]: mb/google/dedede: Disable Fast slew rate for deeper c states
by Maulik V Vaghela (Code Review) 06 Jan '21

06 Jan '21

Hello build bot (Jenkins), Ronak Kanabar, Divagar Mohandass, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49134 to look at the new patch set (#4). Change subject: mb/google/dedede: Disable Fast slew rate for deeper c states ...................................................................... mb/google/dedede: Disable Fast slew rate for deeper c states We need to disable fast slew rate for deeper package C states while enabling acoustic noise mitigations. BUG=b:162192346 BRANCH=dedede TEST=correct value has been programmed and slew rate measurement is correct on scope. Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/49134/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/49134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Gerrit-Change-Number: 49134 Gerrit-PatchSet: 4 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Enable USBSUSPGQDIS for s0ix qualification
by Maulik V Vaghela (Code Review) 06 Jan '21

06 Jan '21

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49012 ) Change subject: soc/intel/jasperlake: Enable USBSUSPGQDIS for s0ix qualification ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/49012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20bad3f79141799c88a16272ea822b9e3dede504 Gerrit-Change-Number: 49012 Gerrit-PatchSet: 1 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Deepti Vaidya <deepti.vaidya(a)intel.com> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:35:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Enable USBSUSPGQDIS for s0ix qualification
by Maulik V Vaghela (Code Review) 06 Jan '21

06 Jan '21

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49012 ) Change subject: soc/intel/jasperlake: Enable USBSUSPGQDIS for s0ix qualification ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/49012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20bad3f79141799c88a16272ea822b9e3dede504 Gerrit-Change-Number: 49012 Gerrit-PatchSet: 1 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Deepti Vaidya <deepti.vaidya(a)intel.com> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:35:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Disable fast slew rate for deeper c states
by Maulik V Vaghela (Code Review) 06 Jan '21

06 Jan '21

Hello build bot (Jenkins), Ronak Kanabar, Divagar Mohandass, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49134 to look at the new patch set (#3). Change subject: mb/google/dedede: Disable fast slew rate for deeper c states ...................................................................... mb/google/dedede: Disable fast slew rate for deeper c states We need to disable fast slew rate for deeper package C states while enabling acoustic noise mitigations. BUG=None BRANCH=dedede TEST=correct value has been programmed and slew rate measurement is correct on scope. Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/49134/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/49134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Gerrit-Change-Number: 49134 Gerrit-PatchSet: 3 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: Disable Fast slew rate for deeper c states
by Maulik V Vaghela (Code Review) 06 Jan '21

06 Jan '21

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49134 ) Change subject: mb/google/dedede: Disable Fast slew rate for deeper c states ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/49134/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/49134/2//COMMIT_MSG@9 PS2, Line 9: We need to disable fast slew rate for deeper package C states : while enabling acoustic noise mitigations. > Is this always the case? If so, I'd suggest handling this in SoC code instead. This is only applicable if we enable acoustic noise mitigation from board. This is the reason for keeping it in mainboard where we enable Acoustic Noise mitigation feature. -- To view, visit https://review.coreboot.org/c/coreboot/+/49134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Gerrit-Change-Number: 49134 Gerrit-PatchSet: 2 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:34:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries
by Michael Niewöhner (Code Review) 06 Jan '21

06 Jan '21

Michael Niewöhner has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47542 ) Change subject: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries ...................................................................... Abandoned APL does not support CPPC / HWP -- To view, visit https://review.coreboot.org/c/coreboot/+/47542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic94d95413d2f7f6743507824d47d5afd9fdfbbb9 Gerrit-Change-Number: 47542 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries
by Michael Niewöhner (Code Review) 06 Jan '21

06 Jan '21

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47542 ) Change subject: [UNTESTED] soc/intel/apl: enable ACPI CPPC entries ...................................................................... Patch Set 11: > Patch Set 11: > > There's no HWP support on APL and maybe other small core processor. So I believe you can drop this commit. Indeed, thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/47542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic94d95413d2f7f6743507824d47d5afd9fdfbbb9 Gerrit-Change-Number: 47542 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:30:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede: Disable Fast slew rate for deeper c states
by Karthik Ramasubramanian (Code Review) 06 Jan '21

06 Jan '21

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49134 ) Change subject: mb/google/dedede: Disable Fast slew rate for deeper c states ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/49134/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/49134/2//COMMIT_MSG@9 PS2, Line 9: We need to disable fast slew rate for deeper package C states : while enabling acoustic noise mitigations. > Is this always the case? If so, I'd suggest handling this in SoC code instead. The UPD documentation says depending on whether Acoustic Noise Mitigation is enabled, this can be disabled. If so, as Angel Pons mentioned, it can be set in the SoC code itself based on the status of Acoustic Noise Mitigation feature. -- To view, visit https://review.coreboot.org/c/coreboot/+/49134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6 Gerrit-Change-Number: 49134 Gerrit-PatchSet: 2 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:30:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl,adl}: enable ACPI CPPC entries
by Michael Niewöhner (Code Review) 06 Jan '21

06 Jan '21

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47543 ) Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl,adl}: enable ACPI CPPC entries ...................................................................... Patch Set 11: > Patch Set 11: > > Looks like you need drop ADL/EHL/JSL since they may not support HWP. @Subrata,is that true? ehl platform sample code implements cppc; not sure about adl and jsl, though -- To view, visit https://review.coreboot.org/c/coreboot/+/47543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910b4e17d4044f1bf1ecfa0643ac62fc7a8cb51b Gerrit-Change-Number: 47543 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:30:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl,adl}: enable ACPI CPPC entries
by Lance Zhao (Code Review) 06 Jan '21

06 Jan '21

Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47543 ) Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl,adl}: enable ACPI CPPC entries ...................................................................... Patch Set 11: Looks like you need drop ADL/EHL/JSL since they may not support HWP. @Subrata,is that true? -- To view, visit https://review.coreboot.org/c/coreboot/+/47543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910b4e17d4044f1bf1ecfa0643ac62fc7a8cb51b Gerrit-Change-Number: 47543 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jan 2021 16:28:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2021