Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45858 )
Change subject: x86/smbios: Set SMBIOS type 17 SPD_RDIMM form factor to DIMM
......................................................................
x86/smbios: Set SMBIOS type 17 SPD_RDIMM form factor to DIMM
Change-Id: I2d8038c926379636839213a6b4cda491cd146852
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
---
M src/arch/x86/smbios.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/45858/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index e33b70f..94c6f70 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -301,6 +301,8 @@
switch (dimm->mod_type) {
case SPD_RDIMM:
+ t->form_factor = MEMORY_FORMFACTOR_DIMM;
+ break;
case SPD_MINI_RDIMM:
t->form_factor = MEMORY_FORMFACTOR_RIMM;
break;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2d8038c926379636839213a6b4cda491cd146852
Gerrit-Change-Number: 45858
Gerrit-PatchSet: 1
Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-MessageType: newchange
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45790 )
Change subject: soc/intel/apollolake: Add PCH_IRQx into irq.h
......................................................................
soc/intel/apollolake: Add PCH_IRQx into irq.h
Change-Id: I5d0e8dbf8f8e52caf4ba78c0e3969efaac387204
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/apollolake/include/soc/irq.h
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/45790/1
diff --git a/src/soc/intel/apollolake/include/soc/irq.h b/src/soc/intel/apollolake/include/soc/irq.h
index ae7af1a..8e28ca1 100644
--- a/src/soc/intel/apollolake/include/soc/irq.h
+++ b/src/soc/intel/apollolake/include/soc/irq.h
@@ -8,6 +8,8 @@
#define LPSS_UART1_IRQ 5 /* Need to be shared by PMC and SCC only*/
#define LPSS_UART2_IRQ 6 /* Need to be shared by PMC and SCC only*/
#define LPSS_UART3_IRQ 7 /* Need to be shared by PMC and SCC only*/
+#define PCH_IRQ10 10
+#define PCH_IRQ11 11
#define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/
#define GPIO_BANK_INT 14
#define NPK_INT 16
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5d0e8dbf8f8e52caf4ba78c0e3969efaac387204
Gerrit-Change-Number: 45790
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-MessageType: newchange
Daniel Kang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45058 )
Change subject: mb/google/volteer: Change default camera power GPIO to 0
......................................................................
mb/google/volteer: Change default camera power GPIO to 0
The default GPIO values for camera power were set as 1 so the LED was
turned on by default when the board is powered on.
This status is kept until the camera is probed then being turned off.
So the LED is turned on for a few seconds during the boot up.
By setting the default power to 0, the LED is lit only when camera
is turned on for probing and this should be a just blink.
BUG=b:167635396
BRANCH=none
TEST=Build and boot volteer proto 2 board. Monitor camera privacy LED
and check it is not lit more than 0.5 seconds.
Signed-off-by: Daniel Kang <daniel.h.kang(a)intel.com>
Change-Id: Ic7df391aa512daafe6e1ce49e9222b90e17ad806
---
M src/mainboard/google/volteer/variants/volteer/gpio.c
1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/45058/1
diff --git a/src/mainboard/google/volteer/variants/volteer/gpio.c b/src/mainboard/google/volteer/variants/volteer/gpio.c
index fd355a8..693cf1b 100644
--- a/src/mainboard/google/volteer/variants/volteer/gpio.c
+++ b/src/mainboard/google/volteer/variants/volteer/gpio.c
@@ -93,9 +93,9 @@
/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
PAD_NC(GPP_D16, UP_20K),
/* D17 : ISH_GP4 ==> EN_FCAM_PWR */
- PAD_CFG_GPO(GPP_D17, 1, DEEP),
+ PAD_CFG_GPO(GPP_D17, 0, DEEP),
/* D18 : ISH_GP5 ==> FCAM_SNRPWR_EN */
- PAD_CFG_GPO(GPP_D18, 1, DEEP),
+ PAD_CFG_GPO(GPP_D18, 0, DEEP),
/* E1 : SPI1_IO2 ==> PEN_DET_ODL */
PAD_CFG_GPI_SCI(GPP_E1, NONE, DEEP, EDGE_SINGLE, NONE),
@@ -154,7 +154,7 @@
/* H13 : M2_SKT2_CFG1 # ==> WWAN_CONFIG1 */
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
/* H14 : M2_SKT2_CFG2 # ==> RCAM_SNRPWR_EN */
- PAD_CFG_GPO(GPP_H14, 1, DEEP),
+ PAD_CFG_GPO(GPP_H14, 0, DEEP),
/* H15 : M2_SKT2_CFG3 # ==> WWAN_CONFIG3 */
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
/* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */
@@ -164,7 +164,7 @@
/* H19 : TIME_SYNC0 ==> USER_PRES_FP_ODL */
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
/* H20 : IMGCLKOUT1 ==> EN_MIPI_RCAM_PWR */
- PAD_CFG_GPO(GPP_H20, 1, DEEP),
+ PAD_CFG_GPO(GPP_H20, 0, DEEP),
/* H21 : IMGCLKOUT2 ==> CAM_MCLK1 */
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
/* H22 : IMGCLKOUT3 ==> CAM_MCLK0 */
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ic7df391aa512daafe6e1ce49e9222b90e17ad806
Gerrit-Change-Number: 45058
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Kang <daniel.h.kang(a)intel.com>
Gerrit-MessageType: newchange