coreboot-gerrit July 2020

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Change in coreboot[master]: azalia: rename TYPE_OTHER to not conflict with smbios'
by Patrick Georgi (Code Review) 04 Jul '20

04 Jul '20

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43135 ) Change subject: azalia: rename TYPE_OTHER to not conflict with smbios' ...................................................................... azalia: rename TYPE_OTHER to not conflict with smbios' Change-Id: Ic66f7c919a71cb53773d5056e5f756cd6faf4909 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/include/device/azalia_device.h M src/mainboard/prodrive/hermes/hda_verb.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/43135/1 diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 9026091..f2a2cb8 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -39,7 +39,7 @@ }; enum azalia_pin_type { - TYPE_UNKNOWN = 0, + PIN_TYPE_UNKNOWN = 0, STEREO_MONO_1_8, STEREO_MONO_1_4, ATAPI, @@ -51,7 +51,7 @@ XLR, RJ_11, COMBINATION, - TYPE_OTHER = 0xf + PIN_TYPE_OTHER = 0xf }; enum azalia_pin_device { diff --git a/src/mainboard/prodrive/hermes/hda_verb.c b/src/mainboard/prodrive/hermes/hda_verb.c index 59b8aa6..260b9a5 100644 --- a/src/mainboard/prodrive/hermes/hda_verb.c +++ b/src/mainboard/prodrive/hermes/hda_verb.c @@ -87,7 +87,7 @@ LOCATION_OTHER, NA, DEVICE_OTHER, - TYPE_OTHER, + PIN_TYPE_OTHER, COLOR_OTHER, true, 0, @@ -99,7 +99,7 @@ LOCATION_OTHER, NA, DEVICE_OTHER, - TYPE_OTHER, + PIN_TYPE_OTHER, COLOR_OTHER, true, 0, -- To view, visit https://review.coreboot.org/c/coreboot/+/43135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic66f7c919a71cb53773d5056e5f756cd6faf4909 Gerrit-Change-Number: 43135 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Johnny Lin (Code Review) 04 Jul '20

04 Jul '20

Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40308 ) Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... Patch Set 53: > Patch Set 53: > > @Johnny I have overseen a comment of you. Can you do a follow up and fix the remaining issues Is there a comment that I need to follow up? Can you point it out I cannot find it. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 53 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 04 Jul 2020 15:54:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/supermicro/x11-lga1151v2-series: Add support for X11SCH-F
by Christian Walter (Code Review) 04 Jul '20

04 Jul '20

Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37441 ) Change subject: mb/supermicro/x11-lga1151v2-series: Add support for X11SCH-F ...................................................................... Patch Set 60: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/37441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ab1cb9462607b9af068bc2374508d99c60d0a30 Gerrit-Change-Number: 37441 Gerrit-PatchSet: 60 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Guido Beyer @ Prodrive Technologies <guido.beyer(a)prodrive-technologies.com> Gerrit-Reviewer: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stef van Os <stef.van.os(a)prodrive-technologies.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wouter.eckhardt(a)prodrive-technologies.com Gerrit-CC: Jonas Löffelholz Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 04 Jul 2020 14:25:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/dg43gt: Don't redefine VGA_BIOS_ID and MMCONF_BASE_ADDRESS
by HAOUAS Elyes (Code Review) 04 Jul '20

04 Jul '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43134 ) Change subject: mb/intel/dg43gt: Don't redefine VGA_BIOS_ID and MMCONF_BASE_ADDRESS ...................................................................... mb/intel/dg43gt: Don't redefine VGA_BIOS_ID and MMCONF_BASE_ADDRESS Both are already defined at northbridge/intel/x4x/Kconfig. Change-Id: I57eb0f66d60d7120262c0993ac84e83b98ce991e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/intel/dg43gt/Kconfig 1 file changed, 0 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/43134/1 diff --git a/src/mainboard/intel/dg43gt/Kconfig b/src/mainboard/intel/dg43gt/Kconfig index 8bf4585..8fcbb48 100644 --- a/src/mainboard/intel/dg43gt/Kconfig +++ b/src/mainboard/intel/dg43gt/Kconfig @@ -21,15 +21,6 @@ select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_USES_IFD_GBE_REGION -config VGA_BIOS_ID - string - default "8086,2e22" - - -config MMCONF_BASE_ADDRESS - hex - default 0xe0000000 - config MAINBOARD_DIR string default "intel/dg43gt" -- To view, visit https://review.coreboot.org/c/coreboot/+/43134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57eb0f66d60d7120262c0993ac84e83b98ce991e Gerrit-Change-Number: 43134 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Philipp Deppenwiese (Code Review) 04 Jul '20

04 Jul '20

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40308 ) Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... Patch Set 53: @Johnny I have overseen a comment of you. Can you do a follow up and fix the remaining issues -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 53 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 04 Jul 2020 11:34:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS fro...
by Philipp Deppenwiese (Code Review) 04 Jul '20

04 Jul '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Patrick Rudolph, Jonathan Zhang, Maxim Polyakov, Johnny Lin, Christian Walter, David Hendricks, Jingle Hsu, Morgan Jang, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/43064 to review the following change. Change subject: Revert "drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data" ...................................................................... Revert "drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data" This reverts commit ad0ccb336d0184c7e4bd8157483bc80a5dfd5ab4. Reason for revert: Overseen a comment Change-Id: I96a3f96fdfb4919f5040d218d2d05c076ae9e86f --- D src/drivers/ocp/dmi/Kconfig D src/drivers/ocp/dmi/Makefile.inc D src/drivers/ocp/dmi/ocp_dmi.h D src/drivers/ocp/dmi/smbios.c 4 files changed, 0 insertions(+), 293 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/43064/1 diff --git a/src/drivers/ocp/dmi/Kconfig b/src/drivers/ocp/dmi/Kconfig deleted file mode 100644 index b30a40d..0000000 --- a/src/drivers/ocp/dmi/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -config OCP_DMI - bool - default n - depends on IPMI_KCS && GENERATE_SMBIOS_TABLES && XEON_SP_COMMON_BASE - help - It implements the SMBIOS IPMI FRU mapping table defined in - https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 - 22.3 SMBIOS FRU mapping table - -config FRU_DEVICE_ID - int - default 0 diff --git a/src/drivers/ocp/dmi/Makefile.inc b/src/drivers/ocp/dmi/Makefile.inc deleted file mode 100644 index 587ac89..0000000 --- a/src/drivers/ocp/dmi/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-$(CONFIG_OCP_DMI) += smbios.c diff --git a/src/drivers/ocp/dmi/ocp_dmi.h b/src/drivers/ocp/dmi/ocp_dmi.h deleted file mode 100644 index ef0c740..0000000 --- a/src/drivers/ocp/dmi/ocp_dmi.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#ifndef __OCP_DMI_H -#define __OCP_DMI_H - -#include <cpu/x86/msr.h> -#include <device/device.h> -#include <smbios.h> - -#define TBF "To Be Filled By O.E.M." - -extern msr_t xeon_sp_ppin[]; - -/* Override SMBIOS type 11 OEM string 1 to string 6 */ -void ocp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t); - -/* This function allows adding the same repeated string to the table */ -int smbios_add_oem_string(u8 *start, const char *str); - -#endif diff --git a/src/drivers/ocp/dmi/smbios.c b/src/drivers/ocp/dmi/smbios.c deleted file mode 100644 index 4e54af0..0000000 --- a/src/drivers/ocp/dmi/smbios.c +++ /dev/null @@ -1,260 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <console/console.h> -#include <device/device.h> -#include <drivers/ipmi/ipmi_ops.h> -#include <delay.h> -#include <cpu/x86/mp.h> -#include <timer.h> -#include <stdio.h> -#include <string.h> -#include <soc/soc_util.h> -#include <soc/cpu.h> -#include <smbios.h> - -#include "ocp_dmi.h" - -#define PPIN_STR_LEN 17 - -struct fru_info_str fru_strings = {0}; -/* The spec defines only at most 2 sockets */ -msr_t xeon_sp_ppin[2] = {0}; -static bool remote_ppin_done = false; - -/* Override SMBIOS type 1 data. */ -const char *smbios_system_manufacturer(void) -{ - if (fru_strings.prod_info.manufacturer != NULL) - return (const char *)fru_strings.prod_info.manufacturer; - else - return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; -} - -const char *smbios_system_product_name(void) -{ - if (fru_strings.board_info.product_name != NULL) - return (const char *)fru_strings.prod_info.product_name; - else - return CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME; -} - -const char *smbios_system_serial_number(void) -{ - if (fru_strings.prod_info.serial_number != NULL) - return (const char *)fru_strings.prod_info.serial_number; - else - return CONFIG_MAINBOARD_SERIAL_NUMBER; -} - -const char *smbios_system_version(void) -{ - if (fru_strings.prod_info.product_version != NULL) - return (const char *)fru_strings.prod_info.product_version; - else - return CONFIG_MAINBOARD_VERSION; -} - -/* Override SMBIOS type 1 uuid from the value from BMC. */ -void smbios_system_set_uuid(u8 *uuid) -{ - ipmi_get_system_guid(CONFIG_BMC_KCS_BASE, uuid); -} - -/* Override SMBIOS type 2 data. */ -const char *smbios_mainboard_version(void) -{ - if (fru_strings.board_info.part_number != NULL) - return (const char *)fru_strings.board_info.part_number; - else - return CONFIG_MAINBOARD_VERSION; -} - -const char *smbios_mainboard_manufacturer(void) -{ - if (fru_strings.board_info.manufacturer != NULL) - return (const char *)fru_strings.board_info.manufacturer; - else - return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; -} - -const char *smbios_mainboard_product_name(void) -{ - if (fru_strings.board_info.product_name != NULL) - return (const char *)fru_strings.board_info.product_name; - else - return CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME; -} - -const char *smbios_mainboard_serial_number(void) -{ - if (fru_strings.board_info.serial_number != NULL) - return (const char *)fru_strings.board_info.serial_number; - else - return CONFIG_MAINBOARD_SERIAL_NUMBER; -} - -/* Override SMBIOS type 2 and 3 asset_tag data. */ -const char *smbios_mainboard_asset_tag(void) -{ - if (fru_strings.prod_info.asset_tag != NULL) - return (const char *)fru_strings.prod_info.asset_tag; - else - return ""; -} - -/* Override SMBIOS type 3 data. */ -smbios_enclosure_type smbios_mainboard_enclosure_type(void) -{ - /* SMBIOS System Enclosure or Chassis Types are values from 0 to 20h. */ - if (fru_strings.chassis_info.chassis_type <= 0x20) - return fru_strings.chassis_info.chassis_type; - else - return SMBIOS_ENCLOSURE_RACK_MOUNT_CHASSIS; -} - -const char *smbios_chassis_version(void) -{ - if (fru_strings.chassis_info.chassis_partnumber != NULL) - return fru_strings.chassis_info.chassis_partnumber; - else - return ""; -} - -const char *smbios_chassis_serial_number(void) -{ - if (fru_strings.chassis_info.serial_number != NULL) - return fru_strings.chassis_info.serial_number; - else - return ""; -} - -/* Override SMBIOS type 4 processor serial numbers from FRU Chassis custom data. */ -const char *smbios_processor_serial_number(void) -{ - /* For now type 4 only creates for one CPU, so it can only write the serial number - * of CPU0. - */ - if (*fru_strings.chassis_info.chassis_custom != NULL) - return *fru_strings.chassis_info.chassis_custom; - else - return ""; -} - -static void read_remote_ppin(void *data) -{ - *(msr_t *)data = read_msr_ppin(); - remote_ppin_done = true; -} - -static void wait_for_remote_ppin(void) -{ - struct stopwatch sw; - - stopwatch_init_msecs_expire(&sw, 500); - while (!stopwatch_expired(&sw)) { - if (remote_ppin_done) - break; - mdelay(100); - } - if (stopwatch_expired(&sw)) - printk(BIOS_ERR, "Wait for read_remote_ppin() timeout\n"); -} - -int smbios_add_oem_string(u8 *start, const char *str) -{ - int i = 1; - char *p = (char *)start; - - if (*str == '\0') - return 0; - - for (;;) { - if (!*p) { - strcpy(p, str); - p += strlen(str); - *p++ = '\0'; - *p++ = '\0'; - return i; - } - - p += strlen(p)+1; - i++; - } -} - -/* When the most significant 4 bits of PPIN hi/lo are 0, add '0' to the beginning */ -static void ppin_string_fixup(int i, char *ppin) -{ - if ((xeon_sp_ppin[i].hi & 0xf0000000) == 0) { - if ((xeon_sp_ppin[i].lo & 0xf0000000) == 0) - snprintf(ppin, PPIN_STR_LEN, "0%x0%x", xeon_sp_ppin[i].hi, - xeon_sp_ppin[i].lo); - else - snprintf(ppin, PPIN_STR_LEN, "0%x%x", xeon_sp_ppin[i].hi, - xeon_sp_ppin[i].lo); - } else if ((xeon_sp_ppin[i].lo & 0xf0000000) == 0) { - snprintf(ppin, PPIN_STR_LEN, "%x0%x", xeon_sp_ppin[i].hi, xeon_sp_ppin[i].lo); - } else { - snprintf(ppin, PPIN_STR_LEN, "%x%x", xeon_sp_ppin[i].hi, xeon_sp_ppin[i].lo); - } -} - -/* - * Override SMBIOS type 11 OEM string 1 to string 6, the rest are project dependent - * and can be added in the mainboard code. - */ -void ocp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) -{ - char ppin[PPIN_STR_LEN]; - - /* Add OEM string 1 to 4 */ - if (fru_strings.board_info.custom_count > 0 && - *fru_strings.board_info.board_custom != NULL) - t->count = smbios_add_oem_string(t->eos, *fru_strings.board_info.board_custom); - else - t->count = smbios_add_oem_string(t->eos, TBF); - - if (fru_strings.prod_info.custom_count > 0 && - *fru_strings.prod_info.product_custom != NULL) - t->count = smbios_add_oem_string(t->eos, *fru_strings.prod_info.product_custom); - else - t->count = smbios_add_oem_string(t->eos, TBF); - - if (fru_strings.prod_info.custom_count > 1 && - *(fru_strings.prod_info.product_custom + 1) != NULL) - t->count = smbios_add_oem_string(t->eos, - *(fru_strings.prod_info.product_custom + 1)); - else - t->count = smbios_add_oem_string(t->eos, TBF); - - if (fru_strings.prod_info.custom_count > 2 && - *(fru_strings.prod_info.product_custom + 2) != NULL) { - t->count = smbios_add_oem_string(t->eos, - *(fru_strings.prod_info.product_custom + 2)); - } else { - t->count = smbios_add_oem_string(t->eos, TBF); - } - - /* Add CPU0 PPIN to OEM string 5 */ - xeon_sp_ppin[0] = read_msr_ppin(); - ppin_string_fixup(0, ppin); - t->count = smbios_add_oem_string(t->eos, ppin); - - /* Add CPU1 PPIN to OEM string 6 */ - if (CONFIG_MAX_SOCKET == 2 && CONFIG(PARALLEL_MP_AP_WORK)) { - /* Read the last CPU MSR */ - if (mp_run_on_aps(read_remote_ppin, (void *)&xeon_sp_ppin[1], - get_platform_thread_count() - 1, 100 * USECS_PER_MSEC)) { - printk(BIOS_ERR, "Failed to read remote PPIN.\n"); - t->count = smbios_add_oem_string(t->eos, TBF); - } else { - /* Wait for read_remote_ppin() to finish because it's executed - in parallel */ - wait_for_remote_ppin(); - ppin_string_fixup(1, ppin); - t->count = smbios_add_oem_string(t->eos, ppin); - } - } else { - t->count = smbios_add_oem_string(t->eos, "0000"); - } -} -- To view, visit https://review.coreboot.org/c/coreboot/+/43064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96a3f96fdfb4919f5040d218d2d05c076ae9e86f Gerrit-Change-Number: 43064 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Philipp Deppenwiese (Code Review) 04 Jul '20

04 Jul '20

Philipp Deppenwiese has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/40308 ) Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 53 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: revert

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Philipp Deppenwiese (Code Review) 04 Jul '20

04 Jul '20

Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40308 ) Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data It implements the SMBIOS IPMI FRU mapping table defined in https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 22.3 SMBIOS FRU mapping table. Mainboard needs to configure the correct values for FRU_DEVICE_ID and BMC_KCS_BASE. For type 11 string 1 to 6 are common and implemented in this driver, the rest are project dependent and can be added in the mainboard code. Tested on OCP Tioga Pass. Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40308 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Reviewed-by: Jonathan Zhang <jonzhang(a)fb.com> Reviewed-by: Christian Walter <christian.walter(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/drivers/ocp/dmi/Kconfig A src/drivers/ocp/dmi/Makefile.inc A src/drivers/ocp/dmi/ocp_dmi.h A src/drivers/ocp/dmi/smbios.c 4 files changed, 293 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved Jonathan Zhang: Looks good to me, but someone else must approve Christian Walter: Looks good to me, but someone else must approve diff --git a/src/drivers/ocp/dmi/Kconfig b/src/drivers/ocp/dmi/Kconfig new file mode 100644 index 0000000..b30a40d --- /dev/null +++ b/src/drivers/ocp/dmi/Kconfig @@ -0,0 +1,12 @@ +config OCP_DMI + bool + default n + depends on IPMI_KCS && GENERATE_SMBIOS_TABLES && XEON_SP_COMMON_BASE + help + It implements the SMBIOS IPMI FRU mapping table defined in + https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 + 22.3 SMBIOS FRU mapping table + +config FRU_DEVICE_ID + int + default 0 diff --git a/src/drivers/ocp/dmi/Makefile.inc b/src/drivers/ocp/dmi/Makefile.inc new file mode 100644 index 0000000..587ac89 --- /dev/null +++ b/src/drivers/ocp/dmi/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_OCP_DMI) += smbios.c diff --git a/src/drivers/ocp/dmi/ocp_dmi.h b/src/drivers/ocp/dmi/ocp_dmi.h new file mode 100644 index 0000000..ef0c740 --- /dev/null +++ b/src/drivers/ocp/dmi/ocp_dmi.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __OCP_DMI_H +#define __OCP_DMI_H + +#include <cpu/x86/msr.h> +#include <device/device.h> +#include <smbios.h> + +#define TBF "To Be Filled By O.E.M." + +extern msr_t xeon_sp_ppin[]; + +/* Override SMBIOS type 11 OEM string 1 to string 6 */ +void ocp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t); + +/* This function allows adding the same repeated string to the table */ +int smbios_add_oem_string(u8 *start, const char *str); + +#endif diff --git a/src/drivers/ocp/dmi/smbios.c b/src/drivers/ocp/dmi/smbios.c new file mode 100644 index 0000000..4e54af0 --- /dev/null +++ b/src/drivers/ocp/dmi/smbios.c @@ -0,0 +1,260 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <console/console.h> +#include <device/device.h> +#include <drivers/ipmi/ipmi_ops.h> +#include <delay.h> +#include <cpu/x86/mp.h> +#include <timer.h> +#include <stdio.h> +#include <string.h> +#include <soc/soc_util.h> +#include <soc/cpu.h> +#include <smbios.h> + +#include "ocp_dmi.h" + +#define PPIN_STR_LEN 17 + +struct fru_info_str fru_strings = {0}; +/* The spec defines only at most 2 sockets */ +msr_t xeon_sp_ppin[2] = {0}; +static bool remote_ppin_done = false; + +/* Override SMBIOS type 1 data. */ +const char *smbios_system_manufacturer(void) +{ + if (fru_strings.prod_info.manufacturer != NULL) + return (const char *)fru_strings.prod_info.manufacturer; + else + return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; +} + +const char *smbios_system_product_name(void) +{ + if (fru_strings.board_info.product_name != NULL) + return (const char *)fru_strings.prod_info.product_name; + else + return CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME; +} + +const char *smbios_system_serial_number(void) +{ + if (fru_strings.prod_info.serial_number != NULL) + return (const char *)fru_strings.prod_info.serial_number; + else + return CONFIG_MAINBOARD_SERIAL_NUMBER; +} + +const char *smbios_system_version(void) +{ + if (fru_strings.prod_info.product_version != NULL) + return (const char *)fru_strings.prod_info.product_version; + else + return CONFIG_MAINBOARD_VERSION; +} + +/* Override SMBIOS type 1 uuid from the value from BMC. */ +void smbios_system_set_uuid(u8 *uuid) +{ + ipmi_get_system_guid(CONFIG_BMC_KCS_BASE, uuid); +} + +/* Override SMBIOS type 2 data. */ +const char *smbios_mainboard_version(void) +{ + if (fru_strings.board_info.part_number != NULL) + return (const char *)fru_strings.board_info.part_number; + else + return CONFIG_MAINBOARD_VERSION; +} + +const char *smbios_mainboard_manufacturer(void) +{ + if (fru_strings.board_info.manufacturer != NULL) + return (const char *)fru_strings.board_info.manufacturer; + else + return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER; +} + +const char *smbios_mainboard_product_name(void) +{ + if (fru_strings.board_info.product_name != NULL) + return (const char *)fru_strings.board_info.product_name; + else + return CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME; +} + +const char *smbios_mainboard_serial_number(void) +{ + if (fru_strings.board_info.serial_number != NULL) + return (const char *)fru_strings.board_info.serial_number; + else + return CONFIG_MAINBOARD_SERIAL_NUMBER; +} + +/* Override SMBIOS type 2 and 3 asset_tag data. */ +const char *smbios_mainboard_asset_tag(void) +{ + if (fru_strings.prod_info.asset_tag != NULL) + return (const char *)fru_strings.prod_info.asset_tag; + else + return ""; +} + +/* Override SMBIOS type 3 data. */ +smbios_enclosure_type smbios_mainboard_enclosure_type(void) +{ + /* SMBIOS System Enclosure or Chassis Types are values from 0 to 20h. */ + if (fru_strings.chassis_info.chassis_type <= 0x20) + return fru_strings.chassis_info.chassis_type; + else + return SMBIOS_ENCLOSURE_RACK_MOUNT_CHASSIS; +} + +const char *smbios_chassis_version(void) +{ + if (fru_strings.chassis_info.chassis_partnumber != NULL) + return fru_strings.chassis_info.chassis_partnumber; + else + return ""; +} + +const char *smbios_chassis_serial_number(void) +{ + if (fru_strings.chassis_info.serial_number != NULL) + return fru_strings.chassis_info.serial_number; + else + return ""; +} + +/* Override SMBIOS type 4 processor serial numbers from FRU Chassis custom data. */ +const char *smbios_processor_serial_number(void) +{ + /* For now type 4 only creates for one CPU, so it can only write the serial number + * of CPU0. + */ + if (*fru_strings.chassis_info.chassis_custom != NULL) + return *fru_strings.chassis_info.chassis_custom; + else + return ""; +} + +static void read_remote_ppin(void *data) +{ + *(msr_t *)data = read_msr_ppin(); + remote_ppin_done = true; +} + +static void wait_for_remote_ppin(void) +{ + struct stopwatch sw; + + stopwatch_init_msecs_expire(&sw, 500); + while (!stopwatch_expired(&sw)) { + if (remote_ppin_done) + break; + mdelay(100); + } + if (stopwatch_expired(&sw)) + printk(BIOS_ERR, "Wait for read_remote_ppin() timeout\n"); +} + +int smbios_add_oem_string(u8 *start, const char *str) +{ + int i = 1; + char *p = (char *)start; + + if (*str == '\0') + return 0; + + for (;;) { + if (!*p) { + strcpy(p, str); + p += strlen(str); + *p++ = '\0'; + *p++ = '\0'; + return i; + } + + p += strlen(p)+1; + i++; + } +} + +/* When the most significant 4 bits of PPIN hi/lo are 0, add '0' to the beginning */ +static void ppin_string_fixup(int i, char *ppin) +{ + if ((xeon_sp_ppin[i].hi & 0xf0000000) == 0) { + if ((xeon_sp_ppin[i].lo & 0xf0000000) == 0) + snprintf(ppin, PPIN_STR_LEN, "0%x0%x", xeon_sp_ppin[i].hi, + xeon_sp_ppin[i].lo); + else + snprintf(ppin, PPIN_STR_LEN, "0%x%x", xeon_sp_ppin[i].hi, + xeon_sp_ppin[i].lo); + } else if ((xeon_sp_ppin[i].lo & 0xf0000000) == 0) { + snprintf(ppin, PPIN_STR_LEN, "%x0%x", xeon_sp_ppin[i].hi, xeon_sp_ppin[i].lo); + } else { + snprintf(ppin, PPIN_STR_LEN, "%x%x", xeon_sp_ppin[i].hi, xeon_sp_ppin[i].lo); + } +} + +/* + * Override SMBIOS type 11 OEM string 1 to string 6, the rest are project dependent + * and can be added in the mainboard code. + */ +void ocp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) +{ + char ppin[PPIN_STR_LEN]; + + /* Add OEM string 1 to 4 */ + if (fru_strings.board_info.custom_count > 0 && + *fru_strings.board_info.board_custom != NULL) + t->count = smbios_add_oem_string(t->eos, *fru_strings.board_info.board_custom); + else + t->count = smbios_add_oem_string(t->eos, TBF); + + if (fru_strings.prod_info.custom_count > 0 && + *fru_strings.prod_info.product_custom != NULL) + t->count = smbios_add_oem_string(t->eos, *fru_strings.prod_info.product_custom); + else + t->count = smbios_add_oem_string(t->eos, TBF); + + if (fru_strings.prod_info.custom_count > 1 && + *(fru_strings.prod_info.product_custom + 1) != NULL) + t->count = smbios_add_oem_string(t->eos, + *(fru_strings.prod_info.product_custom + 1)); + else + t->count = smbios_add_oem_string(t->eos, TBF); + + if (fru_strings.prod_info.custom_count > 2 && + *(fru_strings.prod_info.product_custom + 2) != NULL) { + t->count = smbios_add_oem_string(t->eos, + *(fru_strings.prod_info.product_custom + 2)); + } else { + t->count = smbios_add_oem_string(t->eos, TBF); + } + + /* Add CPU0 PPIN to OEM string 5 */ + xeon_sp_ppin[0] = read_msr_ppin(); + ppin_string_fixup(0, ppin); + t->count = smbios_add_oem_string(t->eos, ppin); + + /* Add CPU1 PPIN to OEM string 6 */ + if (CONFIG_MAX_SOCKET == 2 && CONFIG(PARALLEL_MP_AP_WORK)) { + /* Read the last CPU MSR */ + if (mp_run_on_aps(read_remote_ppin, (void *)&xeon_sp_ppin[1], + get_platform_thread_count() - 1, 100 * USECS_PER_MSEC)) { + printk(BIOS_ERR, "Failed to read remote PPIN.\n"); + t->count = smbios_add_oem_string(t->eos, TBF); + } else { + /* Wait for read_remote_ppin() to finish because it's executed + in parallel */ + wait_for_remote_ppin(); + ppin_string_fixup(1, ppin); + t->count = smbios_add_oem_string(t->eos, ppin); + } + } else { + t->count = smbios_add_oem_string(t->eos, "0000"); + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 53 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: soc/intel/xeon_sp/cpx: update HOB display code
by Jonathan Zhang (Code Review) 04 Jul '20

04 Jul '20

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42841 ) Change subject: soc/intel/xeon_sp/cpx: update HOB display code ...................................................................... soc/intel/xeon_sp/cpx: update HOB display code Fix a typo to use CONFIG_DISPLAY_HOBS instead of CONFIG_DISPLAY_HOB. Build hob display into romstage, in addition to ramstage. Memory map HOB data is a big structure. Update the soc_display_memmap_hob() to assist trouble shooting of FSP interface. Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com> Change-Id: Iece745fe21d11b4a470ba8318201bb6e68c5da26 --- M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/cpx/hob_display.c 2 files changed, 10 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/42841/1 diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index a7ac5d7..969fe25 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -10,9 +10,10 @@ romstage-y += romstage.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-y += chip.c acpi.c cpu.c soc_util.c -ramstage-$(CONFIG_DISPLAY_HOB) += hob_display.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx diff --git a/src/soc/intel/xeon_sp/cpx/hob_display.c b/src/soc/intel/xeon_sp/cpx/hob_display.c index d10a0f6..4f13759 100644 --- a/src/soc/intel/xeon_sp/cpx/hob_display.c +++ b/src/soc/intel/xeon_sp/cpx/hob_display.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <fsp/util.h> -#include <assert.h> #include <hob_iiouds.h> #include <hob_memmap.h> +#include <lib.h> #include <soc/soc_util.h> static const uint8_t fsp_hob_iio_uds_guid[16] = FSP_HOB_IIO_UNIVERSAL_DATA_GUID; @@ -61,20 +62,24 @@ assert(hob != NULL); printk(BIOS_DEBUG, "===================== MEMORY MAP HOB DATA =====================\n"); - printk(BIOS_DEBUG, "hob: %p\n", hob); + printk(BIOS_DEBUG, "hob: %p, size: 0x%lx, structure size: 0x%lx\n", + hob, hob_size, sizeof(*hob)); printk(BIOS_DEBUG, "\tlowMemBase: 0x%x, lowMemSize: 0x%x, highMemBase: 0x%x, " "highMemSize: 0x%x\n", hob->lowMemBase, hob->lowMemSize, hob->highMemBase, hob->highMemSize); printk(BIOS_DEBUG, "\tmemSize: 0x%x, memFreq: 0x%x\n", hob->memSize, hob->memFreq); - printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d\n", hob->numberEntries); + printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d, entry size: %ld\n", + hob->numberEntries, sizeof(SYSTEM_MEMORY_MAP_ELEMENT)); for (int e = 0; e < hob->numberEntries; ++e) { const struct SystemMemoryMapElement *mem_element = &hob->Element[e]; printk(BIOS_DEBUG, "\t\tmemory_map %d BaseAddress: 0x%x, ElementSize: 0x%x, Type: 0x%x\n", e, mem_element->BaseAddress, mem_element->ElementSize, mem_element->Type); } + + hexdump(hob, sizeof(*hob)); } void soc_display_iio_universal_data_hob(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/42841 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iece745fe21d11b4a470ba8318201bb6e68c5da26 Gerrit-Change-Number: 42841 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: mb/ocp/deltalake: Add VPD flash regions and select VPD_SMBIOS_VERSION
by Johnny Lin (Code Review) 04 Jul '20

04 Jul '20

Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42428 ) Change subject: mb/ocp/deltalake: Add VPD flash regions and select VPD_SMBIOS_VERSION ...................................................................... mb/ocp/deltalake: Add VPD flash regions and select VPD_SMBIOS_VERSION Tested on OCP Delta Lake. Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> Change-Id: I1e6e2bd25cbe3b0c0547dda9e457c4d55df28388 --- M src/mainboard/ocp/deltalake/Kconfig M src/mainboard/ocp/deltalake/board.fmd 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/42428/1 diff --git a/src/mainboard/ocp/deltalake/Kconfig b/src/mainboard/ocp/deltalake/Kconfig index 739cdea..b4e88b5 100644 --- a/src/mainboard/ocp/deltalake/Kconfig +++ b/src/mainboard/ocp/deltalake/Kconfig @@ -11,6 +11,8 @@ select IPMI_KCS select IPMI_KCS_ROMSTAGE select OCP_DMI + select VPD + select VPD_SMBIOS_VERSION config IPMI_KCS_REGISTER_SPACING int diff --git a/src/mainboard/ocp/deltalake/board.fmd b/src/mainboard/ocp/deltalake/board.fmd index a0c8dc5..9ac1331 100644 --- a/src/mainboard/ocp/deltalake/board.fmd +++ b/src/mainboard/ocp/deltalake/board.fmd @@ -7,6 +7,8 @@ SI_BIOS@0x3000000 0x1000000 { FMAP@0x0 0x800 RW_MRC_CACHE@0x1000 0x10000 - COREBOOT(CBFS)@0x11000 + RO_VPD@0x11000 0x4000 + RW_VPD@0x15000 0x4000 + COREBOOT(CBFS)@0x19000 } } -- To view, visit https://review.coreboot.org/c/coreboot/+/42428 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e6e2bd25cbe3b0c0547dda9e457c4d55df28388 Gerrit-Change-Number: 42428 Gerrit-PatchSet: 1 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-MessageType: newchange

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