Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Duncan Laurie, Sridhar Siricilla, Aamir Bohra, Srinidhi N Kaushik, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41728
to look at the new patch set (#11).
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
drivers/intel/fsp2_0: Add FSP 2.2 specific support
• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Added multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Added FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
o Added FspMultiPhaseSiInitEntryOffset
• Added FSPS_ARCH_UPD
o Added EnableMultiPhaseSiliconInit, bootloaders designed for
FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
continue to use FspSiliconInit() without change.
FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-…
Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/upd.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/util.c
M src/include/console/post_codes.h
9 files changed, 172 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41728/11
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Gerrit-Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Gerrit-Change-Number: 41728
Gerrit-PatchSet: 11
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
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Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
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Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Duncan Laurie, Sridhar Siricilla, Aamir Bohra, Srinidhi N Kaushik, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41728
to look at the new patch set (#10).
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
drivers/intel/fsp2_0: Add FSP 2.2 specific support
• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Added multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Added FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
o Added FspMultiPhaseSiInitEntryOffset
• Added FSPS_ARCH_UPD
o Added EnableMultiPhaseSiliconInit, bootloaders designed for
FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
continue to use FspSiliconInit() without change.
FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-…
Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/upd.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/util.c
M src/include/console/post_codes.h
9 files changed, 172 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41728/10
--
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Gerrit-Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Gerrit-Change-Number: 41728
Gerrit-PatchSet: 10
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
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Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org>
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Gerrit-Reviewer: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
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Gerrit-MessageType: newpatchset
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 )
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
File src/drivers/intel/fsp2_0/silicon_init.c:
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 46: !=
> > This isn't the correct way to test for success anyway. It should be if(!EFI_ERROR(status)). […]
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 59: FSP_MULTI_PHASE_SI_INIT_GET_NUMBER_OF_PHASES_API
> Should we attempt to continue to boot without multiphase in this case rather than treat this as fata […]
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 66: "
> prefix with "FspMultiPhaseSiInit ExecutePhase" (for consistency with other output)
Ack
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Gerrit-Change-Number: 41728
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Gerrit-Comment-Date: Fri, 05 Jun 2020 08:06:38 +0000
Gerrit-HasComments: Yes
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Comment-In-Reply-To: Duncan Laurie <dlaurie(a)chromium.org>
Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com>
Comment-In-Reply-To: Nathaniel L Desimone <nathaniel.l.desimone(a)intel.com>
Gerrit-MessageType: comment
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 )
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
Patch Set 9:
(6 comments)
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/i…
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/i…
PS9, Line 33: #if CONFIG(PLATFORM_USES_FSP2_2)
> this doesn't seem to be used as a packed structure (each field read separately in fsp_identify) so d […]
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/i…
File src/drivers/intel/fsp2_0/include/fsp/util.h:
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/i…
PS9, Line 24: enum fsp_multi_phase_action {
: GET_NUMBER_OF_PHASES,
: EXECUTE_PHASE
: };
> This is part of an ABI, it would be good to explicitly call out the integer value of each enum.
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
File src/drivers/intel/fsp2_0/silicon_init.c:
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 45: erros
> errors
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 46: !=
> This isn't the correct way to test for success anyway. It should be if(!EFI_ERROR(status)).
We don't use those EFI_ERROR handling case in coreboot.
> It is possible to have "successful" error codes other than EFI_SUCCESS. The MSB indicates error.
Right now its mostly 5 return types as per spec
EFI_SUCCESS FSP execution environment was initialized successfully.
EFI_INVALID_PARAMETER Input parameters are invalid.
EFI_UNSUPPORTED The FSP calling conditions were not met.
EFI_DEVICE_ERROR FSP silicon initialization failed.
FSP_STATUS_RESET_REQUIRED_* A reset is required. These status codes will not be
returned during S3.
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s… handles FSP_STATUS_RESET_REQUIRED_* return type case
EFI_SUCCESS been checked here
Rest everything is error code which results into die in coreboot code
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/s…
PS9, Line 146: (void *)
> I don't think you need to cast here
Ack
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/u…
File src/drivers/intel/fsp2_0/util.c:
https://review.coreboot.org/c/coreboot/+/41728/9/src/drivers/intel/fsp2_0/u…
PS9, Line 52: #if CONFIG(PLATFORM_USES_FSP2_2)
> if the header didn't use #if to guard this field the code could just be "if (CONFIG(PLATFORM_USES_FS […]
Ack
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