coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

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2826 discussions

Change in coreboot[master]: HACK trogdor: SoC makefile BLOB support HACK
by Ravi kumar (Code Review) 10 Jun '20

10 Jun '20

Ravi kumar has uploaded a new patch set (#76) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35508 ) Change subject: HACK trogdor: SoC makefile BLOB support HACK ...................................................................... HACK trogdor: SoC makefile BLOB support HACK Change-Id: I85a20ef31ec91c6f22221d16fd4c3097c5cb97d1 Signed-off-by: Ashwin Kumar <ashk(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Makefile.inc 1 file changed, 119 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/35508/76 -- To view, visit https://review.coreboot.org/c/coreboot/+/35508 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85a20ef31ec91c6f22221d16fd4c3097c5cb97d1 Gerrit-Change-Number: 35508 Gerrit-PatchSet: 76 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: ashk(a)codeaurora.org Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Update for vboot before bootblock
by Nico Huber (Code Review) 10 Jun '20

10 Jun '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41815 ) Change subject: console: Update for vboot before bootblock ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c File src/console/init.c: https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c@70 PS6, Line 70: CONFIG(EARLY_PCI_BRIDGE) > Well, we can use early EARLY_PCI_BRIDGE on the system with VBOOT_STARTS_BEFORE_BOOTBLOCK, just not i […] Looking at the other comments around it seems that you don't want to use coreboot's console drivers at all? If that is the case, why go through all the trouble and run console_init()? Might be that this is the one line that gives you a build error but it seems there is more that you'd want to skip? https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c@71 PS6, Line 71: !(CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE)) Doesn't the former imply the latter? -- To view, visit https://review.coreboot.org/c/coreboot/+/41815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9fb0810e0816fe0a68e52287eda6145043a619 Gerrit-Change-Number: 41815 Gerrit-PatchSet: 6 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 17:17:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Generate SSDT for camera
by Matt Delco (Code Review) 10 Jun '20

10 Jun '20

Matt Delco has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41607 ) Change subject: drivers/intel/mipi_camera: Generate SSDT for camera ...................................................................... Patch Set 19: (2 comments) https://review.coreboot.org/c/coreboot/+/41607/19/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41607/19/src/drivers/intel/mipi_ca… PS19, Line 49: config->cio2_num_ports I wonder if it's worth be paranoid about the case where cio2_num_ports > MAX_PORT_ENTRIES. https://review.coreboot.org/c/coreboot/+/41607/19/src/drivers/intel/mipi_ca… PS19, Line 205: 3 + (config->ssdb.vcm_type ? 1 : 0) As food for thought, it'd be simpler to use "local1_ret + 1", which is simpler but probably harder for someone to follow (so it might not be a worthwhile change). I had considered whether to use another variable like: int next_local1 = 1; and then each of the 4 instances of acpigen_write_if_lequal_op_int() would do: acpigen_write_if_lequal_op_int(LOCAL1_OP, next_local1++); -- To view, visit https://review.coreboot.org/c/coreboot/+/41607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15979f345fb823df2560db269e902a1ea650b69e Gerrit-Change-Number: 41607 Gerrit-PatchSet: 19 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Wed, 10 Jun 2020 16:57:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: initialize ACP device at init() time
by Aaron Durbin (Code Review) 10 Jun '20

10 Jun '20

Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42231 ) Change subject: soc/amd/picasso: initialize ACP device at init() time ...................................................................... soc/amd/picasso: initialize ACP device at init() time The ACP device sits behind a bridge. Despite the logs indicating the bridge is likely hooked up, there's some unusual behavior of writes not sticking. Aside from the speculation of what's causing the issues the initialization of the device should occur at init() because of these potential dependencies. BUG=b:155882600 Change-Id: I8fa83d7d1d4f356c56971d4175a2ae6497a92fb8 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- M src/soc/amd/picasso/acp.c 1 file changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/42231/1 diff --git a/src/soc/amd/picasso/acp.c b/src/soc/amd/picasso/acp.c index cbe5d86..854dd8f 100644 --- a/src/soc/amd/picasso/acp.c +++ b/src/soc/amd/picasso/acp.c @@ -13,15 +13,13 @@ #include <amdblocks/acpimmio.h> #include <commonlib/helpers.h> -static void enable(struct device *dev) +static void init(struct device *dev) { const struct soc_amd_picasso_config *cfg; const struct device *nb_dev = pcidev_path_on_root(GNB_DEVFN); struct resource *res; uintptr_t bar; - pci_dev_enable_resources(dev); - /* Set the proper I2S_PIN_CONFIG state */ if (!nb_dev || !nb_dev->chip_info) return; @@ -44,7 +42,8 @@ static struct device_operations acp_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = enable, + .enable_resources = pci_dev_enable_resources, + .init = init, .ops_pci = &pci_dev_ops_pci, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/42231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fa83d7d1d4f356c56971d4175a2ae6497a92fb8 Gerrit-Change-Number: 42231 Gerrit-PatchSet: 1 Gerrit-Owner: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: console: Update for vboot before bootblock
by Aaron Durbin (Code Review) 10 Jun '20

10 Jun '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41815 ) Change subject: console: Update for vboot before bootblock ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/41815/6/src/console/Makefile.inc File src/console/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41815/6/src/console/Makefile.inc@16 PS6, Line 16: verstage-y += console.c These are excluded because you want to be full message oriented? And not preform a svc call per byte? Can't we hook into console_tx_flush() to perform the full message write? commit description isn't entirely clear why these need to be excluded. On first pass, it seems we can hook into the existing console drivers with a message oriented one w/o making any changes. Was this path pursued? -- To view, visit https://review.coreboot.org/c/coreboot/+/41815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9fb0810e0816fe0a68e52287eda6145043a619 Gerrit-Change-Number: 41815 Gerrit-PatchSet: 6 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 16:20:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: console: Update for vboot before bootblock
by Martin Roth (Code Review) 10 Jun '20

10 Jun '20

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Change in coreboot[master]: console: Update for vboot before bootblock
by Martin Roth (Code Review) 10 Jun '20

10 Jun '20

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41815 ) Change subject: console: Update for vboot before bootblock ...................................................................... Patch Set 6: (3 comments) https://review.coreboot.org/c/coreboot/+/41815/4/src/console/Makefile.inc File src/console/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41815/4/src/console/Makefile.inc@14 PS4, Line 14: ifneq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) > The files here should be arch-agnostic. […] It's not the architecture that's the problem, it's the implementation. The interface to print inside the PSP is an SVC call with a string, so we've reimplemented the calls. Updated in a later patch to use post.c, so it's jut printk & console.c that are excluded. The entire patch train is now pushed. https://review.coreboot.org/c/coreboot/+/41815/4/src/console/init.c File src/console/init.c: https://review.coreboot.org/c/coreboot/+/41815/4/src/console/init.c@72 PS4, Line 72: pci_early_bridge_init > We could probably change this to EARLY_PCI_BRIDGE && (ENV_BOOTBLOCK || ENV_ROMSTAGE). […] That seems like a reasonable solution to me. https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c File src/console/init.c: https://review.coreboot.org/c/coreboot/+/41815/6/src/console/init.c@70 PS6, Line 70: CONFIG(EARLY_PCI_BRIDGE) > No negation missed. I just concluded from the cluttered condition […] Well, we can use early EARLY_PCI_BRIDGE on the system with VBOOT_STARTS_BEFORE_BOOTBLOCK, just not inside the PSP, which is why the ENV_SEPARATE_VERSTAGE condition is there. Just because we don't get output out of the console in the psp shouldn't disallow its use later. As Kyosti suggested on patch set 4, I can change it to (CONFIG(EARLY_PCI_BRIDGE) && (ENV_BOOTBLOCK || ENV_ROMSTAGE)) I'd imagine we'd generally want to init this in bootblock if we're using it for verstage. -- To view, visit https://review.coreboot.org/c/coreboot/+/41815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc9fb0810e0816fe0a68e52287eda6145043a619 Gerrit-Change-Number: 41815 Gerrit-PatchSet: 6 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 16:08:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: security/vboot: Add option to run verstage before bootblock
by Martin Roth (Code Review) 10 Jun '20

10 Jun '20

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41814 ) Change subject: security/vboot: Add option to run verstage before bootblock ...................................................................... Patch Set 7: (6 comments) https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Kconfig File src/security/vboot/Kconfig: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Kconfig… PS7, Line 22: config HAVE_PRE_BOOTBLOCK_VBOOT_SUPPORT > You shouldn't need this. The VBOOT_STARTS_IN... […] Done https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… File src/security/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… PS7, Line 100: verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c > nit: maybe move this down to the other !STARTS_BEFORE_BOOTBLOCK block below to keep the stuff belong […] I'd rather keep the source files at the top. I wouldn't look for a source file down below. If you have a strong preference for moving it, I can, but to me it makes more sense to keep it here. I haven't tested this, but I think we could probably eliminate the ifeq with something like: "verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += verstage.c" That would give us verstage-yy in the failing condition, which I don't think would get added. https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/Makefil… PS7, Line 147: ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),) > You've moved this out of an if (SEPARATE_VERSTAGE) block, it needs to stay in there, or it'll try ad […] thanks. I tested building, but missed that. https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/common.c File src/security/vboot/common.c: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/common.… PS7, Line 23: (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE))) > I think a lot of these statements would become much simpler if you use !STARTS_IN_ROMSTAGE rather th […] Done https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/vboot_l… File src/security/vboot/vboot_loader.c: https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/vboot_l… PS7, Line 16: _Static_assert( (!CONFIG(VBOOT_SEPARATE_VERSTAGE)) || (CONFIG(VBOOT_SEPARATE_VERSTAGE) && > space prohibited after that open parenthesis '(' Done https://review.coreboot.org/c/coreboot/+/41814/7/src/security/vboot/vboot_l… PS7, Line 17: (CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) || CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))), > Can be simplified to […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41814 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4849777cb7ba9f90fe8428b82c21884d1e662b96 Gerrit-Change-Number: 41814 Gerrit-PatchSet: 7 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 15:41:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: build bot (Jenkins) <no-reply(a)coreboot.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add symbols for CAR MTRRs in linker script
by Aaron Durbin (Code Review) 10 Jun '20

10 Jun '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30872 ) Change subject: arch/x86: Add symbols for CAR MTRRs in linker script ...................................................................... Patch Set 9: (2 comments) https://review.coreboot.org/c/coreboot/+/30872/7/src/arch/x86/car.ld File src/arch/x86/car.ld: https://review.coreboot.org/c/coreboot/+/30872/7/src/arch/x86/car.ld@3 PS7, Line 3: #include <cpu/x86/mtrr.h> > What did we need this #include for again? LOG2CEIL is a linker thing. Could you comment on this? https://review.coreboot.org/c/coreboot/+/30872/9/src/arch/x86/car.ld File src/arch/x86/car.ld: https://review.coreboot.org/c/coreboot/+/30872/9/src/arch/x86/car.ld@83 PS9, Line 83: _car_mtrr_start = _car_region_start; And we'd expose this value for which stages? Presumably these would only need to be exposed in C_ENVIRONMENT_BOOTBLOCK && ENV_BOOTBLOCK || (!C_ENVIRONMENT_BOOTBLOCK && ENV_ROMSTAGE) ? -- To view, visit https://review.coreboot.org/c/coreboot/+/30872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fef3546d2bfea2d4d8f87aaf8376e5566fd6aaa Gerrit-Change-Number: 30872 Gerrit-PatchSet: 9 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 15:20:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/mipi_camera: Support adding camera power resource
by Sugnan Prabhu S (Code Review) 10 Jun '20

10 Jun '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Support adding camera power resource ...................................................................... Patch Set 16: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/12/src/drivers/intel/mipi_ca… PS12, Line 537: acpigen_write_store_op_to_namestr(0, "STA"); > This implementation is based on some of the older platforms PowerResource. […] OS can guarantee for a specific device, _ON and _OFF are called appropriately. But if multiple devices share the same power resource, OS does not know this. such cases do exists. Like camera sensor, eeprom and the VCM(device that control lens position) share the same power rails. Also for some platforms, worldfacing and userfacing cameras share the same power rails. -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 16 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 10 Jun 2020 14:01:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-MessageType: comment

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coreboot-gerrit June 2020