coreboot-gerrit May 2020

coreboot-gerrit@coreboot.org

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2588 discussions

Change in coreboot[master]: mainboard(s): drop redundant entries from Makefiles
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Philipp Hug, Patrick Georgi, Patrick Rudolph, Frans Hendriks, Tristan Corrick, Patrick Rudolph, Piotr Król, David Guckian, Michał Żygowski, Martin Roth, Christian Walter, Vanessa Eusebio, Alexander Couzens, Werner Zeh, ron minnich, Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41107 to look at the new patch set (#7). Change subject: mainboard(s): drop redundant entries from Makefiles ...................................................................... mainboard(s): drop redundant entries from Makefiles Drop redundant entries from mainboards' Makefiles that already get included implicitly like `romstage.c` and equivalents. Change-Id: I1961646c5ed4ae6a1308ce0e8e15792970da4e0d Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/mainboard/amd/inagua/Makefile.inc M src/mainboard/amd/olivehill/Makefile.inc M src/mainboard/amd/parmer/Makefile.inc M src/mainboard/amd/persimmon/Makefile.inc M src/mainboard/amd/south_station/Makefile.inc M src/mainboard/amd/thatcher/Makefile.inc M src/mainboard/amd/union_station/Makefile.inc D src/mainboard/aopen/dxplplusu/Makefile.inc M src/mainboard/asrock/b85m_pro4/Makefile.inc M src/mainboard/asrock/e350m1/Makefile.inc M src/mainboard/asrock/h110m/Makefile.inc M src/mainboard/asrock/h81m-hds/Makefile.inc M src/mainboard/asrock/imb-a180/Makefile.inc M src/mainboard/asus/am1i-a/Makefile.inc M src/mainboard/asus/f2a85-m/Makefile.inc M src/mainboard/asus/p2b/Makefile.inc M src/mainboard/bap/ode_e20XX/Makefile.inc M src/mainboard/biostar/a68n_5200/Makefile.inc M src/mainboard/biostar/am1ml/Makefile.inc M src/mainboard/cavium/cn8100_sff_evb/Makefile.inc M src/mainboard/elmex/pcm205400/Makefile.inc M src/mainboard/emulation/qemu-aarch64/Makefile.inc M src/mainboard/emulation/qemu-armv7/Makefile.inc M src/mainboard/emulation/qemu-power8/Makefile.inc M src/mainboard/emulation/qemu-q35/Makefile.inc M src/mainboard/emulation/qemu-riscv/Makefile.inc M src/mainboard/emulation/spike-riscv/Makefile.inc M src/mainboard/facebook/fbg1701/Makefile.inc M src/mainboard/facebook/monolith/Makefile.inc M src/mainboard/gizmosphere/gizmo2/Makefile.inc M src/mainboard/google/auron/Makefile.inc M src/mainboard/google/beltino/Makefile.inc M src/mainboard/google/cheza/Makefile.inc M src/mainboard/google/cyan/Makefile.inc M src/mainboard/google/cyan/variants/banon/Makefile.inc M src/mainboard/google/cyan/variants/celes/Makefile.inc M src/mainboard/google/cyan/variants/edgar/Makefile.inc M src/mainboard/google/cyan/variants/kefka/Makefile.inc M src/mainboard/google/cyan/variants/reks/Makefile.inc M src/mainboard/google/cyan/variants/relm/Makefile.inc M src/mainboard/google/cyan/variants/setzer/Makefile.inc M src/mainboard/google/cyan/variants/terra/Makefile.inc M src/mainboard/google/cyan/variants/ultima/Makefile.inc M src/mainboard/google/daisy/Makefile.inc M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/deltaur/Makefile.inc M src/mainboard/google/dragonegg/Makefile.inc M src/mainboard/google/drallion/Makefile.inc M src/mainboard/google/eve/Makefile.inc M src/mainboard/google/fizz/Makefile.inc M src/mainboard/google/fizz/variants/karma/Makefile.inc M src/mainboard/google/foster/Makefile.inc M src/mainboard/google/gale/Makefile.inc M src/mainboard/google/glados/Makefile.inc M src/mainboard/google/gru/Makefile.inc M src/mainboard/google/hatch/Makefile.inc M src/mainboard/google/hatch/variants/dratini/Makefile.inc M src/mainboard/google/hatch/variants/duffy/Makefile.inc M src/mainboard/google/hatch/variants/hatch/Makefile.inc M src/mainboard/google/hatch/variants/helios/Makefile.inc M src/mainboard/google/hatch/variants/jinlon/Makefile.inc M src/mainboard/google/hatch/variants/kaisa/Makefile.inc M src/mainboard/google/hatch/variants/kohaku/Makefile.inc M src/mainboard/google/hatch/variants/mushu/Makefile.inc M src/mainboard/google/hatch/variants/nightfury/Makefile.inc M src/mainboard/google/hatch/variants/puff/Makefile.inc M src/mainboard/google/jecht/Makefile.inc M src/mainboard/google/kahlee/Makefile.inc M src/mainboard/google/kahlee/variants/nuwani/Makefile.inc M src/mainboard/google/kahlee/variants/treeya/Makefile.inc M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/mistral/Makefile.inc M src/mainboard/google/nyan/Makefile.inc M src/mainboard/google/nyan_big/Makefile.inc M src/mainboard/google/nyan_blaze/Makefile.inc M src/mainboard/google/oak/Makefile.inc M src/mainboard/google/octopus/Makefile.inc M src/mainboard/google/octopus/variants/phaser/Makefile.inc M src/mainboard/google/peach_pit/Makefile.inc M src/mainboard/google/poppy/Makefile.inc M src/mainboard/google/poppy/variants/atlas/Makefile.inc M src/mainboard/google/poppy/variants/nami/Makefile.inc M src/mainboard/google/poppy/variants/nautilus/Makefile.inc M src/mainboard/google/poppy/variants/nocturne/Makefile.inc M src/mainboard/google/poppy/variants/rammus/Makefile.inc M src/mainboard/google/reef/Makefile.inc M src/mainboard/google/reef/variants/coral/Makefile.inc D src/mainboard/google/reef/variants/snappy/Makefile.inc M src/mainboard/google/sarien/Makefile.inc M src/mainboard/google/slippy/Makefile.inc M src/mainboard/google/smaug/Makefile.inc M src/mainboard/google/storm/Makefile.inc M src/mainboard/google/trogdor/Makefile.inc M src/mainboard/google/veyron/Makefile.inc M src/mainboard/google/veyron_mickey/Makefile.inc M src/mainboard/google/veyron_rialto/Makefile.inc M src/mainboard/google/volteer/Makefile.inc M src/mainboard/hp/abm/Makefile.inc M src/mainboard/intel/cannonlake_rvp/Makefile.inc D src/mainboard/intel/cedarisland_crb/Makefile.inc M src/mainboard/intel/coffeelake_rvp/Makefile.inc M src/mainboard/intel/dcp847ske/Makefile.inc M src/mainboard/intel/glkrvp/Makefile.inc M src/mainboard/intel/harcuvar/Makefile.inc M src/mainboard/intel/icelake_rvp/Makefile.inc M src/mainboard/intel/jasperlake_rvp/Makefile.inc M src/mainboard/intel/kblrvp/Makefile.inc M src/mainboard/intel/kunimitsu/Makefile.inc D src/mainboard/intel/leafhill/Makefile.inc M src/mainboard/intel/minnow3/Makefile.inc M src/mainboard/intel/saddlebrook/Makefile.inc M src/mainboard/intel/strago/Makefile.inc M src/mainboard/intel/tglrvp/Makefile.inc M src/mainboard/jetway/nf81-t56n-lf/Makefile.inc M src/mainboard/lenovo/l520/Makefile.inc M src/mainboard/lenovo/s230u/Makefile.inc M src/mainboard/lenovo/t400/Makefile.inc M src/mainboard/lenovo/t410/Makefile.inc M src/mainboard/lenovo/t420/Makefile.inc M src/mainboard/lenovo/t420s/Makefile.inc M src/mainboard/lenovo/t430/Makefile.inc M src/mainboard/lenovo/t430s/Makefile.inc M src/mainboard/lenovo/t440p/Makefile.inc M src/mainboard/lenovo/t520/Makefile.inc M src/mainboard/lenovo/t530/Makefile.inc M src/mainboard/lenovo/x1_carbon_gen1/Makefile.inc M src/mainboard/lenovo/x201/Makefile.inc M src/mainboard/lenovo/x220/Makefile.inc M src/mainboard/lenovo/x230/Makefile.inc M src/mainboard/libretrend/lt1000/Makefile.inc M src/mainboard/lippert/frontrunner-af/Makefile.inc M src/mainboard/lippert/toucan-af/Makefile.inc M src/mainboard/msi/ms7721/Makefile.inc D src/mainboard/ocp/sonorapass/Makefile.inc M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/opencellular/elgon/Makefile.inc M src/mainboard/packardbell/ms2290/Makefile.inc M src/mainboard/pcengines/apu1/Makefile.inc M src/mainboard/pcengines/apu2/Makefile.inc M src/mainboard/portwell/m107/Makefile.inc M src/mainboard/protectli/vault_bsw/Makefile.inc M src/mainboard/protectli/vault_kbl/Makefile.inc M src/mainboard/purism/librem_skl/Makefile.inc M src/mainboard/razer/blade_stealth_kbl/Makefile.inc M src/mainboard/roda/rk9/Makefile.inc M src/mainboard/scaleway/tagada/Makefile.inc M src/mainboard/siemens/mc_apl1/Makefile.inc M src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc M src/mainboard/siemens/mc_apl1/variants/mc_apl3/Makefile.inc M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Makefile.inc M src/mainboard/sifive/hifive-unleashed/Makefile.inc M src/mainboard/supermicro/x10slm-f/Makefile.inc M src/mainboard/supermicro/x11-lga1151-series/Makefile.inc D src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/Makefile.inc M src/mainboard/system76/lemp9/Makefile.inc M src/mainboard/ti/beaglebone/Makefile.inc M src/mainboard/up/squared/Makefile.inc 159 files changed, 3 insertions(+), 395 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/41107/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/41107 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1961646c5ed4ae6a1308ce0e8e15792970da4e0d Gerrit-Change-Number: 41107 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: handle ramstage.c by default in Make
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41106 ) Change subject: arch/x86: handle ramstage.c by default in Make ...................................................................... Uploaded patch set 4: New patch set was added with same tree, parent, and commit message as Patch Set 3. -- To view, visit https://review.coreboot.org/c/coreboot/+/41106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfc7d8eb97b4a98317cf6f76bbf1da56bc0c9afa Gerrit-Change-Number: 41106 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 10:54:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: handle ramstage.c by default in Make
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Martin Roth, Patrick Georgi, Matt DeVillier, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41106 to look at the new patch set (#4). Change subject: arch/x86: handle ramstage.c by default in Make ...................................................................... arch/x86: handle ramstage.c by default in Make Some boards use `ramstage.c` instead of `mainboard.c`, some use both. Implicitly handle `ramstage.c` in mainboards' directories, too. Change-Id: Ibfc7d8eb97b4a98317cf6f76bbf1da56bc0c9afa Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/arch/x86/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/41106/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/41106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfc7d8eb97b4a98317cf6f76bbf1da56bc0c9afa Gerrit-Change-Number: 41106 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: handle bootblock.c by default in Make
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41105 ) Change subject: arch/x86: handle bootblock.c by default in Make ...................................................................... Uploaded patch set 6: New patch set was added with same tree, parent, and commit message as Patch Set 5. -- To view, visit https://review.coreboot.org/c/coreboot/+/41105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62648bed633b5d9646bc3b943019191b4918f1dc Gerrit-Change-Number: 41105 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 10:54:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: handle bootblock.c by default in Make
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Patrick Georgi, Martin Roth, Matt DeVillier, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41105 to look at the new patch set (#6). Change subject: arch/x86: handle bootblock.c by default in Make ...................................................................... arch/x86: handle bootblock.c by default in Make Implicitly handle `bootblock.c` in mainboards' directories just like the equivalents for ramstage, romstage and smm. Change-Id: I62648bed633b5d9646bc3b943019191b4918f1dc Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/arch/x86/Makefile.inc 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/41105/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/41105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62648bed633b5d9646bc3b943019191b4918f1dc Gerrit-Change-Number: 41105 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41116 ) Change subject: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX ...................................................................... Uploaded patch set 4: Commit message was updated. (1 comment) https://review.coreboot.org/c/coreboot/+/41116/3//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41116/3//COMMIT_MSG@9 PS3, Line 9: CB:41106 revealed > I’d a assume it is a parent of this commit, but it seems not (and still up for review). […] well, it was late .... ;) -- To view, visit https://review.coreboot.org/c/coreboot/+/41116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9 Gerrit-Change-Number: 41116 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 10:54:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX
by Michael Niewöhner (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Jonathan Zhang, Maxim Polyakov, Johnny Lin, Paul Menzel, Andrey Petrov, Angel Pons, Andrey Petrov, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41116 to look at the new patch set (#4). Change subject: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX ...................................................................... soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX CB:41106 revealed that mb/intel/cedarisland already sets FSP-S UPD (see CB:40735) while the required includes are still missing in CPX. Buildbot did not fail because `ramstage.c` never was (implicitly) included. Fix this problem by making SKX/CPX share a common ramstage header for now by moving the one from SKX. Test: Build cedarisland_crb Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- D src/soc/intel/xeon_sp/cpx/include/soc/ramstage.h R src/soc/intel/xeon_sp/include/soc/ramstage.h 2 files changed, 0 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/41116/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/41116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9 Gerrit-Change-Number: 41116 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/clevo/n141cu: Add new Comet Lake mainboard
by Felix Singer (Code Review) 07 May '20

07 May '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mb/clevo/n141cu: Add new Comet Lake mainboard ...................................................................... Patch Set 31: (4 comments) https://review.coreboot.org/c/coreboot/+/40581/30//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40581/30//COMMIT_MSG@37 PS30, Line 37: - Everything else works > Dots at the end please. Done https://review.coreboot.org/c/coreboot/+/40581/30//COMMIT_MSG@40 PS30, Line 40: - Missing libgfxinit support > Please elaborate what is missing? libgfxinit does not support the device? Done https://review.coreboot.org/c/coreboot/+/40581/30//COMMIT_MSG@41 PS30, Line 41: - Missing flashrom support > Also from coreboot? Any idea what is missing? I removed this, since it's not related to coreboot or to this port. Therefore I think this is a bit misleading here. flashrom doesn't have support for the platform yet. There is already a patch available, but afaik something is missing, and it needs a rebase. https://review.coreboot.org/c/flashrom/+/37677/ https://review.coreboot.org/c/coreboot/+/40581/30//COMMIT_MSG@42 PS30, Line 42: - Different configuration switches mentioned in ramstage.c > Dot/period at the end. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 31 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 10:28:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Add Sata related UPDs configuration
by Ronak Kanabar (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#8). Change subject: soc/intel/jasperlake: Add Sata related UPDs configuration ...................................................................... soc/intel/jasperlake: Add Sata related UPDs configuration This patch will allow to control Sata related UPDs from devicetree so that UPD values can be configure as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/fsp_params.c 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Allow Sata related UPDs to be filled from devic...
by Ronak Kanabar (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#7). Change subject: soc/intel/jasperlake: Allow Sata related UPDs to be filled from devicetree ...................................................................... soc/intel/jasperlake: Allow Sata related UPDs to be filled from devicetree This patch will allow to control Sata related UPDs from devicetree so that UPD values can be set as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/fsp_params.c 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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