coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

1 participants
3326 discussions

Change in coreboot[master]: mb/intel/jasperlake_rvp: add memory config for JSLRVP
by Ronak Kanabar (Code Review) 17 Mar '20

17 Mar '20

Hello V Sowmya, Varshit B Pandya, build bot (Jenkins), Patrick Georgi, Martin Roth, Maulik V Vaghela, Rizwan Qureshi, Subrata Banik, Aamir Bohra, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39195 to look at the new patch set (#8). Change subject: mb/intel/jasperlake_rvp: add memory config for JSLRVP ...................................................................... mb/intel/jasperlake_rvp: add memory config for JSLRVP Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/Kconfig M src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c M src/mainboard/intel/jasperlake_rvp/spd/Makefile.inc A src/mainboard/intel/jasperlake_rvp/spd/jslrvp.spd.hex D src/mainboard/intel/jasperlake_rvp/spd/spd_util.c M src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/Makefile.inc A src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory_ddr4.c A src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory_lp4x.c 9 files changed, 215 insertions(+), 143 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/39195/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: jasperlake_rvp: Add UART config for JSLRVP
by Ronak Kanabar (Code Review) 17 Mar '20

17 Mar '20

Hello Varshit B Pandya, build bot (Jenkins), Maulik V Vaghela, Subrata Banik, Meera Ravindranath, Aamir Bohra, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39196 to look at the new patch set (#8). Change subject: jasperlake_rvp: Add UART config for JSLRVP ...................................................................... jasperlake_rvp: Add UART config for JSLRVP Change-Id: Ic042cdc449b77c2d9bdd7a63777328e47f910654 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/Kconfig 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/39196/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/39196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic042cdc449b77c2d9bdd7a63777328e47f910654 Gerrit-Change-Number: 39196 Gerrit-PatchSet: 8 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: jasperlake_rvp: Add UART config for JSLRVP
by Ronak Kanabar (Code Review) 17 Mar '20

17 Mar '20

Hello Varshit B Pandya, build bot (Jenkins), Maulik V Vaghela, Subrata Banik, Meera Ravindranath, Aamir Bohra, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39196 to look at the new patch set (#7). Change subject: jasperlake_rvp: Add UART config for JSLRVP ...................................................................... jasperlake_rvp: Add UART config for JSLRVP Change-Id: Ic042cdc449b77c2d9bdd7a63777328e47f910654 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/Kconfig 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/39196/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/39196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic042cdc449b77c2d9bdd7a63777328e47f910654 Gerrit-Change-Number: 39196 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Ronak Kanabar (Code Review) 16 Mar '20

16 Mar '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39401/1//COMMIT_MSG@6 PS1, Line 6: : soc/intel/tigerlake:add > Please add one space after the colon. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 06:59:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: add support to read spd data from SMBUS
by Ronak Kanabar (Code Review) 16 Mar '20

16 Mar '20

Hello V Sowmya, Varshit B Pandya, build bot (Jenkins), Maulik V Vaghela, Rizwan Qureshi, Subrata Banik, Meera Ravindranath, Aamir Bohra, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39401 to look at the new patch set (#3). Change subject: soc/intel/tigerlake: add support to read spd data from SMBUS ...................................................................... soc/intel/tigerlake: add support to read spd data from SMBUS JSLRVP has DDR4 variant which uses SMBUS address to read SPD data. So, add support to read SPD data from SMBUS Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/tigerlake/include/soc/meminit_jsl.h M src/soc/intel/tigerlake/meminit_jsl.c 2 files changed, 27 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/39401/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/deltaur: add deltaur mainboard initial support
by EricR Lai (Code Review) 16 Mar '20

16 Mar '20

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39502 ) Change subject: mb/google/deltaur: add deltaur mainboard initial support ...................................................................... Patch Set 3: > Patch Set 3: > > > Patch Set 3: > > > > Should we create deltaue in variants as well? Or just let it in baseboard? I think it is different variants. > > The plan is to add deltaur once we have the GPIO config. for the moment we focus on Deltan LGTM. -- To view, visit https://review.coreboot.org/c/coreboot/+/39502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Gerrit-Change-Number: 39502 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 17 Mar 2020 06:36:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Furquan Shaikh (Code Review) 16 Mar '20

16 Mar '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/39579/1/src/soc/intel/apollolake/c… File src/soc/intel/apollolake/chip.c: https://review.coreboot.org/c/coreboot/+/39579/1/src/soc/intel/apollolake/c… PS1, Line 637: silconfig->Gmm = dev ? dev->enabled : 0; > I’d explicitly check for `dev == NULL`, and print an error. I am not sure if adding an error print here is really correct. This device is not added to any of the current GLK boards. Also, I don't think it is necessary to add it since those don't care about the device. So, adding an error print means all the current boards without this device would start logging an error which is not really appropriate for that board. -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 2 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 05:46:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Edward O'Callaghan (Code Review) 16 Mar '20

16 Mar '20

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 2 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 05:27:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/skylake: Configure ASPM and L1 substates for PCH root ports
by Benjamin Doron (Code Review) 16 Mar '20

16 Mar '20

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39538 ) Change subject: soc/intel/skylake: Configure ASPM and L1 substates for PCH root ports ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/c/coreboot/+/39538/6/src/soc/intel/skylake/chip… File src/soc/intel/skylake/chip.c: https://review.coreboot.org/c/coreboot/+/39538/6/src/soc/intel/skylake/chip… PS6, Line 221: PcieRpAspm > Yes, you probably want something like the L1 substate thing With ASPM_DISABLED, coreboot reports that it enabled L1 for ASPM? However, the errors reported by AER are no longer present. -- To view, visit https://review.coreboot.org/c/coreboot/+/39538 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36150858485715016158595c832c142b0582ddb8 Gerrit-Change-Number: 39538 Gerrit-PatchSet: 12 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Mar 2020 05:20:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake
by Franklin (Yanjin) He (Code Review) 16 Mar '20

16 Mar '20

Franklin (Yanjin) He has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/39579 ) Change subject: soc/intel/apollolake: Allow toggling of GMM in devicetree in Gemini Lake ...................................................................... Removed Code-Review+1 by Franklin (Yanjin) He <franklinh(a)google.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/39579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72b1dd78705894f0462c7fbe89b76551950c2392 Gerrit-Change-Number: 39579 Gerrit-PatchSet: 2 Gerrit-Owner: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Franklin (Yanjin) He <franklinh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: deleteVote

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2020