coreboot-gerrit February 2020

coreboot-gerrit@coreboot.org

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1797 discussions

Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Hello Kyösti Mälkki, Christoph Pomaska, Angel Pons, Paul Menzel, Jonathan Neuschäfer, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37565 to look at the new patch set (#14). Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) The Razer Blade Stealth Mercury White is a Ice Lake system using: - Intel i7-1065G7 (Ice Lake with Iris Plus GPU) - ITE IT8320VG EC (currently unsupported in coreboot) - Samsung M981 MZ-VLKB2560 256GB NVMe SSD - Four Samsung K4UBE3D4AM-GHCL LPDDR4 chips - Integrated TitanRidge Thunderbolt 3 / 4 controller - Two Realtek Audio chips: - ALC298 for the audio jack - ALC1306 for the speakers - Parade PS8802 USB Type-C Host Switch - Unlabeled Intel USB Type-C Thunderbolt Switch This commit includes basic ram init and devicetree configuration and therefore everything required to call into the payload. It is missing ACPI, power and advanced device initialization as well as EC support which should be included on its own in a future commit. Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/blade_stealth_icl/Kconfig A src/mainboard/razer/blade_stealth_icl/Kconfig.name A src/mainboard/razer/blade_stealth_icl/Makefile.inc A src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_icl/board_info.txt A src/mainboard/razer/blade_stealth_icl/bootblock.c A src/mainboard/razer/blade_stealth_icl/devicetree.cb A src/mainboard/razer/blade_stealth_icl/dsdt.asl A src/mainboard/razer/blade_stealth_icl/gpio.h A src/mainboard/razer/blade_stealth_icl/hda_verb.c A src/mainboard/razer/blade_stealth_icl/ramstage.c A src/mainboard/razer/blade_stealth_icl/romstage.c A src/mainboard/razer/blade_stealth_icl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_icl/spd/samsung_K4UBE3D4AA.spd.hex 14 files changed, 649 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/37565/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 14 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Mimoja has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37565 ) Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... Patch Set 13: (2 comments) https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… File src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl: https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… PS12, Line 4: * Copyright (C) 2019 Mimoja <git(a)mimoja.de> > IANAL, but doesnt this require a real name instead? Done https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… File src/mainboard/razer/blade_stealth_icl/dsdt.asl: https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… PS12, Line 5: * Copyright (C) 2019 Mimoja <git(a)mimoja.de> > Same as mainboard. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 13 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Mon, 10 Feb 2020 11:11:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Christoph Pomaska <github(a)slrie.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Hello Kyösti Mälkki, Christoph Pomaska, Angel Pons, Paul Menzel, Jonathan Neuschäfer, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37565 to look at the new patch set (#13). Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) The Razer Blade Stealth Mercury White is a Ice Lake system using: - Intel i7-1065G7 (Ice Lake with Iris Plus GPU) - ITE IT8320VG EC (currently unsupported in coreboot) - Samsung M981 MZ-VLKB2560 256GB NVMe SSD - Four Samsung K4UBE3D4AM-GHCL LPDDR4 chips - Integrated TitanRidge Thunderbolt 3 / 4 controller - Two Realtek Audio chips: - ALC298 for the audio jack - ALC1306 for the speakers - Parade PS8802 USB Type-C Host Switch - Unlabeled Intel USB Type-C Thunderbolt Switch This commit includes basic ram init and devicetree configuration and therefore everything required to call into the payload. It is missing ACPI, power and advanced device initialization as well as EC support which should be included on its own in a future commit. Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/blade_stealth_icl/Kconfig A src/mainboard/razer/blade_stealth_icl/Kconfig.name A src/mainboard/razer/blade_stealth_icl/Makefile.inc A src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_icl/board_info.txt A src/mainboard/razer/blade_stealth_icl/bootblock.c A src/mainboard/razer/blade_stealth_icl/devicetree.cb A src/mainboard/razer/blade_stealth_icl/dsdt.asl A src/mainboard/razer/blade_stealth_icl/gpio.h A src/mainboard/razer/blade_stealth_icl/hda_verb.c A src/mainboard/razer/blade_stealth_icl/ramstage.c A src/mainboard/razer/blade_stealth_icl/romstage.c A src/mainboard/razer/blade_stealth_icl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_icl/spd/samsung_K4UBE3D4AA.spd.hex 14 files changed, 648 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/37565/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 13 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Christoph Pomaska (Code Review) 10 Feb '20

10 Feb '20

Christoph Pomaska has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37565 ) Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... Patch Set 12: (2 comments) https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… File src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl: https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… PS12, Line 4: * Copyright (C) 2019 Mimoja <git(a)mimoja.de> IANAL, but doesnt this require a real name instead? https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… File src/mainboard/razer/blade_stealth_icl/dsdt.asl: https://review.coreboot.org/c/coreboot/+/37565/12/src/mainboard/razer/blade… PS12, Line 5: * Copyright (C) 2019 Mimoja <git(a)mimoja.de> Same as mainboard.asl -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 12 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Mon, 10 Feb 2020 11:01:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Hello Kyösti Mälkki, Christoph Pomaska, Angel Pons, Paul Menzel, Jonathan Neuschäfer, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37565 to look at the new patch set (#12). Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) The Razer Blade Stealth Mercury White is a Ice Lake system using: - Intel i7-1065G7 (Ice Lake with Iris Plus GPU) - ITE IT8320VG EC (currently unsupported in coreboot) - Samsung M981 MZ-VLKB2560 256GB NVMe SSD - Four Samsung K4UBE3D4AM-GHCL LPDDR4 chips - Integrated TitanRidge Thunderbolt 3 / 4 controller - Two Realtek Audio chips: - ALC298 for the audio jack - ALC1306 for the speakers - Parade PS8802 USB Type-C Host Switch - Unlabeled Intel USB Type-C Thunderbolt Switch This commit includes basic ram init and devicetree configuration and therefore everything required to call into the payload. It is missing ACPI, power and advanced device initialization as well as EC support which should be included on its own in a future commit. Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/blade_stealth_icl/Kconfig A src/mainboard/razer/blade_stealth_icl/Kconfig.name A src/mainboard/razer/blade_stealth_icl/Makefile.inc A src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_icl/board_info.txt A src/mainboard/razer/blade_stealth_icl/bootblock.c A src/mainboard/razer/blade_stealth_icl/devicetree.cb A src/mainboard/razer/blade_stealth_icl/dsdt.asl A src/mainboard/razer/blade_stealth_icl/gpio.h A src/mainboard/razer/blade_stealth_icl/hda_verb.c A src/mainboard/razer/blade_stealth_icl/ramstage.c A src/mainboard/razer/blade_stealth_icl/romstage.c A src/mainboard/razer/blade_stealth_icl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_icl/spd/samsung_K4UBE3D4AA.spd.hex 14 files changed, 649 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/37565/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 12 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Mimoja has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37565 ) Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... Patch Set 11: (1 comment) https://review.coreboot.org/c/coreboot/+/37565/10//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/37565/10//COMMIT_MSG@23 PS10, Line 23: APCI > ACPI Done -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 11 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Mon, 10 Feb 2020 08:24:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/razer: Add initial support for the Blade Stealth Mercury White (la...
by Mimoja (Code Review) 10 Feb '20

10 Feb '20

Hello Kyösti Mälkki, Christoph Pomaska, Angel Pons, Paul Menzel, Jonathan Neuschäfer, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37565 to look at the new patch set (#11). Change subject: mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) ...................................................................... mb/razer: Add initial support for the Blade Stealth Mercury White (late 2019) The Razer Blade Stealth Mercury White is a Ice Lake system using: - Intel i7-1065G7 (Ice Lake with Iris Plus GPU) - ITE IT8320VG EC (currently unsupported in coreboot) - Samsung M981 MZ-VLKB2560 256GB NVMe SSD - Four Samsung K4UBE3D4AM-GHCL LPDDR4 chips - Integrated TitanRidge Thunderbolt 3 / 4 controller - Two Realtek Audio chips: - ALC298 for the audio jack - ALC1306 for the speakers - Parade PS8802 USB Type-C Host Switch - Unlabled Intel USB Type-C Thunderbolt Switch This commit includes basic ram init and devicetree configuration and therefore everything required to call into the payload. It is missing ACPI, power and advanced device initialization as well as EC support which should be included on its own in a future commit. Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Signed-off-by: Johanna Schander <coreboot(a)mimoja.de> --- A src/mainboard/razer/blade_stealth_icl/Kconfig A src/mainboard/razer/blade_stealth_icl/Kconfig.name A src/mainboard/razer/blade_stealth_icl/Makefile.inc A src/mainboard/razer/blade_stealth_icl/acpi/mainboard.asl A src/mainboard/razer/blade_stealth_icl/board_info.txt A src/mainboard/razer/blade_stealth_icl/bootblock.c A src/mainboard/razer/blade_stealth_icl/devicetree.cb A src/mainboard/razer/blade_stealth_icl/dsdt.asl A src/mainboard/razer/blade_stealth_icl/gpio.h A src/mainboard/razer/blade_stealth_icl/hda_verb.c A src/mainboard/razer/blade_stealth_icl/ramstage.c A src/mainboard/razer/blade_stealth_icl/romstage.c A src/mainboard/razer/blade_stealth_icl/spd/Makefile.inc A src/mainboard/razer/blade_stealth_icl/spd/samsung_K4UBE3D4AA.spd.hex 14 files changed, 649 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/37565/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/37565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5711cbcd69813832d9bacc9563f651ab8702554a Gerrit-Change-Number: 37565 Gerrit-PatchSet: 11 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block: Enable PMC IPC driver
by Furquan Shaikh (Code Review) 10 Feb '20

10 Feb '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37871 ) Change subject: soc/intel/common/block: Enable PMC IPC driver ...................................................................... Patch Set 17: (1 comment) https://review.coreboot.org/c/coreboot/+/37871/17/src/soc/intel/common/bloc… File src/soc/intel/common/block/include/intelblocks/pmclib.h: https://review.coreboot.org/c/coreboot/+/37871/17/src/soc/intel/common/bloc… PS17, Line 34: pmc_ipc_cmd > Having a comment indicating how this is supposed to be used will be helpful. As I think about this more, it might make sense to just have a union: union pmc_ipc_cmd { uint32_t cmd_reg; struct { uint32_t cmd:8; uint32_t msi:1; uint32_t res_1:3; uint32_t subcmd:4; uint32_t len:8; uint32_t res_2:8; }; } This will relieve the callers to always have to define a union locally when using pmc_send_ipc_cmd. What do you think? -- To view, visit https://review.coreboot.org/c/coreboot/+/37871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd3ed262fc700ccc891ec68997a108f5bfbaf9ed Gerrit-Change-Number: 37871 Gerrit-PatchSet: 17 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Mon, 10 Feb 2020 07:40:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)
by Furquan Shaikh (Code Review) 10 Feb '20

10 Feb '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37867 ) Change subject: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) ...................................................................... Patch Set 17: (1 comment) https://review.coreboot.org/c/coreboot/+/37867/13/src/ec/google/chromeec/ec… File src/ec/google/chromeec/ec.c: https://review.coreboot.org/c/coreboot/+/37867/13/src/ec/google/chromeec/ec… PS13, Line 1539: resp.reserve > Ack So, if I understand this correctly, EC returns SoC USB2 and USB3 port numbers corresponding to EC port? Do we really need to rely on that? We are already adding that information to override tree. Example: https://chromium.git.corp.google.com/chromiumos/third_party/coreboot/+/0c52…. Can we make use of that here to determine USB2/3 port numbers? See example in https://review.coreboot.org/c/coreboot/+/38541 where the information added to devicetree is being used to export this to kernel as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/37867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96bfb6036f4340ba42a078cfd7ecaae777a3ed00 Gerrit-Change-Number: 37867 Gerrit-PatchSet: 17 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Divya S Sasidharan <divya.s.sasidharan(a)intel.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Mon, 10 Feb 2020 07:38:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Comment-In-Reply-To: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/drallion: Update IA VR TDC current limit
by John Su (Code Review) 10 Feb '20

10 Feb '20

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38718 ) Change subject: mb/google/drallion: Update IA VR TDC current limit ...................................................................... mb/google/drallion: Update IA VR TDC current limit Since Drallion is run CML U platform use baseline CPU and follow b:148912093#comment1. Change IA TDC value from 58w to 48w. BUG=b:148912093 BRANCH=None TEST=build coreboot and checked IA_TDC from TAT tool. Change-Id: I5a80fb4fd0a9bd9bc343c1c0c7b47bb947fca226 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/drallion/ramstage.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/38718/1 diff --git a/src/mainboard/google/drallion/ramstage.c b/src/mainboard/google/drallion/ramstage.c index 3855045..40a0faf 100644 --- a/src/mainboard/google/drallion/ramstage.c +++ b/src/mainboard/google/drallion/ramstage.c @@ -21,11 +21,33 @@ #include <soc/ramstage.h> #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> #define VPD_KEY_SYSTEM_SERIAL "serial_number" #define VPD_KEY_MAINBOARD_SERIAL "mlb_serial_number" #define VPD_SERIAL_LEN 64 +/* Thermal Design Current current limit. 0-4095 in 1/8A units. 1000 = 125A */ +#define VR_CFG_TDC(i) (uint16_t)((i) * 8) + +void mainboard_silicon_init_params(FSP_S_CONFIG *params) +{ + config_t *cfg = config_of_soc(); + static uint16_t mch_id = 0; + + if (!mch_id) { + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); + mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff; + } + /* IA TDC current limit is 48A for baseline U42 and U62 */ + if ((mch_id == PCI_DEVICE_ID_INTEL_CML_ULT) || (mch_id == PCI_DEVICE_ID_INTEL_CML_ULT_6_2)) { + if (cfg->cpu_pl2_4_cfg == baseline) + /* TdcPowerLimit[1] = IA TDC current limit */ + params->TdcPowerLimit[1] = VR_CFG_TDC(48); + } +} + const char *smbios_system_serial_number(void) { static char serial[VPD_SERIAL_LEN]; -- To view, visit https://review.coreboot.org/c/coreboot/+/38718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a80fb4fd0a9bd9bc343c1c0c7b47bb947fca226 Gerrit-Change-Number: 38718 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit February 2020