Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48094
to look at the new patch set (#21).
Change subject: drivers/ipmi: add code to set BMC/IPMI enablement from jumper
......................................................................
drivers/ipmi: add code to set BMC/IPMI enablement from jumper
Some boards, like the Supermicro X11SSM-F, have a jumper for enabling or
disabling the BMC and IPMI. Add a new devicetree driver option to set
the GPIO used for the jumper and enable or disable IPMI according to its
value.
This gets used in the follow-up change by Supermicro X11SSM-F.
Test: Boot with jumper set to each enabled and disabled and see if IPMI
gets enabled. Successfully tested on Supermicro X11SSM-F.
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Change-Id: Icde3232843a7138797a4b106560f170972edeb9c
---
M src/drivers/ipmi/chip.h
M src/drivers/ipmi/ipmi_kcs_ops.c
2 files changed, 28 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/48094/21
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Gerrit-Change-Number: 48094
Gerrit-PatchSet: 21
Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de>
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48094 )
Change subject: drivers/ipmi: add code to set BMC/IPMI enablement from jumper
......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48094/20/src/drivers/ipmi/ipmi_kcs…
File src/drivers/ipmi/ipmi_kcs_ops.c:
https://review.coreboot.org/c/coreboot/+/48094/20/src/drivers/ipmi/ipmi_kcs…
PS20, Line 94: dev->enabled = conf->gpio_dev->ops->ops_gpio->get(conf->bmc_jumper_gpio);
line over 96 characters
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Aaron Durbin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48582
to look at the new patch set (#4).
Change subject: device + util/sconfig: introduce new device `gpio`
......................................................................
device + util/sconfig: introduce new device `gpio`
Introduce a new device `gpio` that is going to be used for generic
abstraction of gpio operations in the devicetree.
This change adds the nev device type to sconfig and adds generic gpio
operations to the `device_operations` struct.
Change-Id: Ic4572ad8b37bd1afd2fb213b2c67fb8aec536786
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/device/device_const.c
M src/device/device_util.c
M src/include/device/device.h
A src/include/device/gpio.h
M src/include/device/path.h
M util/sconfig/lex.yy.c_shipped
M util/sconfig/main.c
M util/sconfig/sconfig.l
M util/sconfig/sconfig.tab.c_shipped
M util/sconfig/sconfig.tab.h_shipped
M util/sconfig/sconfig.y
11 files changed, 335 insertions(+), 390 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/48582/4
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Gerrit-MessageType: newpatchset
Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48094
to look at the new patch set (#20).
Change subject: drivers/ipmi: add code to set BMC/IPMI enablement from jumper
......................................................................
drivers/ipmi: add code to set BMC/IPMI enablement from jumper
Some boards, like the Supermicro X11SSM-F, have a jumper for enabling or
disabling the BMC and IPMI. Add a new devicetree driver option to set
the GPIO used for the jumper and enable or disable IPMI according to its
value.
This gets used in the follow-up change by Supermicro X11SSM-F.
Test: Boot with jumper set to each enabled and disabled and see if IPMI
gets enabled. Successfully tested on Supermicro X11SSM-F.
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Change-Id: Icde3232843a7138797a4b106560f170972edeb9c
---
M src/drivers/ipmi/chip.h
M src/drivers/ipmi/ipmi_kcs_ops.c
2 files changed, 26 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/48094/20
--
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Gerrit-Change-Number: 48094
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Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
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Gerrit-MessageType: newpatchset
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48094 )
Change subject: drivers/ipmi: add code to set BMC/IPMI enablement from jumper
......................................................................
Patch Set 18:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48094/18//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/48094/18//COMMIT_MSG@15
PS18, Line 15:
: Test: Boot with jumper set to each enabled and disabled and see if IPMI
: gets enabled. Successfully tested on Supermicro X11SSM-F.
:
I need to test this again
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48582 )
Change subject: device + util/sconfig: introduce new device `gpio`
......................................................................
Patch Set 3:
This change is ready for review.
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Gerrit-Comment-Date: Sun, 13 Dec 2020 01:02:15 +0000
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Gerrit-MessageType: comment
Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48094
to look at the new patch set (#18).
Change subject: drivers/ipmi: add code to set BMC/IPMI enablement from jumper
......................................................................
drivers/ipmi: add code to set BMC/IPMI enablement from jumper
Some boards, like the Supermicro X11SSM-F, have a jumper for enabling or
disabling the BMC and IPMI. Add a new devicetree driver option to set
the GPIO used for the jumper and enable or disable IPMI according to its
value.
This gets used in the follow-up change by Supermicro X11SSM-F.
Test: Boot with jumper set to each enabled and disabled and see if IPMI
gets enabled. Successfully tested on Supermicro X11SSM-F.
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Change-Id: Icde3232843a7138797a4b106560f170972edeb9c
---
M src/drivers/ipmi/chip.h
M src/drivers/ipmi/ipmi_kcs_ops.c
2 files changed, 26 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/48094/18
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Gerrit-Change-Id: Icde3232843a7138797a4b106560f170972edeb9c
Gerrit-Change-Number: 48094
Gerrit-PatchSet: 18
Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48514 )
Change subject: soc/amd/picasso: move UART Kconfig options to common folder
......................................................................
soc/amd/picasso: move UART Kconfig options to common folder
The actual UART initialization code will be factored out in follow-up
commits.
Change-Id: Ie4ddf1951b230323c5480c4389376c62dd74b0e1
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
A src/soc/amd/common/block/uart/Kconfig
M src/soc/amd/picasso/Kconfig
2 files changed, 58 insertions(+), 47 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/48514/1
diff --git a/src/soc/amd/common/block/uart/Kconfig b/src/soc/amd/common/block/uart/Kconfig
new file mode 100644
index 0000000..599594b
--- /dev/null
+++ b/src/soc/amd/common/block/uart/Kconfig
@@ -0,0 +1,57 @@
+config SOC_AMD_COMMON_BLOCK_UART
+ bool
+ default n
+ help
+ Select this option to add the common functions for setting up the
+ UART configuration to the build.
+
+if SOC_AMD_COMMON_BLOCK_UART
+
+config AMD_SOC_CONSOLE_UART
+ bool "Use integrated AMD SoC UART controller for console"
+ default n
+ select DRIVERS_UART_8250MEM
+ select DRIVERS_UART_8250MEM_32
+ select NO_UART_ON_SUPERIO
+ select UART_OVERRIDE_REFCLK
+ help
+ There are four memory-mapped UARTs controllers at:
+ 0: 0xfedc9000
+ 1: 0xfedca000
+ 2: 0xfedc3000
+ 3: 0xfedcf000
+
+choice
+ prompt "UART Frequency"
+ depends on AMD_SOC_CONSOLE_UART
+ default AMD_SOC_UART_48MZ
+
+config AMD_SOC_UART_48MZ
+ bool "48 MHz clock"
+ help
+ Select this option for the most compatibility.
+
+config AMD_SOC_UART_1_8MZ
+ bool "1.8432 MHz clock"
+ help
+ Select this option if an old payload or Linux ttyS0 arguments require
+ a 1.8432 MHz clock source for the UART.
+
+endchoice
+
+config AMD_SOC_UART_LEGACY
+ bool "Decode legacy I/O range"
+ help
+ Assign I/O 3F8, 2F8, etc. to an integrated AMD SoC UART. A UART
+ accessed with I/O does not allow all the features of MMIO. The MMIO
+ decode is still present when this option is used.
+
+config CONSOLE_UART_BASE_ADDRESS
+ depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
+ hex
+ default 0xfedc9000 if UART_FOR_CONSOLE = 0
+ default 0xfedca000 if UART_FOR_CONSOLE = 1
+ default 0xfedc3000 if UART_FOR_CONSOLE = 2
+ default 0xfedcf000 if UART_FOR_CONSOLE = 3
+
+endif # SOC_AMD_COMMON_BLOCK_UART
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index c4c7bae..e9930e9 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -42,6 +42,7 @@
select SOC_AMD_COMMON_BLOCK_SMI
select SOC_AMD_COMMON_BLOCK_SMU
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
+ select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_PSP_GEN2
select PROVIDES_ROM_SHARING
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
@@ -273,53 +274,6 @@
help
Base address for the ACPI registers.
-config AMD_SOC_CONSOLE_UART
- bool "Use Picasso UART controller for console"
- default n
- select DRIVERS_UART_8250MEM
- select DRIVERS_UART_8250MEM_32
- select NO_UART_ON_SUPERIO
- select UART_OVERRIDE_REFCLK
- help
- There are four memory-mapped UARTs controllers in Picasso at:
- 0: 0xfedc9000
- 1: 0xfedca000
- 2: 0xfedc3000
- 3: 0xfedcf000
-
-choice
- prompt "UART Frequency"
- depends on AMD_SOC_CONSOLE_UART
- default AMD_SOC_UART_48MZ
-
-config AMD_SOC_UART_48MZ
- bool "48 MHz clock"
- help
- Select this option for the most compatibility.
-
-config AMD_SOC_UART_1_8MZ
- bool "1.8432 MHz clock"
- help
- Select this option if an old payload or Linux ttyS0 arguments
- require it.
-
-endchoice
-
-config AMD_SOC_UART_LEGACY
- bool "Decode legacy I/O range"
- help
- Assign I/O 3F8, 2F8, etc. to a Picasso UART. A UART accessed with I/O
- does not allow all the features of MMIO. The MMIO decode is still
- present when this option is used.
-
-config CONSOLE_UART_BASE_ADDRESS
- depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
- hex
- default 0xfedc9000 if UART_FOR_CONSOLE = 0
- default 0xfedca000 if UART_FOR_CONSOLE = 1
- default 0xfedc3000 if UART_FOR_CONSOLE = 2
- default 0xfedcf000 if UART_FOR_CONSOLE = 3
-
config SMM_TSEG_SIZE
hex
default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER
--
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