Hello build bot (Jenkins), Furquan Shaikh, Matt DeVillier, Paul Menzel, Angel Pons, Subrata Banik, Arthur Heymans, Patrick Rudolph, Nico Huber, Christian Walter, Tim Wawrzynczak, Karthikeyan Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47138
to look at the new patch set (#7).
Change subject: soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
......................................................................
soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
Windows does not comply with the Low Power Idle S0 specification and
crashes with an `INTERNAL_POWER_ERROR` bluescreen when function 1, does
not return at least one device constraint, even when function 1 is
announced as being not available by the enum function. Returning an
empty package does not work.
At least the following Windows versions were verified to be affected:
- Windows 8.1 x64, release 6.3.9600
- Windoes 10 x64, version 1809, build 17763.379
- Windows 10 x64, version 1903, build 18362.53
- Windows 10 x64, version 2004, build 19041.508
- Windows 10 x64, version 20H2 / 2009, build 19042.450
To make Windows work on S0ix-enabled boards, return a dummy constraint
package with a disabled dummy device.
Since the device constraints are only used for debugging low power
states in Linux and probably also in Windows, there shouldn't be any
negative effect to S0ix. Real device constraint entries could be added
at a later point, if needed.
Note: to fully prevent the BSOD mentioned above the LPIT table is
required on Windows, too. The patch for this is WIP, see CB:32350.
If you want to test this, you need to applie the whole ACPI patch
series including the hacky LPIT test implementation from CB:47242:
https://review.coreboot.org/q/topic:%22low_power_idle_fix%22
Test: no bluescreen anymore on Clevo L140CU on all Windows versions
listed above and S0ix gets detected in `powercfg -a`.
Change-Id: Icd08cbcb1dfcb8cbb23f4f4c902bf8c367c8e3ac
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/block/acpi/acpi/pep.asl
1 file changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47138/7
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Gerrit-Change-Number: 47138
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Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46470
to look at the new patch set (#6).
Change subject: soc/intel/common/acpi: rename LPID to PEPD
......................................................................
soc/intel/common/acpi: rename LPID to PEPD
Rename LPID to PEPD for consistency. PEPD means "Power Engine Plug-In
Device" and is the name Intel and vendors usually use, so let's comply.
Change-Id: I1caa009a3946b1c55da8afbae058cafe98940c6d
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/mainboard/google/drallion/variants/drallion/include/variant/acpi/mainboard.asl
M src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
M src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
M src/mainboard/google/volteer/mainboard.asl
M src/soc/intel/common/block/acpi/acpi/pep.asl
5 files changed, 20 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/46470/6
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Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46468
to look at the new patch set (#3).
Change subject: soc/intel/common/acpi: move S0ix UUID to the condition
......................................................................
soc/intel/common/acpi: move S0ix UUID to the condition
Move the UUID to the condition, since there is no need to assign a name
when it is only used once. Also add a comment to make clear that the
functions inside that condition are only used by the Low Power Idle S0
functionality, while the PEPD in general can be present on boards
without S0ix capability, too. For details check CB:46469.
Change-Id: Ic62c37090ad1b747f9d7d204363cc58f96ef67ef
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/block/acpi/acpi/pep.asl
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/46468/3
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Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46470
to look at the new patch set (#5).
Change subject: soc/intel/common/acpi: rename LPID to PEPD
......................................................................
soc/intel/common/acpi: rename LPID to PEPD
Rename LPID to PEPD for consistency. PEPD means "Power Engine Plug-In
Device" and is the name Intel and vendors usually use, so let's comply.
Change-Id: I1caa009a3946b1c55da8afbae058cafe98940c6d
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/mainboard/google/drallion/variants/drallion/include/variant/acpi/mainboard.asl
M src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
M src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
M src/mainboard/google/volteer/mainboard.asl
M src/soc/intel/common/acpi/lpit.asl
5 files changed, 20 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/46470/5
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Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Furquan Shaikh, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46469
to look at the new patch set (#7).
Change subject: soc/intel/common/acpi: add _HID to PEPD
......................................................................
soc/intel/common/acpi: add _HID to PEPD
Add the _HID INT33A1 to PEPD to make Linux recognize it as "Intel Power
Engine" in the pmc core driver.
The _ADR gets dropped, because _HID and _ADR are mutually exclusive.
Change-Id: I7a0335681f1601f7fd8a9245a3dea72ffd100b55
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/block/acpi/acpi/pep.asl
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/46469/7
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Gerrit-Change-Number: 46469
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Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian, Venkata Krishna Nimmagadda,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46471
to look at the new patch set (#9).
Change subject: soc/intel/common/acpi,mb/*: replace LPID with PEPD
......................................................................
soc/intel/common/acpi,mb/*: replace LPID with PEPD
Replace the two duplicate LPID with the new PEPD device.
The PEPD device gets included in the plaforms' `southbridge.asl`, since
it is required to load the `intel_pmc_core` module in Linux, which
checks for the _HID. (See CB:46469 for more info on that.)
There is no harm for mainboards not supporting S0ix, because the _DSM
function won't be called with the LPS0 uuid on such boards. Such boards
can use the debugging functionality of `intel_pmc_core`, too.
Change-Id: Ic8427db33286451618b50ca429d41b604dbb08a5
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/mainboard/google/deltaur/dsdt.asl
M src/mainboard/google/drallion/dsdt.asl
M src/mainboard/google/hatch/dsdt.asl
M src/mainboard/google/sarien/dsdt.asl
M src/mainboard/google/volteer/dsdt.asl
M src/soc/intel/alderlake/acpi/southbridge.asl
M src/soc/intel/cannonlake/acpi/southbridge.asl
D src/soc/intel/common/acpi/lpit.asl
A src/soc/intel/common/block/acpi/acpi/pep.asl
D src/soc/intel/common/block/acpi/acpi/pmc.asl
M src/soc/intel/elkhartlake/acpi/southbridge.asl
M src/soc/intel/jasperlake/acpi/southbridge.asl
M src/soc/intel/tigerlake/acpi/southbridge.asl
13 files changed, 133 insertions(+), 160 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/46471/9
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Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthikeyan Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47140
to look at the new patch set (#5).
Change subject: soc/intel/common/acpi: correct return value for PEPD enum function
......................................................................
soc/intel/common/acpi: correct return value for PEPD enum function
The PEPD enum function returns a bitmask to announce supported/enabled
PEPD functions. Add a comment describing this bitmask and correct the
return value to announce function 1, 5 and 6 as supported.
Change-Id: Ib523a54f5ad695e79005aba422282e03f2bc4bed
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/acpi/lpit.asl
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/47140/5
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