coreboot-gerrit November 2020

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Change in coreboot[master]: mb/google/zork/: Enable REGULATORY_DOMAIN on Vilboz
by EricR Lai (Code Review) 17 Nov '20

17 Nov '20

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47554 ) Change subject: mb/google/zork/: Enable REGULATORY_DOMAIN on Vilboz ...................................................................... mb/google/zork/: Enable REGULATORY_DOMAIN on Vilboz WRDD table is needed for Intel WiFi module to enable SAR function. BUG=b:173066178 BRANCH=zork TEST=dump ACPI and check WRDD exist with Intel WiFi module. Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I9fd6fd19ed188f7ab91faab9e2599b9b09ca5b22 --- M src/mainboard/google/zork/Kconfig.name 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/47554/1 diff --git a/src/mainboard/google/zork/Kconfig.name b/src/mainboard/google/zork/Kconfig.name index 8ed43f0..cd2beca 100644 --- a/src/mainboard/google/zork/Kconfig.name +++ b/src/mainboard/google/zork/Kconfig.name @@ -7,6 +7,7 @@ config BOARD_GOOGLE_VILBOZ bool "-> Vilboz" select BOARD_GOOGLE_BASEBOARD_DALBOZ + select HAVE_REGULATORY_DOMAIN config BOARD_GOOGLE_EZKINIL bool "-> Ezkinil" -- To view, visit https://review.coreboot.org/c/coreboot/+/47554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fd6fd19ed188f7ab91faab9e2599b9b09ca5b22 Gerrit-Change-Number: 47554 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

4 9

Change in coreboot[master]: soc/amd/picasso: Drop the inclusion of entry16.ld and reset16.ld
by Furquan Shaikh (Code Review) 17 Nov '20

17 Nov '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43281 ) Change subject: soc/amd/picasso: Drop the inclusion of entry16.ld and reset16.ld ...................................................................... soc/amd/picasso: Drop the inclusion of entry16.ld and reset16.ld This change drops the inclusion of entry16.ld and reset16.ld instead adds the content of those files directly in memlayout.ld in picasso. This is done to allow the work for top-aligning bootblock to happen independent of Picasso layout. Once that is complete, Picasso layout can be re-evaluated to see if it can make use of the common bootblock linker file includes. TEST=Verified that coreboot.rom generated using --timeless is the same with and without this change for trembyle. Change-Id: Ib1218b24a06d0f69b856fb21458a6183fd21fcbc Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/amd/picasso/memlayout.ld 1 file changed, 16 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/43281/1 diff --git a/src/soc/amd/picasso/memlayout.ld b/src/soc/amd/picasso/memlayout.ld index 6f43ba1..b7f9167 100644 --- a/src/soc/amd/picasso/memlayout.ld +++ b/src/soc/amd/picasso/memlayout.ld @@ -95,7 +95,20 @@ } #if ENV_BOOTBLOCK -/* Bootblock specific scripts which provide more SECTION directives. */ -#include <cpu/x86/16bit/entry16.ld> -#include <cpu/x86/16bit/reset16.ld> + +gdtptr16_offset = gdtptr16 & 0xffff; +nullidt_offset = nullidt & 0xffff; + +SECTIONS { + /* Trigger an error if I have an unuseable start address */ + _TOO_LOW = CONFIG_X86_RESET_VECTOR - 0xfff0; + _bogus = ASSERT(_start16bit >= _TOO_LOW, "_start16bit too low. Please report."); + + . = CONFIG_X86_RESET_VECTOR; + .reset . : { + *(.reset); + . = 15; + BYTE(0x00); + } +} #endif /* ENV_BOOTBLOCK */ -- To view, visit https://review.coreboot.org/c/coreboot/+/43281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1218b24a06d0f69b856fb21458a6183fd21fcbc Gerrit-Change-Number: 43281 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

7 16

Change in coreboot[master]: mb/kontron: Add Kontron mAL10 COMe module support
by Maxim Polyakov (Code Review) 17 Nov '20

17 Nov '20

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: mb/kontron: Add Kontron mAL10 COMe module support ...................................................................... Patch Set 54: (5 comments) https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/acpi/cpld.asl: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 15: 0x00 > 0 Done https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 16: 0x01 > 2 Done https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/carriers/t10-tni/gpio.c: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 9: /* GPIO_0 - GPIO (DW0: 0x44000300, DW1: 0x0003d000) */ > Unless you have access to schematics/boardviews, please drop these comments. Done https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 9: # Configure CLKREQ of PCIe root ports : register "pcie_rp_clkreq_pin[0]" = "1" : register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[2]" = "0" : register "pcie_rp_clkreq_pin[3]" = "0" : register "pcie_rp_clkreq_pin[4]" = "0" : register "pcie_rp_clkreq_pin[5]" = "0" > Carriers should also control which PCIe root ports are enabled. […] Done https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/variants/mal10/gpio.c: https://review.coreboot.org/c/coreboot/+/39133/48/src/mainboard/kontron/mal… PS48, Line 9: /* GPIO_97 - FST_SPI_CS0_N (DW0: 0x44000502, DW1: 0x00003c00) */ > Same as other gpio. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 54 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Nov 2020 06:53:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/volteer: Enable SOC_INTEL_CSE_LITE_SKU_2_0
by Jamie Ryu (Code Review) 17 Nov '20

17 Nov '20

Jamie Ryu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46846 ) Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_LITE_SKU_2_0 ...................................................................... mb/google/volteer: Enable SOC_INTEL_CSE_LITE_SKU_2_0 This enables CONFIG_SOC_INTEL_CSE_LITE_SKU_2_0 to add CSE RW blob into FW_MAIN_A_EXTN and FW_MAIN_B_EXTN FMAP regions to optimize boot time. BUG=b:166982406 TEST=build and boot volteer2 to OS. Verify warm boot time is reduced. Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Change-Id: Ida67bfd022f4ef1031adbbb8361c8b84d20b92c8 --- M src/mainboard/google/volteer/Kconfig.name 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46846/1 diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index f59d82b..e3da732 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -6,12 +6,14 @@ select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_INTEL_CSE_LITE_SKU_2_0 config BOARD_GOOGLE_ELDRID bool "-> Eldrid" select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0 config BOARD_GOOGLE_HALVOR bool "-> Halvor" @@ -33,6 +35,7 @@ select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0 config BOARD_GOOGLE_TODOR bool "-> Todor" @@ -57,12 +60,14 @@ select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_INTEL_CSE_LITE_SKU_2_0 config BOARD_GOOGLE_VOXEL bool "-> Voxel" select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0 config BOARD_GOOGLE_BOLDAR bool "-> Boldar" @@ -71,3 +76,5 @@ config BOARD_GOOGLE_ELEMI bool "-> Elemi" select BOARD_GOOGLE_BASEBOARD_VOLTEER + select SOC_INTEL_CSE_LITE_SKU + select SOC_INTEL_CSE_LITE_SKU_2_0 -- To view, visit https://review.coreboot.org/c/coreboot/+/46846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida67bfd022f4ef1031adbbb8361c8b84d20b92c8 Gerrit-Change-Number: 46846 Gerrit-PatchSet: 1 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-MessageType: newchange

2 6

Change in coreboot[master]: drivers/i2c/sx9310: Refactor register struct
by EricR Lai (Code Review) 17 Nov '20

17 Nov '20

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47639 ) Change subject: drivers/i2c/sx9310: Refactor register struct ...................................................................... drivers/i2c/sx9310: Refactor register struct WIP Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I7d10f747e617e69a7697882c373ffdea2b43b691 --- M src/drivers/i2c/sx9310/chip.h M src/drivers/i2c/sx9310/sx9310.c M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/mushu/overridetree.cb M src/mainboard/google/octopus/variants/bobba/overridetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/volteer/variants/halvor/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/terrador/overridetree.cb M src/mainboard/google/volteer/variants/todor/overridetree.cb M src/mainboard/google/volteer/variants/trondo/overridetree.cb M src/mainboard/google/volteer/variants/volteer/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb M src/mainboard/google/volteer/variants/voxel/overridetree.cb 14 files changed, 650 insertions(+), 326 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/47639/1 diff --git a/src/drivers/i2c/sx9310/chip.h b/src/drivers/i2c/sx9310/chip.h index 96690e3..1ba0716 100644 --- a/src/drivers/i2c/sx9310/chip.h +++ b/src/drivers/i2c/sx9310/chip.h @@ -6,9 +6,13 @@ #include <acpi/acpi_device.h> #include <device/i2c_simple.h> -#define REGISTER(NAME) uint8_t NAME +#define MAX_REG 47 +#define REG_LEN 40 struct drivers_i2c_sx9310_config { + /* ACPI _HID (required) */ + const char *hid; + /* Device Description */ const char *desc; @@ -23,9 +27,10 @@ /* IO-APIC interrupt */ struct acpi_irq irq; -#include "registers.h" + + struct { + const char *reg_name; + uint8_t value; + } regs[MAX_REG]; }; - -#undef REGISTER - #endif /* __DRIVERS_I2C_SX9310_CHIP_H__ */ diff --git a/src/drivers/i2c/sx9310/sx9310.c b/src/drivers/i2c/sx9310/sx9310.c index 8dc57a2..6542a96 100644 --- a/src/drivers/i2c/sx9310/sx9310.c +++ b/src/drivers/i2c/sx9310/sx9310.c @@ -9,12 +9,10 @@ #include <string.h> #include "chip.h" -#define I2C_SX9310_ACPI_ID "STH9310" #define I2C_SX9310_ACPI_NAME "Semtech SX9310" -#define REGISTER(NAME) acpi_dp_add_integer(dsd, \ - I2C_SX9310_ACPI_ID "," #NAME, \ - config->NAME) +#define REGISTER(name, val) \ + acpi_dp_add_integer(dsd, (name), (val)) static void i2c_sx9310_fill_ssdt(const struct device *dev) { @@ -27,6 +25,8 @@ .resource = scope, }; struct acpi_dp *dsd; + int index; + char name[REG_LEN]; if (!scope || !config) return; @@ -37,7 +37,7 @@ /* Device */ acpigen_write_scope(scope); acpigen_write_device(acpi_device_name(dev)); - acpigen_write_name_string("_HID", I2C_SX9310_ACPI_ID); + acpigen_write_name_string("_HID", config->hid); acpigen_write_name_integer("_UID", config->uid); acpigen_write_name_string("_DDN", config->desc); acpigen_write_STA(acpi_device_status(dev)); @@ -56,7 +56,14 @@ /* DSD */ dsd = acpi_dp_new_table("_DSD"); -#include "registers.h" + for (index = 0; index < MAX_REG; index++) { + if (config->regs[index].reg_name != NULL) { + snprintf(name, sizeof(name), "%s,%s", config->hid, + config->regs[0].reg_name); + REGISTER(name, config->regs[index].value); + } else + break; + } acpi_dp_write(dsd); acpigen_pop_len(); /* Device */ diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index e13270f..630a7ba 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -122,33 +122,57 @@ device pci 15.2 off end # I2C #2 device pci 15.3 on chip drivers/i2c/sx9310 + register "hid" = ""STH9310"" register "desc" = ""SAR Proximity Sensor"" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A0)" register "speed" = "I2C_SPEED_FAST" register "uid" = "1" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end # I2C #3 diff --git a/src/mainboard/google/hatch/variants/mushu/overridetree.cb b/src/mainboard/google/hatch/variants/mushu/overridetree.cb index 29b87e4..c1f5831 100644 --- a/src/mainboard/google/hatch/variants/mushu/overridetree.cb +++ b/src/mainboard/google/hatch/variants/mushu/overridetree.cb @@ -142,33 +142,57 @@ device pci 15.2 off end # I2C #2 device pci 15.3 on chip drivers/i2c/sx9310 + register "hid" = ""STH9310"" register "desc" = ""SAR Proximity Sensor"" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A0)" register "speed" = "I2C_SPEED_FAST" register "uid" = "1" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end # I2C #3 diff --git a/src/mainboard/google/octopus/variants/bobba/overridetree.cb b/src/mainboard/google/octopus/variants/bobba/overridetree.cb index 662e6af..f375407 100644 --- a/src/mainboard/google/octopus/variants/bobba/overridetree.cb +++ b/src/mainboard/google/octopus/variants/bobba/overridetree.cb @@ -118,32 +118,56 @@ end # - I2C 0 device pci 16.1 on chip drivers/i2c/sx9310 + register "hid" = ""STH9310"" register "desc" = ""SAR Proximity Sensor"" register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_214_IRQ)" register "uid" = "1" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x11" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x11" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end # - I2C 1 diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index ab1588a..960de09 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -310,33 +310,57 @@ end # I2C #0 - Touchscreen device pci 15.1 on chip drivers/i2c/sx9310 + register "hid" = ""STH9310"" register "desc" = ""Right SAR Proximity Sensor"" register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end # I2C #1 @@ -351,33 +375,57 @@ device pci 19.0 on end # UART #2 device pci 19.1 on chip drivers/i2c/sx9310 + register "hid" = ""STH9310"" register "desc" = ""Left SAR Proximity Sensor"" register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D10_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "1" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end # I2C #5 diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb index 568ca73..44baecc 100644 --- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb @@ -78,33 +78,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb index ec9bd67..e0c53ae 100644 --- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb @@ -65,33 +65,57 @@ end device ref i2c3 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/terrador/overridetree.cb b/src/mainboard/google/volteer/variants/terrador/overridetree.cb index c3b5df7..d451c8f 100644 --- a/src/mainboard/google/volteer/variants/terrador/overridetree.cb +++ b/src/mainboard/google/volteer/variants/terrador/overridetree.cb @@ -132,33 +132,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/todor/overridetree.cb b/src/mainboard/google/volteer/variants/todor/overridetree.cb index 2c95b16..a66a440 100644 --- a/src/mainboard/google/volteer/variants/todor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/todor/overridetree.cb @@ -134,33 +134,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/trondo/overridetree.cb b/src/mainboard/google/volteer/variants/trondo/overridetree.cb index 7169932..86c44f7 100644 --- a/src/mainboard/google/volteer/variants/trondo/overridetree.cb +++ b/src/mainboard/google/volteer/variants/trondo/overridetree.cb @@ -35,33 +35,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index f23ef76..eee4a0e 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -151,33 +151,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index e4da0e6..966fb5b 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -198,33 +198,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index d2b1354..19a0027 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -147,33 +147,57 @@ end device ref i2c2 on chip drivers/i2c/sx9310 - register "desc" = ""SAR0 Proximity Sensor"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "hid" = ""STH9310"" + register "desc" = ""SAR Proximity Sensor"" + register "irq_gpio" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" - register "reg_prox_ctrl0" = "0x10" - register "reg_prox_ctrl1" = "0x00" - register "reg_prox_ctrl2" = "0x84" - register "reg_prox_ctrl3" = "0x0e" - register "reg_prox_ctrl4" = "0x07" - register "reg_prox_ctrl5" = "0xc6" - register "reg_prox_ctrl6" = "0x20" - register "reg_prox_ctrl7" = "0x0d" - register "reg_prox_ctrl8" = "0x8d" - register "reg_prox_ctrl9" = "0x43" - register "reg_prox_ctrl10" = "0x1f" - register "reg_prox_ctrl11" = "0x00" - register "reg_prox_ctrl12" = "0x00" - register "reg_prox_ctrl13" = "0x00" - register "reg_prox_ctrl14" = "0x00" - register "reg_prox_ctrl15" = "0x00" - register "reg_prox_ctrl16" = "0x00" - register "reg_prox_ctrl17" = "0x00" - register "reg_prox_ctrl18" = "0x00" - register "reg_prox_ctrl19" = "0x00" - register "reg_sar_ctrl0" = "0x50" - register "reg_sar_ctrl1" = "0x8a" - register "reg_sar_ctrl2" = "0x3c" + register "regs[0].reg_name" = ""reg_prox_ctrl0"" + register "regs[0].value" = "0x10" + register "regs[1].reg_name" = ""reg_prox_ctrl1"" + register "regs[1].value" = "0x00" + register "regs[2].reg_name" = ""reg_prox_ctrl2"" + register "regs[2].value" = "0x84" + register "regs[3].reg_name" = ""reg_prox_ctrl3"" + register "regs[3].value" = "0x0e" + register "regs[4].reg_name" = ""reg_prox_ctrl4"" + register "regs[4].value" = "0x07" + register "regs[5].reg_name" = ""reg_prox_ctrl5"" + register "regs[5].value" = "0xc6" + register "regs[6].reg_name" = ""reg_prox_ctrl6"" + register "regs[6].value" = "0x20" + register "regs[7].reg_name" = ""reg_prox_ctrl7"" + register "regs[7].value" = "0x0d" + register "regs[8].reg_name" = ""reg_prox_ctrl8"" + register "regs[8].value" = "0x8d" + register "regs[9].reg_name" = ""reg_prox_ctrl9"" + register "regs[9].value" = "0x43" + register "regs[10].reg_name" = ""reg_prox_ctrl10"" + register "regs[10].value" = "0x1f" + register "regs[11].reg_name" = ""reg_prox_ctrl11"" + register "regs[11].value" = "0x00" + register "regs[12].reg_name" = ""reg_prox_ctrl12"" + register "regs[12].value" = "0x00" + register "regs[13].reg_name" = ""reg_prox_ctrl13"" + register "regs[13].value" = "0x00" + register "regs[14].reg_name" = ""reg_prox_ctrl14"" + register "regs[14].value" = "0x00" + register "regs[15].reg_name" = ""reg_prox_ctrl15"" + register "regs[15].value" = "0x00" + register "regs[16].reg_name" = ""reg_prox_ctrl16"" + register "regs[16].value" = "0x00" + register "regs[17].reg_name" = ""reg_prox_ctrl17"" + register "regs[17].value" = "0x00" + register "regs[18].reg_name" = ""reg_prox_ctrl18"" + register "regs[18].value" = "0x00" + register "regs[19].reg_name" = ""reg_prox_ctrl19"" + register "regs[19].value" = "0x00" + register "regs[20].reg_name" = ""reg_sar_ctrl0"" + register "regs[20].value" = "0x50" + register "regs[21].reg_name" = ""reg_sar_ctrl1"" + register "regs[21].value" = "0x8a" + register "regs[22].reg_name" = ""reg_sar_ctrl2"" + register "regs[22].value" = "0x3c" device i2c 28 on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/47639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d10f747e617e69a7697882c373ffdea2b43b691 Gerrit-Change-Number: 47639 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: mb/google/dedede: Enable the CSE RW update feature
by V Sowmya (Code Review) 17 Nov '20

17 Nov '20

V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47524 ) Change subject: mb/google/dedede: Enable the CSE RW update feature ...................................................................... mb/google/dedede: Enable the CSE RW update feature This patch enables the CSE RW update feature for dedede baseboard. BUG=b:169077783 TEST= Built for dedede. Verified that CSE RW and metadata files are included in cbfs. Change-Id: I0311c5506e1eb213ace47e6f00cf81352d80abae Signed-off-by: V Sowmya <v.sowmya(a)intel.com> --- M src/mainboard/google/dedede/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/47524/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 6da6505..9d02567 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -26,6 +26,7 @@ select SOC_INTEL_JASPERLAKE select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_CSE_LITE_SKU + select SOC_INTEL_CSE_RW_UPDATE select HAVE_SPD_IN_CBFS if !BOARD_GOOGLE_DEDEDE select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU -- To view, visit https://review.coreboot.org/c/coreboot/+/47524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0311c5506e1eb213ace47e6f00cf81352d80abae Gerrit-Change-Number: 47524 Gerrit-PatchSet: 1 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: mb/google/poppy/v/atlas: Reset bluetooth during boot
by Caveh Jalali (Code Review) 17 Nov '20

17 Nov '20

Hello Shelley Chen, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46620 to look at the new patch set (#4). Change subject: mb/google/poppy/v/atlas: Reset bluetooth during boot ...................................................................... mb/google/poppy/v/atlas: Reset bluetooth during boot Bluetooth is part of the Thunder Peak 2 module. This is a USB device that is not connected to any system level reset signals. Reset is done via a GPIO. When the SoC reboots, we need to reset Bluetooth so the device is in a known good state. BT_DISABLE_L needs to be asserted for a fairly long time - longer than the gap between early GPIO and main GPIO initialization (about 170ms). So, the recently added late GPIO init step is used to provide the necessary delay before taking the BT chip out of reset. BRANCH=atlas BUG=b:168757348 TEST=Verified that we successfully reset the bluetooth chip. The quick way to check if the chip was reset is to look for dmesg entries from btusb_setup_intel_new indicating that firmware was downloaded right after rebooting. Change-Id: I4c489963f7a353e8fc5f55b6cba7aaee0b347a37 Signed-off-by: Caveh Jalali <caveh(a)chromium.org> --- M src/mainboard/google/poppy/variants/atlas/gpio.c 1 file changed, 23 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/46620/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/46620 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c489963f7a353e8fc5f55b6cba7aaee0b347a37 Gerrit-Change-Number: 46620 Gerrit-PatchSet: 4 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/poppy: Add late_gpio support
by Caveh Jalali (Code Review) 17 Nov '20

17 Nov '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46619 ) Change subject: mb/google/poppy: Add late_gpio support ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/46619/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/46619/1//COMMIT_MSG@18 PS1, Line 18: TEST=tested with patch stack to verify that we successfully reset the > I assume you'll want to cherry-pick this into firmware-poppy-10431. […] atlas has its own firmware branch. -- To view, visit https://review.coreboot.org/c/coreboot/+/46619 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I847f90275740ca825e4c93e6b8d5650143228476 Gerrit-Change-Number: 46619 Gerrit-PatchSet: 3 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 17 Nov 2020 02:04:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/poppy: Add late_gpio support
by Caveh Jalali (Code Review) 17 Nov '20

17 Nov '20

Hello Shelley Chen, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46619 to look at the new patch set (#3). Change subject: mb/google/poppy: Add late_gpio support ...................................................................... mb/google/poppy: Add late_gpio support This adds support for configuring GPIOs late in the boot process. When GPIOs are used for reset sequencing, long delays may be necessary. We can achieve these long delays by adding a step to control GPIOs just before we hand off to a payload. On an m3 atlas, this provides about a 320ms delay between the romstage GPIO initialization and the late stage GPIO initialization. For reference, the delay between romstage GPIO initialization and the main GPIO initialization is about 170ms. BRANCH=atlas BUG=b:168757348 TEST=tested with patch stack to verify that we successfully reset the bluetooth chip. Change-Id: I847f90275740ca825e4c93e6b8d5650143228476 Signed-off-by: Caveh Jalali <caveh(a)chromium.org> --- M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h 2 files changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/46619/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/46619 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I847f90275740ca825e4c93e6b8d5650143228476 Gerrit-Change-Number: 46619 Gerrit-PatchSet: 3 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/volteer: Use SoC header for TCSS port control
by Caveh Jalali (Code Review) 17 Nov '20

17 Nov '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47654 ) Change subject: mb/google/volteer: Use SoC header for TCSS port control ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/47654 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded34ad2316764ce42851b3d9b631ed5a30860e Gerrit-Change-Number: 47654 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Nov 2020 02:01:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2020