coreboot-gerrit November 2020

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Change in coreboot[master]: libpayload/usb: Fix printf format string mismatches in debug messages
by Caveh Jalali (Code Review) 16 Nov '20

16 Nov '20

Hello build bot (Jenkins), Patrick Georgi, Tim Wawrzynczak, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45024 to look at the new patch set (#7). Change subject: libpayload/usb: Fix printf format string mismatches in debug messages ...................................................................... libpayload/usb: Fix printf format string mismatches in debug messages This fixes format string mismatch errors in the USB subsystem found by the compiler's format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Signed-off-by: Caveh Jalali <caveh(a)chromium.org> --- M payloads/libpayload/drivers/usb/ehci.c M payloads/libpayload/drivers/usb/ohci.c M payloads/libpayload/drivers/usb/uhci.c M payloads/libpayload/drivers/usb/usb.c M payloads/libpayload/drivers/usb/xhci.c 5 files changed, 33 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/45024/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/45024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Gerrit-Change-Number: 45024 Gerrit-PatchSet: 7 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload/usb: Fix printf format string mismatches in debug messages
by Caveh Jalali (Code Review) 16 Nov '20

16 Nov '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45024 ) Change subject: libpayload/usb: Fix printf format string mismatches in debug messages ...................................................................... Patch Set 6: > Patch Set 6: > > Sorry Caveh, did you want to keep those usb_debug calls on one line? ya, i'd prefer to keep the original formatting in sections where multiple successive lines are present. -- To view, visit https://review.coreboot.org/c/coreboot/+/45024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Gerrit-Change-Number: 45024 Gerrit-PatchSet: 6 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 16 Nov 2020 18:26:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload/usb: Fix printf format string mismatches in debug messages
by Tim Wawrzynczak (Code Review) 16 Nov '20

16 Nov '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45024 ) Change subject: libpayload/usb: Fix printf format string mismatches in debug messages ...................................................................... Patch Set 6: Sorry Caveh, did you want to keep those usb_debug calls on one line? -- To view, visit https://review.coreboot.org/c/coreboot/+/45024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Gerrit-Change-Number: 45024 Gerrit-PatchSet: 6 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 16 Nov 2020 18:07:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: device/pci: Add NULL check for PCI driver's .ops
by Nico Huber (Code Review) 16 Nov '20

16 Nov '20

Hello Felix Singer, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/46297 to review the following change. Change subject: device/pci: Add NULL check for PCI driver's .ops ...................................................................... device/pci: Add NULL check for PCI driver's .ops Add a NULL check and only skip setting the default operations if `.ops` was set by a driver. Change-Id: I5dcc05ebb092fb9c4be929c81ea2b05a10b1311b Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M src/device/pci_device.c 1 file changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/46297/1 diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 80dad7e..62c4535 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -955,13 +955,16 @@ if ((driver->vendor == dev->vendor) && device_id_match(driver, dev->device)) { dev->ops = (struct device_operations *)driver->ops; - printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", - dev_path(dev), driver->vendor, driver->device, - (driver->ops->scan_bus ? "bus " : "")); - return; + break; } } + if (dev->ops) { + printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", dev_path(dev), + driver->vendor, driver->device, (driver->ops->scan_bus ? "bus " : "")); + return; + } + /* If I don't have a specific driver use the default operations. */ switch (dev->hdr_type & 0x7f) { /* Header type */ case PCI_HEADER_TYPE_NORMAL: -- To view, visit https://review.coreboot.org/c/coreboot/+/46297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dcc05ebb092fb9c4be929c81ea2b05a10b1311b Gerrit-Change-Number: 46297 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: device: Enable bus mastering on system-class devices conditionally
by Patrick Georgi (Code Review) 16 Nov '20

16 Nov '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45151 ) Change subject: device: Enable bus mastering on system-class devices conditionally ...................................................................... device: Enable bus mastering on system-class devices conditionally Devices of class type "system" are arbitrary devices and it's not clear which of them need bus mastering. Therefore, enable bus mastering conditionally based on Kconfig option PCI_ALLOW_BUS_MASTER_ANY_DEVICE. Change-Id: Ia04e83606a0a081c0758ec59e52627aa1dbd2622 Signed-off-by: Felix Singer <felix.singer(a)secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45151 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/device/pci_device.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/device/pci_device.c b/src/device/pci_device.c index f4608fc..c3f3564 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1129,7 +1129,8 @@ dev->class = class >> 8; /* Architectural/System devices always need to be bus masters. */ - if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) + if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM && + CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) dev->command |= PCI_COMMAND_MASTER; /* -- To view, visit https://review.coreboot.org/c/coreboot/+/45151 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia04e83606a0a081c0758ec59e52627aa1dbd2622 Gerrit-Change-Number: 45151 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: device: Allow configuring bus mastering for PCI bridges conditionally
by Patrick Georgi (Code Review) 16 Nov '20

16 Nov '20

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45150 ) Change subject: device: Allow configuring bus mastering for PCI bridges conditionally ...................................................................... device: Allow configuring bus mastering for PCI bridges conditionally Change-Id: Ic7cacce28f473dda76ca203016dbb8e00149a990 Signed-off-by: Felix Singer <felix.singer(a)secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45150 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/device/Kconfig M src/device/pci_device.c 2 files changed, 13 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/device/Kconfig b/src/device/Kconfig index 777f3f5..d564f00 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -534,9 +534,20 @@ if PCI_ALLOW_BUS_MASTER +config PCI_SET_BUS_MASTER_PCI_BRIDGES + bool "PCI bridges" + default y + help + Let coreboot configure bus mastering for PCI bridges. Enabling bus + mastering for a PCI bridge also allows it to forward requests from + downstream devices. Currently, payloads ignore this and only enable + bus mastering for the downstream device. Hence, this option is needed + for compatibility until payloads are fixed. + config PCI_ALLOW_BUS_MASTER_ANY_DEVICE bool "Any devices" default y + select PCI_SET_BUS_MASTER_PCI_BRIDGES help Allow coreboot to enable PCI bus mastering for any device. The actual selection of devices depends on the various PCI drivers in coreboot. diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 6075ebe..f4608fc 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -542,7 +542,8 @@ dev->command |= PCI_COMMAND_MEMORY; if (resource->flags & IORESOURCE_IO) dev->command |= PCI_COMMAND_IO; - if (resource->flags & IORESOURCE_PCI_BRIDGE) + if (resource->flags & IORESOURCE_PCI_BRIDGE && + CONFIG(PCI_SET_BUS_MASTER_PCI_BRIDGES)) dev->command |= PCI_COMMAND_MASTER; } -- To view, visit https://review.coreboot.org/c/coreboot/+/45150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7cacce28f473dda76ca203016dbb8e00149a990 Gerrit-Change-Number: 45150 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: lib/gnat/i-c.ads: Add `uintptr_t` type
by Angel Pons (Code Review) 16 Nov '20

16 Nov '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47393 ) Change subject: lib/gnat/i-c.ads: Add `uintptr_t` type ...................................................................... lib/gnat/i-c.ads: Add `uintptr_t` type While Ada makes pointers harder to use, it is still useful to provide a pointer type for use in C interfaces. Change-Id: I3a30ef0147a459ba82c79a1f85a3d3fb97b0f3a1 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/lib/gnat/i-c.ads 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/47393/1 diff --git a/src/lib/gnat/i-c.ads b/src/lib/gnat/i-c.ads index 1403fce..7e90a60 100644 --- a/src/lib/gnat/i-c.ads +++ b/src/lib/gnat/i-c.ads @@ -59,6 +59,9 @@ type size_t is mod 2 ** System.Parameters.ptr_bits; + -- For convenience, also provide an uintptr_t type + type uintptr_t is mod 2 ** System.Parameters.ptr_bits; + ---------------------------- -- Characters and Strings -- ---------------------------- -- To view, visit https://review.coreboot.org/c/coreboot/+/47393 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a30ef0147a459ba82c79a1f85a3d3fb97b0f3a1 Gerrit-Change-Number: 47393 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Makefile.inc: Move adding SeaBIOS cbfs config files
by Arthur Heymans (Code Review) 16 Nov '20

16 Nov '20

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46415 ) Change subject: Makefile.inc: Move adding SeaBIOS cbfs config files ...................................................................... Makefile.inc: Move adding SeaBIOS cbfs config files Using the INTERMEDIATE target this can be done in the proper dir. Change-Id: Ie105231655ef4b49234f0944f638545fe79f07cb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M payloads/external/Makefile.inc 2 files changed, 25 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/46415/1 diff --git a/Makefile.inc b/Makefile.inc index 882673b..21c77f5 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1116,22 +1116,6 @@ # file (filled with \377 = 0xff) and copy the CBFS image over it. dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' > $@.tmp dd if=$(obj)/coreboot.pre of=$@.tmp bs=8192 conv=notrunc 2> /dev/null -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) -ifneq ($(CONFIG_UPDATE_IMAGE),y) - @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" - $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup -endif -endif -endif -ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y) - @printf " SeaBIOS Add sercon-port file\n" - $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port -endif -ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y) - @printf " SeaBIOS Thread optionroms\n" - $(CBFSTOOL) $@.tmp add-int -i 2 -n etc/threads -endif ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index da199e4..6208578 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -106,6 +106,31 @@ bootorder-type := raw endif +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) +ifneq ($(CONFIG_UPDATE_IMAGE),y) +INTERMEDIATE+=seabios_ps2_timeout +seabios_ps2_timeout: $(obj)/coreboot.pre $(CBFSTOOL) + @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" + $(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup +endif +endif +endif + +ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y) +INTERMEDIATE+=seabios_sercon +seabios_sercon: $(obj)/coreboot.pre $(CBFSTOOL) + @printf " SeaBIOS Add sercon-port file\n" +# $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port +endif + +ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y) +INTERMEDIATE+=seabios_thread_optionroms +seabios_thread_optionroms: $(obj)/coreboot.pre $(CBFSTOOL) + @printf " SeaBIOS Thread optionroms\n" + $(CBFSTOOL) $@.tmp add-int -i 2 -n etc/threads +endif + # Depthcharge payloads/external/depthcharge/depthcharge/build/depthcharge.elf depthcharge: $(DOTCONFIG) $(CBFSTOOL) -- To view, visit https://review.coreboot.org/c/coreboot/+/46415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie105231655ef4b49234f0944f638545fe79f07cb Gerrit-Change-Number: 46415 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/drivers/intel: Correct Kconfig option in Makefile
by Martin Roth (Code Review) 16 Nov '20

16 Nov '20

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47368 ) Change subject: src/drivers/intel: Correct Kconfig option in Makefile ...................................................................... src/drivers/intel: Correct Kconfig option in Makefile This Kconfig option was just added incorrectly, so would never add the verstage.c file. Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: I4c39dca9d429ed786ea42c0d421d6ee815e8c419 --- M src/drivers/intel/fsp1_1/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/47368/1 diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index 86d1f2f7..5fc100a 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -4,7 +4,7 @@ verstage-y += car.c verstage-y += fsp_util.c -verstage-$(CONFIG_SEPARATE_VERSTAGE) += verstage.c +verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S bootblock-y += fsp_util.c -- To view, visit https://review.coreboot.org/c/coreboot/+/47368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c39dca9d429ed786ea42c0d421d6ee815e8c419 Gerrit-Change-Number: 47368 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/i2c/tpm: Remove ifdef of non-existant Kconfig option
by Martin Roth (Code Review) 16 Nov '20

16 Nov '20

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47367 ) Change subject: drivers/i2c/tpm: Remove ifdef of non-existant Kconfig option ...................................................................... drivers/i2c/tpm: Remove ifdef of non-existant Kconfig option The CONFIG_TPM_I2C_BURST_LIMITATION was never added, so this has never been turned on. The Kconfig linter generates three warnings about this block: Warning: Unknown config option CONFIG_TPM_I2C_BURST_LIMITATION Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: I53fa8f5b4eac6a1e7efec23f70395058bad26299 --- M src/drivers/i2c/tpm/tpm.c 1 file changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/47367/1 diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index 4ff3705..4321757 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -424,11 +424,6 @@ if (burstcnt > (len-1-count)) burstcnt = len-1-count; -#ifdef CONFIG_TPM_I2C_BURST_LIMITATION - if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) - burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; -#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */ - if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), burstcnt) == 0) count += burstcnt; -- To view, visit https://review.coreboot.org/c/coreboot/+/47367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53fa8f5b4eac6a1e7efec23f70395058bad26299 Gerrit-Change-Number: 47367 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2020