Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48003 )
Change subject: soc/intel/skl: correct OC pin skip value for disabled usb ports
......................................................................
Patch Set 2: Code-Review+2
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48003 )
Change subject: soc/intel/skl: correct OC pin skip value for disabled usb ports
......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48003/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/48003/1//COMMIT_MSG@10
PS1, Line 10: a
> nit: an
Done
https://review.coreboot.org/c/coreboot/+/48003/1//COMMIT_MSG@12
PS1, Line 12: macro
> nit: actually, it's an enum
Done
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48003
to look at the new patch set (#2).
Change subject: soc/intel/skl: correct OC pin skip value for disabled usb ports
......................................................................
soc/intel/skl: correct OC pin skip value for disabled usb ports
Commit 056d552 introduced a bug where 0xFF gets set as OC pin value to
supposedly skip programming an OC pin for a disabled USB port. While the
value is correct for the other platforms, Skylake uses 0x08 for this
purpose. Correct this by using the enum value OC_SKIP (0x08) instead.
Change-Id: I41a8df3dce3712b4ab27c4e6e10160b2207406d1
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/skylake/chip.c
1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/48003/2
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47892 )
Change subject: mb/system76/oryp5: Add System76 Oryx Pro 5
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47892/3/src/mainboard/system76/ory…
File src/mainboard/system76/oryp5/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/47892/3/src/mainboard/system76/ory…
PS3, Line 87: subsystemid 0x1558 0x95e6 inherit
> FSP might be writing the subsystem ID, and the registers are write-once.
Please check if it's correct in static.c in build/mainboard/..
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47993 )
Change subject: drivers/intel/fsp2_0: introduce possibility of using a full FD binary
......................................................................
Patch Set 6: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/47993/4/src/drivers/intel/fsp2_0/K…
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/47993/4/src/drivers/intel/fsp2_0/K…
PS4, Line 60: !FSP_USE_REPO
> Only the string changed, that means, FSP_FD_PATH gets hidden in menuconfig, when FSP_USE_REPO is sel […]
Makes sense.
https://review.coreboot.org/c/coreboot/+/47993/4/src/drivers/intel/fsp2_0/K…
PS4, Line 88: Use a combined FSP FD file instead of individual, split binaries.
> Not completely correct. FSP_FULL_FD is a boolean. The file then needs to be set in FSP_FD_PATH. […]
Ack
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48003 )
Change subject: soc/intel/skl: correct OC pin skip value for disabled usb ports
......................................................................
Patch Set 1: Code-Review+2
Looks good after addressing Felix's comments.
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Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47900 )
Change subject: mb/google/dedede: Create galtic variant
......................................................................
Patch Set 2: Code-Review+2
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Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47900 )
Change subject: mb/google/dedede: Create galtic variant
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Patch Set 2: -Code-Review
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Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47900 )
Change subject: mb/google/dedede: Create galtic variant
......................................................................
Patch Set 2:
I can't merge this CL until the builder runs and marks it as verified.
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