coreboot-gerrit October 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: src/soc/intel/common/block: add Kconfig for PM Timer emulation support
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46017 ) Change subject: src/soc/intel/common/block: add Kconfig for PM Timer emulation support ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/46017/6/src/soc/intel/common/block… File src/soc/intel/common/block/cpu/Kconfig: https://review.coreboot.org/c/coreboot/+/46017/6/src/soc/intel/common/block… PS6, Line 106: ucode > Spell out microcode? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/46017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ded79221a01655f298ff92b8bd2afabd1d2a3ff Gerrit-Change-Number: 46017 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:51:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: src/soc/intel/common/block: add Kconfig for PM Timer emulation support
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Hello build bot (Jenkins), Nico Huber, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46017 to look at the new patch set (#7). Change subject: src/soc/intel/common/block: add Kconfig for PM Timer emulation support ...................................................................... src/soc/intel/common/block: add Kconfig for PM Timer emulation support Add a Kconfig for SoCs to indicate PM ACPI timer emulation support. This Kconfig gets used in the follow-up changes. Change-Id: I6ded79221a01655f298ff92b8bd2afabd1d2a3ff Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig 7 files changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/46017/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/46017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ded79221a01655f298ff92b8bd2afabd1d2a3ff Gerrit-Change-Number: 46017 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/*: drop useless XTAL shutdown qualification code
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Hello build bot (Jenkins), Nico Huber, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46016 to look at the new patch set (#5). Change subject: soc/intel/*: drop useless XTAL shutdown qualification code ...................................................................... soc/intel/*: drop useless XTAL shutdown qualification code The XTAL shutdown (dis)qualification bit already unconditionally gets set to 1 by FSP for these platforms, making this code redundant. Change-Id: I7fa4afb0de2af1814e5b91c152d82d7ead310338 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/alderlake/finalize.c M src/soc/intel/cannonlake/finalize.c M src/soc/intel/common/block/include/intelblocks/pmclib.h M src/soc/intel/common/block/pmc/pmclib.c M src/soc/intel/elkhartlake/finalize.c M src/soc/intel/icelake/finalize.c M src/soc/intel/jasperlake/finalize.c M src/soc/intel/skylake/finalize.c M src/soc/intel/tigerlake/finalize.c 9 files changed, 5 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/46016/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/46016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fa4afb0de2af1814e5b91c152d82d7ead310338 Gerrit-Change-Number: 46016 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/*: conversion from constant to Kconfig for XTAL frequency
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46018 ) Change subject: soc/intel/*: conversion from constant to Kconfig for XTAL frequency ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/46018/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/46018/8//COMMIT_MSG@7 PS8, Line 7: soc/intel/*: conversion from constant to Kconfig for XTAL frequency > Please add a verb (in imperative mood) to make it a statement: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/46018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1382dd274eeb9cb748f94c34f5d9a83880624c18 Gerrit-Change-Number: 46018 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:50:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl}: PM ACPI timer state from Kconfig
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45957 ) Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,ehl}: PM ACPI timer state from Kconfig ...................................................................... Patch Set 21: (2 comments) https://review.coreboot.org/c/coreboot/+/45957/21//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/45957/21//COMMIT_MSG@9 PS21, Line 9: devicetree > Kconfig? Ack https://review.coreboot.org/c/coreboot/+/45957/21/src/soc/intel/elkhartlake… File src/soc/intel/elkhartlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/45957/21/src/soc/intel/elkhartlake… PS21, Line 64: /* PM ACPI timer */ > I’d remove the redundent comment, or add a reference to the requirement (datasheet, spec). hmm, isn't "Override/Fill FSP Silicon Param for mainboard" for `mainboard_silicon_init_params` redundant, too? -- To view, visit https://review.coreboot.org/c/coreboot/+/45957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf1eee9297034b29b7250f6c752e6f7f52b4b908 Gerrit-Change-Number: 45957 Gerrit-PatchSet: 21 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:46:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/*: conversion from constant to Kconfig for XTAL frequency
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46018 ) Change subject: soc/intel/*: conversion from constant to Kconfig for XTAL frequency ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/46018/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/46018/8//COMMIT_MSG@9 PS8, Line 9: This converts the constant for the XTAL frequency to a Kconfig option. > The value depends on the soc. No device should override this and thus, it's not a devicetree option. Oh btw. this was done first to make the buildbot pass for socs without that value defined. By moving the emulation code to it's own compilation unit, this is not required anymore. However, it feels right to do so. I'd be ok with dropping that change, though, if all agree. -- To view, visit https://review.coreboot.org/c/coreboot/+/46018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1382dd274eeb9cb748f94c34f5d9a83880624c18 Gerrit-Change-Number: 46018 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:42:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17
by Johnny Lin (Code Review) 06 Oct '20

06 Oct '20

Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45798 ) Change subject: soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17 ...................................................................... Patch Set 11: (1 comment) https://review.coreboot.org/c/coreboot/+/45798/10/src/soc/intel/xeon_sp/cpx… File src/soc/intel/xeon_sp/cpx/include/soc/ddr.h: https://review.coreboot.org/c/coreboot/+/45798/10/src/soc/intel/xeon_sp/cpx… PS10, Line 7: > Please add a comment stating that these numbers are in picoseconds Done -- To view, visit https://review.coreboot.org/c/coreboot/+/45798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb72d18027d972140828970206834ff55b72022 Gerrit-Change-Number: 45798 Gerrit-PatchSet: 11 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: John Looney <john.looney(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:37:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17
by Johnny Lin (Code Review) 06 Oct '20

06 Oct '20

Hello build bot (Jenkins), Marc Jones, Patrick Georgi, Martin Roth, John Looney, Patrick Rudolph, Jonathan Zhang, Jingle Hsu, Angel Pons, Morgan Jang, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45798 to look at the new patch set (#11). Change subject: soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17 ...................................................................... soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17 For now only implement for one socket and some of the fields are hard-coded for DDR4 including memory device type, data width and ECC support. Change-Id: I3cb72d18027d972140828970206834ff55b72022 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/soc/intel/xeon_sp/cpx/Makefile.inc A src/soc/intel/xeon_sp/cpx/ddr.c A src/soc/intel/xeon_sp/cpx/include/soc/ddr.h M src/soc/intel/xeon_sp/cpx/romstage.c M src/soc/intel/xeon_sp/include/soc/romstage.h M src/soc/intel/xeon_sp/romstage.c 6 files changed, 229 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/45798/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/45798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb72d18027d972140828970206834ff55b72022 Gerrit-Change-Number: 45798 Gerrit-PatchSet: 11 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: John Looney <john.looney(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: add Kconfig to enable/disable the ACPI PM timer
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45952 ) Change subject: soc/intel/common: add Kconfig to enable/disable the ACPI PM timer ...................................................................... Patch Set 17: (2 comments) https://review.coreboot.org/c/coreboot/+/45952/17/src/soc/intel/common/bloc… File src/soc/intel/common/block/pmc/Kconfig: https://review.coreboot.org/c/coreboot/+/45952/17/src/soc/intel/common/bloc… PS17, Line 45: is required for ACPI > It sounds like, if you disable the timer, then ACPI stop working? Well, I'd suggest reading the whole paragraph in context? ;) "[...] Disabling it enables the ACPI timer emulation in microcode." https://review.coreboot.org/c/coreboot/+/45952/17/src/soc/intel/common/bloc… PS17, Line 45: TCO > It’d be great, if you spelt it out once. what for? this is not even done for block/smbus/Kconfig or block/smm/Kconfig -- To view, visit https://review.coreboot.org/c/coreboot/+/45952 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f607f277eb14f84a7370ffb25a13226e7ccc917 Gerrit-Change-Number: 45952 Gerrit-PatchSet: 17 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:33:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{skl,cnl,icl,tgl,jsl,ehl}: deduplicate ACPI timer emulation
by Michael Niewöhner (Code Review) 06 Oct '20

06 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45951 ) Change subject: soc/intel/{skl,cnl,icl,tgl,jsl,ehl}: deduplicate ACPI timer emulation ...................................................................... Patch Set 15: (1 comment) https://review.coreboot.org/c/coreboot/+/45951/15//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/45951/15//COMMIT_MSG@9 PS15, Line 9: socs : above > > … socs since Skylake? […] Well, I wanted to be very specific here, because it may differ for some others (I have not checked xeon_sp for example, since it's not used at all there, currently) -- To view, visit https://review.coreboot.org/c/coreboot/+/45951 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied4b312b6d53e80e71c55f4d1ca78a8cb2799793 Gerrit-Change-Number: 45951 Gerrit-PatchSet: 15 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 06 Oct 2020 09:30:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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coreboot-gerrit October 2020