Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45826 )
Change subject: soc/intel/icl: enable common CPU code
......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45826/2/src/soc/intel/icelake/roms…
File src/soc/intel/icelake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/45826/2/src/soc/intel/icelake/roms…
PS2, Line 59: m_cfg->VmxEnable = CONFIG(ENABLE_VMX);
> That's a bit annoying. I would prefer to mimic that in Kconfig then, i.e. […]
always call the lock when fsp already locks it? I don't think we want this duplication
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46273 )
Change subject: soc/intel/cnl: lock AES-NI feature if selected
......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46273/6/src/soc/intel/cannonlake/K…
File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/46273/6/src/soc/intel/cannonlake/K…
PS6, Line 81: select CPU_INTEL_COMMON_HYPERTHREADING
> Wondering why we have that, i.e. […]
Not sure what you mean with "assume it's `y`"
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45318 )
Change subject: soc/intel/cnl: Add ACPI support for PMC core OS driver
......................................................................
Patch Set 4:
Thanks, I'm actively working on a fix for this :-)
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Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Maulik V Vaghela, Angel Pons, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45901
to look at the new patch set (#9).
Change subject: soc/intel/jasperlake: Set the GpioOverride configuration
......................................................................
soc/intel/jasperlake: Set the GpioOverride configuration
Set "GpioOverride" config to override FSP gpio
configuration. FSP will not configure any GPIOs
and rely on GPIO setings before moved to FSP.
BUG=b:150666058
TEST=Build and boot JSLRVP
Cq-Depend: TBD
Change-Id: Ia4036cf0be3a6036d70920743958dc327a652077
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/soc/intel/jasperlake/romstage/fsp_params.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/45901/9
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43655 )
Change subject: MAINTAINERS: add Michael Niewöhner to mb/clevo
......................................................................
Patch Set 35: Code-Review+2
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Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46375 )
Change subject: drivers/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE
......................................................................
drivers/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE
This needs to be saved and restored, otherwise the BSP might have an
inconsistent MTRR setup with regards to the AP's which results in
weird errors and slowdowns in the operating system.
TESTED: Fixes booting OCP/Deltalake with Linux 5.8.
Change-Id: Iace636ec6fca3b4d7b2856f0f054947c5b3bc8de
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/security/intel/txt/getsec_enteraccs.S
1 file changed, 2 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/46375/1
diff --git a/src/security/intel/txt/getsec_enteraccs.S b/src/security/intel/txt/getsec_enteraccs.S
index 3135de7..563dc08 100644
--- a/src/security/intel/txt/getsec_enteraccs.S
+++ b/src/security/intel/txt/getsec_enteraccs.S
@@ -58,6 +58,7 @@
/* Reserve space on stack for GDT */
subl $8, %esp
+ PUSH_MSR MTRR_DEF_TYPE_MSR
PUSH_MSR IA32_MISC_ENABLE
PUSH_MSR MTRR_FIX_64K_00000
PUSH_MSR MTRR_FIX_16K_80000
@@ -290,12 +291,7 @@
POP_MSR MTRR_FIX_16K_80000
POP_MSR MTRR_FIX_64K_00000
POP_MSR IA32_MISC_ENABLE
-
- /* Enable fixed MTRRs */
- movl $(MTRR_DEF_TYPE_MSR), %ecx
- rdmsr
- orl $(MTRR_DEF_TYPE_FIX_EN), %eax
- wrmsr
+ POP_MSR MTRR_DEF_TYPE_MSR
/* Enable cache */
movl %cr0, %eax
--
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