coreboot-gerrit October 2020

coreboot-gerrit@coreboot.org

1 participants
3474 discussions

Change in coreboot[master]: cpu/intel/common: rework AES-NI locking
by Nico Huber (Code Review) 19 Oct '20

19 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46275 ) Change subject: cpu/intel/common: rework AES-NI locking ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/46275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb Gerrit-Change-Number: 46275 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 19 Oct 2020 20:54:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
by Nico Huber (Code Review) 19 Oct '20

19 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46272 ) Change subject: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e Gerrit-Change-Number: 46272 Gerrit-PatchSet: 10 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 20:53:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.h
by Jason Glenesk (Code Review) 19 Oct '20

19 Oct '20

Hello Justin Frodsham, build bot (Jenkins), Martin Roth, Jason Glenesk, Matt Papageorge, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/46334 to look at the new patch set (#3). Change subject: vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.h ...................................................................... vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.h Remove all typedefs and cleanup references to all structs and enums. BUG=b:159061802 TEST=Boot morphius to shell. Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Change-Id: I403075e18886b566f576d9ca0d198c2f5e9c3d96 --- M src/soc/amd/picasso/psp_verstage/fch.c M src/soc/amd/picasso/psp_verstage/svc.c M src/soc/amd/picasso/psp_verstage/vboot_crypto.c M src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h 4 files changed, 57 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/46334/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/46334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I403075e18886b566f576d9ca0d198c2f5e9c3d96 Gerrit-Change-Number: 46334 Gerrit-PatchSet: 3 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Justin Frodsham <justin.frodsham(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/block/acpi: add code for CPPC entries generation
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Hello Elyes HAOUAS, build bot (Jenkins), Matt Delco, Nico Huber, Matt DeVillier, Paul Menzel, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45535 to look at the new patch set (#17). Change subject: soc/intel/block/acpi: add code for CPPC entries generation ...................................................................... soc/intel/block/acpi: add code for CPPC entries generation Copy the code for CPPC entries generation, needed for Intel SpeedShift, from SKL to common ACPI code. This way all SoCs using the common code get the CPPC entries added. SKL is going to use common ACPI code, too, in the future, so this code duplication will vanish soon. Test: dumped SSDT from Clevo L140CU and checked decompiled version Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/block/acpi/acpi.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/45535/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/45535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47 Gerrit-Change-Number: 45535 Gerrit-PatchSet: 17 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel,mb/*: get rid of legacy pad macros
by build bot (Jenkins) (Code Review) 19 Oct '20

19 Oct '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46567 ) Change subject: soc/intel,mb/*: get rid of legacy pad macros ...................................................................... Patch Set 1: (34 comments) https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/asuka/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 79: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TOUCHPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/caroline/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 88: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TOUCHPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 99: /* GSPI0_CLK */ PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT), /* WLAN WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 170: /* DDPD_HPD2 */ PAD_CFG_GPI_SMI(GPP_E15, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SMI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 171: /* DDPE_HPD3 */ PAD_CFG_GPI_SCI(GPP_E16, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SCI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/cave/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 84: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TRACKPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 95: /* GSPI0_CLK */ PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT), /* WLAN WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 166: /* DDPD_HPD2 */ PAD_CFG_GPI_SMI(GPP_E15, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SMI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 167: /* DDPE_HPD3 */ PAD_CFG_GPI_SCI(GPP_E16, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SCI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/chell/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 78: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TRACKPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 89: /* GSPI0_CLK */ PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT), /* WLAN WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 160: /* DDPD_HPD2 */ PAD_CFG_GPI_SMI(GPP_E15, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SMI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 161: /* DDPE_HPD3 */ PAD_CFG_GPI_SCI(GPP_E16, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SCI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/glados/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 86: /* GSPI0_CLK */ PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT), /* WLAN WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 163: /* DDPD_HPD2 */ PAD_CFG_GPI_SMI(GPP_E15, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SMI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 164: /* DDPE_HPD3 */ PAD_CFG_GPI_SCI(GPP_E16, NONE, DEEP, EDGE_SINGLE, INVERT), /* EC_SCI_L */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… File src/mainboard/google/glados/variants/lars/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/google/glado… PS1, Line 74: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TOUCHPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/intel/kblrvp… File src/mainboard/intel/kblrvp/variants/rvp8/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/intel/kblrvp… PS1, Line 97: /* SATAXPCIE_4 */ PAD_CFG_NF(GPP_F1, UP_20K, DEEP,NF1), space required after that ',' (ctx:VxV) https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/intel/kunimi… File src/mainboard/intel/kunimitsu/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/intel/kunimi… PS1, Line 82: /* SRCCLKREQ0# */ PAD_CFG_GPI_SCI(GPP_B5, NONE, DEEP, EDGE_SINGLE, INVERT), /* TOUCHPAD WAKE */ line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… File src/mainboard/razer/blade_stealth_kbl/gpio.h: https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 22: /* CLKOUT_LPC0 */ _PAD_CFG_STRUCT(GPP_A9, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 23: /* CLKOUT_LPC1 */ _PAD_CFG_STRUCT(GPP_A10, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 51: /* GPIO */ _PAD_CFG_STRUCT(GPP_B14, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 54: /* GPIO */ _PAD_CFG_STRUCT(GPP_B17, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 55: /* GPIO */ _PAD_CFG_STRUCT(GPP_B18, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 58: /* GSPI1_MISO */ _PAD_CFG_STRUCT(GPP_B21, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 59: /* GSPI1_MOSI */ _PAD_CFG_STRUCT(GPP_B22, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 60: /* GPIO */ _PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 63: /* GPIO */ _PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 66: /* GPIO */ _PAD_CFG_STRUCT(GPP_C5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 119: /* GPIO */ _PAD_CFG_STRUCT(GPP_E10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 120: /* GPIO */ _PAD_CFG_STRUCT(GPP_E11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 128: /* DDPB_CTRLDATA */ _PAD_CFG_STRUCT(GPP_E19, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 130: /* DDPC_CTRLDATA */ _PAD_CFG_STRUCT(GPP_E21, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(DN_20K)), line over 96 characters https://review.coreboot.org/c/coreboot/+/46567/1/src/mainboard/razer/blade_… PS1, Line 132: /* GPIO */ _PAD_CFG_STRUCT(GPP_E23, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/46567 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2 Gerrit-Change-Number: 46567 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matthew Garrett <mjg59(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wim Vervoorn (private) <wim(a)vervoorn.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 19:27:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel,mb/*: get rid of legacy pad macros
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46567 ) Change subject: soc/intel,mb/*: get rid of legacy pad macros ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/46567 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2 Gerrit-Change-Number: 46567 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 19 Oct 2020 19:10:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/block/acpi: add code for CPPC entries generation
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45535 ) Change subject: soc/intel/block/acpi: add code for CPPC entries generation ...................................................................... Patch Set 16: (1 comment) https://review.coreboot.org/c/coreboot/+/45535/13/src/soc/intel/common/bloc… File src/soc/intel/common/block/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/45535/13/src/soc/intel/common/bloc… PS13, Line 439: (1 << 7) > replace by CPUID_ISST Done -- To view, visit https://review.coreboot.org/c/coreboot/+/45535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47 Gerrit-Change-Number: 45535 Gerrit-PatchSet: 16 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Mon, 19 Oct 2020 19:07:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46462 ) Change subject: mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/46462/4/src/mainboard/facebook/mon… File src/mainboard/facebook/monolith/devicetree.cb: https://review.coreboot.org/c/coreboot/+/46462/4/src/mainboard/facebook/mon… PS4, Line 32: > Same here remove 'empty' line Done -- To view, visit https://review.coreboot.org/c/coreboot/+/46462 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ac3b8efe37aedd442962234478fcdce675bf105 Gerrit-Change-Number: 46462 Gerrit-PatchSet: 6 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 19:07:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: cpu/intel/common: implement the two missing CPPC v2 autonomous registers
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46463 ) Change subject: cpu/intel/common: implement the two missing CPPC v2 autonomous registers ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/46463/6//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/46463/6//COMMIT_MSG@14 PS6, Line 14: Test: > Did you test this? Linux doesn't use it, yet, thus I just checked, that the entries are correct in a dumped SSDT -- To view, visit https://review.coreboot.org/c/coreboot/+/46463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e2f4e4ae6a0fdb57204538bd62ead97cb540e91 Gerrit-Change-Number: 46463 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 19:06:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/block/acpi: add code for CPPC entries generation
by Michael Niewöhner (Code Review) 19 Oct '20

19 Oct '20

Hello Elyes HAOUAS, build bot (Jenkins), Matt Delco, Nico Huber, Matt DeVillier, Paul Menzel, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45535 to look at the new patch set (#16). Change subject: soc/intel/block/acpi: add code for CPPC entries generation ...................................................................... soc/intel/block/acpi: add code for CPPC entries generation Copy the code for CPPC entries generation, needed for Intel SpeedShift, from SKL to common ACPI code. This way all SoCs using the common code get the CPPC entries added. SKL is going to use common ACPI code, too, in the future, so this code duplication will vanish soon. Test: dumped SSDT from Clevo L140CU and checked decompiled version Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/block/acpi/acpi.c 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/45535/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/45535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47 Gerrit-Change-Number: 45535 Gerrit-PatchSet: 16 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Elyes HAOUAS Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit October 2020