coreboot-gerrit October 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: util/sconfig: allow to override chip-wrapped devices
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46531 ) Change subject: util/sconfig: allow to override chip-wrapped devices ...................................................................... Patch Set 7: I'm not sure if we actually want to allow changing the chip. Alternatively, we could error out and fix the drivers. Some- thing like CB:41745 might help. -- To view, visit https://review.coreboot.org/c/coreboot/+/46531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6364b3a6e1804a23503f42c66c5001e42f911270 Gerrit-Change-Number: 46531 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 21:07:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cnl: lock AES-NI feature if selected
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46273 ) Change subject: soc/intel/cnl: lock AES-NI feature if selected ...................................................................... soc/intel/cnl: lock AES-NI feature if selected Lock AES-NI (MSR_FEATURE_CONFIG) to prevent unintended changes of AES-NI enablement as precaution, as suggested in Intel document 325384-070US. Locking is enabled by default (as already done in SKL and Arrandale) and may be disabled by the newly introduced Kconfig in the parent change. Tested by checking the MSR. Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46273 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/intel/cannonlake/cpu.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 3d97c56..ddedb3f 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -199,6 +199,8 @@ /* Configure Intel Speed Shift */ configure_isst(); + set_aesni_lock(); + /* Enable ACPI Timer Emulation via MSR 0x121 */ enable_pm_timer_emulation(); -- To view, visit https://review.coreboot.org/c/coreboot/+/46273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d Gerrit-Change-Number: 46273 Gerrit-PatchSet: 12 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/common: add a Kconfig to control AES-NI locking
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46277 ) Change subject: cpu/intel/common: add a Kconfig to control AES-NI locking ...................................................................... cpu/intel/common: add a Kconfig to control AES-NI locking Add a Kconfig to be able to disable locking of AES-NI for e.g debugging, testing, ... Change-Id: I4eaf8d7d187188ee6e78741b1ceb837c40c2c402 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46277 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/cpu/intel/common/Kconfig M src/cpu/intel/common/common_init.c 2 files changed, 11 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig index 064e67b..01f2721 100644 --- a/src/cpu/intel/common/Kconfig +++ b/src/cpu/intel/common/Kconfig @@ -19,6 +19,14 @@ However, leaving the lock bit unset will break Windows' detection of VMX support and built-in virtualization features like Hyper-V. +config SET_MSR_AESNI_LOCK_BIT + bool "Lock the AES-NI enablement state" + default y + help + This config sets the AES-NI lock bit, if available, to prevent any + further change of AES-NI enablement. This may be disabled for e.g. + testing or debugging. + config CPU_INTEL_COMMON_TIMEBASE bool diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index fc5360d..4568014 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -270,6 +270,9 @@ { msr_t msr; + if (!CONFIG(SET_MSR_AESNI_LOCK_BIT)) + return; + if (cpu_get_feature_flags_ecx() & CPUID_AES) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/46277 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4eaf8d7d187188ee6e78741b1ceb837c40c2c402 Gerrit-Change-Number: 46277 Gerrit-PatchSet: 9 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/common: only lock AES-NI when supported
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46276 ) Change subject: cpu/intel/common: only lock AES-NI when supported ...................................................................... cpu/intel/common: only lock AES-NI when supported Add a check to only lock AES-NI when AES is supported. Change-Id: Ia7ffd5393a3e972f461ff7991b9c5bd363712361 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46276 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/cpu/intel/common/common_init.c 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index f189c59..fc5360d 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -270,6 +270,9 @@ { msr_t msr; + if (cpu_get_feature_flags_ecx() & CPUID_AES) + return; + /* Only run once per core as specified in the MSR datasheet */ if (intel_ht_sibling()) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/46276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7ffd5393a3e972f461ff7991b9c5bd363712361 Gerrit-Change-Number: 46276 Gerrit-PatchSet: 9 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/common: rework AES-NI locking
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46275 ) Change subject: cpu/intel/common: rework AES-NI locking ...................................................................... cpu/intel/common: rework AES-NI locking Simplify the AES-NI code by using msr_set and correct the comment. Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46275 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/cpu/intel/common/common.h M src/cpu/intel/common/common_init.c M src/include/cpu/intel/msr.h 3 files changed, 7 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h index aaeca1d..57a51e5 100644 --- a/src/cpu/intel/common/common.h +++ b/src/cpu/intel/common/common.h @@ -28,8 +28,8 @@ bool intel_ht_sibling(void); /* - * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling - * as suggested in Intel document 325384-070US. + * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended changes + * to the enablement state as suggested in Intel document 325384-070US. */ void set_aesni_lock(void); diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index e532c97..f189c59 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -266,10 +266,6 @@ } } -/* - * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling - * as suggested in Intel document 325384-070US. - */ void set_aesni_lock(void) { msr_t msr; @@ -279,8 +275,8 @@ return; msr = rdmsr(MSR_FEATURE_CONFIG); - if ((msr.lo & 1) == 0) { - msr.lo |= 1; - wrmsr(MSR_FEATURE_CONFIG, msr); - } + if (msr.lo & AESNI_LOCK) + return; + + msr_set(MSR_FEATURE_CONFIG, AESNI_LOCK); } diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h index 73dd320..0d11b5e 100644 --- a/src/include/cpu/intel/msr.h +++ b/src/include/cpu/intel/msr.h @@ -6,6 +6,6 @@ */ #define MSR_FEATURE_CONFIG 0x13c -#define AESNI_LOCK_BIT 0 +#define AESNI_LOCK (1 << 0) #endif /* CPU_INTEL_MSR_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2cda433bbec0192277839c02a1862b8f41340cb Gerrit-Change-Number: 46275 Gerrit-PatchSet: 9 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46272 ) Change subject: soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code ...................................................................... soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code Copy the AES-NI locking function to common cpu code to be able to reuse it. This change only copies the code and adds the MSR header file. Any further rework and later deduplication on the platforms code is done in the follow-up changes. Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46272 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/cpu/intel/common/common.h M src/cpu/intel/common/common_init.c A src/include/cpu/intel/msr.h 3 files changed, 37 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h index df14668..aaeca1d 100644 --- a/src/cpu/intel/common/common.h +++ b/src/cpu/intel/common/common.h @@ -27,4 +27,10 @@ */ bool intel_ht_sibling(void); +/* + * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling + * as suggested in Intel document 325384-070US. + */ +void set_aesni_lock(void); + #endif diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index 3e5b578..e532c97 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -3,6 +3,7 @@ #include <acpi/acpigen.h> #include <arch/cpu.h> #include <console/console.h> +#include <cpu/intel/msr.h> #include <cpu/x86/msr.h> #include "common.h" @@ -264,3 +265,22 @@ config->regs[CPPC_AUTO_SELECT] = msr; } } + +/* + * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling + * as suggested in Intel document 325384-070US. + */ +void set_aesni_lock(void) +{ + msr_t msr; + + /* Only run once per core as specified in the MSR datasheet */ + if (intel_ht_sibling()) + return; + + msr = rdmsr(MSR_FEATURE_CONFIG); + if ((msr.lo & 1) == 0) { + msr.lo |= 1; + wrmsr(MSR_FEATURE_CONFIG, msr); + } +} diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h new file mode 100644 index 0000000..73dd320 --- /dev/null +++ b/src/include/cpu/intel/msr.h @@ -0,0 +1,11 @@ +#ifndef CPU_INTEL_MSR_H +#define CPU_INTEL_MSR_H + +/* + * Common MSRs for Intel CPUs + */ + +#define MSR_FEATURE_CONFIG 0x13c +#define AESNI_LOCK_BIT 0 + +#endif /* CPU_INTEL_MSR_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/46272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e Gerrit-Change-Number: 46272 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: cpu/intel/model_{2065x,206ax}: fix AES-NI locking
by Nico Huber (Code Review) 20 Oct '20

20 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46535 ) Change subject: cpu/intel/model_{2065x,206ax}: fix AES-NI locking ...................................................................... Patch Set 1: Tested? Doesn't this make HT threads race? and potentially crash due to an exception? It's probably easier to use the new common function from the start. -- To view, visit https://review.coreboot.org/c/coreboot/+/46535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a6f7fc95ce226ce4246b65070726087eb9d689c Gerrit-Change-Number: 46535 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 21:00:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cnl: lock AES-NI feature if selected
by Nico Huber (Code Review) 19 Oct '20

19 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46273 ) Change subject: soc/intel/cnl: lock AES-NI feature if selected ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79495bfbd3ebf3b712ce9ecf2040cecfd954178d Gerrit-Change-Number: 46273 Gerrit-PatchSet: 11 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 20:58:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/common: add a Kconfig to control AES-NI locking
by Nico Huber (Code Review) 19 Oct '20

19 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46277 ) Change subject: cpu/intel/common: add a Kconfig to control AES-NI locking ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46277 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4eaf8d7d187188ee6e78741b1ceb837c40c2c402 Gerrit-Change-Number: 46277 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Oct 2020 20:57:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/common: only lock AES-NI when supported
by Nico Huber (Code Review) 19 Oct '20

19 Oct '20

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46276 ) Change subject: cpu/intel/common: only lock AES-NI when supported ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/46276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7ffd5393a3e972f461ff7991b9c5bd363712361 Gerrit-Change-Number: 46276 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 19 Oct 2020 20:56:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit October 2020