coreboot-gerrit September 2019

coreboot-gerrit@coreboot.org

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1442 discussions

Change in coreboot[master]: lib/bootsplash: Fix compilation
by Patrick Rudolph (Code Review) 27 Sep '19

27 Sep '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35613 ) Change subject: lib/bootsplash: Fix compilation ...................................................................... lib/bootsplash: Fix compilation Add missing include. Tested on Supermicro X11SSH-TF. Change-Id: Id0c80ac646001a497e96cae4d48a0f09762eb936 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/lib/bootsplash.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/35613/1 diff --git a/src/lib/bootsplash.c b/src/lib/bootsplash.c index 812a3b7..8364afa 100644 --- a/src/lib/bootsplash.c +++ b/src/lib/bootsplash.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <endian.h> #include <bootsplash.h> +#include <stdlib.h> #include "jpeg.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/35613 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0c80ac646001a497e96cae4d48a0f09762eb936 Gerrit-Change-Number: 35613 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vboot: verify the GBB_HWID as part of the build steps
by Paul Fagerburg (Code Review) 27 Sep '19

27 Sep '19

Paul Fagerburg has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35607 ) Change subject: vboot: verify the GBB_HWID as part of the build steps ...................................................................... vboot: verify the GBB_HWID as part of the build steps The GBB_HWID has to end with a value based on the CRC-32 of the first part of the string. We've been using a manual process to generate the full GBB_HWID, and there have been errors. As part of the build process, verify that the GBB_HWID conforms to the standard, and stop the build if it doesn't, so we don't get the "your computer is configured with a malformed hardware ID" error that prevents Chrome OS from updating. BUG=b:140067412 Signed-off-by: Paul Fagerburg <pfagerburg(a)chromium.org> Change-Id: Ibfef1b118dca0927ef09674351f26cb2a5ad2171 --- M src/security/vboot/Makefile.inc A src/security/vboot/check_hwid.sh 2 files changed, 53 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/35607/1 diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index 3078e30..0f96ddb 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -241,6 +241,7 @@ $(obj)/gbb.region: $(obj)/gbb.stub @printf " SETUP GBB\n" + check_hwid.sh "$(CONFIG_GBB_HWID)" cp $< $@.tmp $(FUTILITY) gbb_utility -s \ --hwid="$(CONFIG_GBB_HWID)" \ diff --git a/src/security/vboot/check_hwid.sh b/src/security/vboot/check_hwid.sh new file mode 100755 index 0000000..fd1a40d --- /dev/null +++ b/src/security/vboot/check_hwid.sh @@ -0,0 +1,52 @@ +#!/bin/bash +# +# This file is part of the coreboot project. +# +# Copyright 2019 Google LLC. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +if [[ "$#" -ne 1 ]]; then + echo "Usage: $0 hwid" + echo "e.g. $0 \"KOHAKU TEST 1953\"" + echo "Determine if the HWID is valid by recalculating the CRC and" + echo "comparing the result with the original." + exit 1 +fi + +HWID="${1}" + +# The hwid string should end with a space and some numbers. +# We want all of the string but the last space and the numbers. +# `cut` only understands counting forward from 1, not counting +# backward from the end, so use `rev`. +BASE=$(echo "${HWID}" | rev | cut -d" " -f 2- | rev) + +# Get a temporary file, because `crc32` will only work on files, +# not stdin or a string on the command line. +TMP="$(mktemp)" +echo -n "${BASE}" > "${TMP}" +CRC=$(crc32 "${TMP}") +rm -f "${TMP}" + +# `crc32` gives us a hex value, but without the leading 0x. +# Convert from hex to decimal. +CRC=$((16#${CRC})) + +# Take the 4 low digits (i.e. modulo 10000). +DIGITS=$(echo "${CRC}" | rev | cut -c 1-4 | rev) + +# The recomputed HWID is the base string plus a space and the 4 digits. +HWID2="${BASE} ${DIGITS}" + +if [[ ! "${HWID}" = "${HWID2}" ]]; then + echo "${HWID} fails validation, should be ${HWID2}" + exit 1 +fi -- To view, visit https://review.coreboot.org/c/coreboot/+/35607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfef1b118dca0927ef09674351f26cb2a5ad2171 Gerrit-Change-Number: 35607 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: vendorcode/eltan/security: Use config VENDORCODE_ELTAN_XXX
by Frans Hendriks (Code Review) 27 Sep '19

27 Sep '19

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33442 Change subject: vendorcode/eltan/security: Use config VENDORCODE_ELTAN_XXX ...................................................................... vendorcode/eltan/security: Use config VENDORCODE_ELTAN_XXX To avoid confusion use VENDORCODE_ELTAN_VBOOT and VENDORCODE_ELTAN_MBOOT config values. Inlcude verfied_boot and mboot subdirectories as CPPFLAGS when measured boot or verified boot is enabled. This allows to generate binary with measured boot enabled only. BUG=N/A TEST=Boot Linux 4.20 and verify logging on Facebook FBG-1701 Change-Id: Iaaf3c8cacbc8d2be7387264ca9c973e583871f0a Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/vendorcode/eltan/security/Makefile.inc 1 file changed, 2 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/33442/1 diff --git a/src/vendorcode/eltan/security/Makefile.inc b/src/vendorcode/eltan/security/Makefile.inc index 26b324b..16f17fd 100644 --- a/src/vendorcode/eltan/security/Makefile.inc +++ b/src/vendorcode/eltan/security/Makefile.inc @@ -1,6 +1,6 @@ ## This file is part of the coreboot project. ## -## Copyright (C) 2018 Eltan B.V. +## Copyright (C) 2018-2019 Eltan B.V. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -16,12 +16,9 @@ subdirs-y += verified_boot subdirs-y += mboot -ifeq ($(CONFIG_MBOOT), y) +ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/mboot CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/include -endif - -ifeq ($(CONFIG_VERIFIED_BOOT), y) CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/verified_boot endif -- To view, visit https://review.coreboot.org/c/coreboot/+/33442 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaf3c8cacbc8d2be7387264ca9c973e583871f0a Gerrit-Change-Number: 33442 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: superio: add support for IT8380
by Alexander Couzens (Code Review) 26 Sep '19

26 Sep '19

Alexander Couzens has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35626 ) Change subject: superio: add support for IT8380 ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/35626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife2bafa073d714d58756510018632e97d86aa280 Gerrit-Change-Number: 35626 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 26 Sep 2019 20:39:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Fix regression on pcidev_
by Kyösti Mälkki (Code Review) 26 Sep '19

26 Sep '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34285 ) Change subject: soc/intel: Fix regression on pcidev_ ...................................................................... soc/intel: Fix regression on pcidev_ Fix regression with commit 903b40a soc/intel: Replace uses of dev_find_slot() Platforms where FSP hides PCI devices before enumeration may halt with error message 'PCI: dev is NULL!'. The workaround here is to print an error message revealing the faulty source code function and revert to old behaviour of dev_find_slot(). Change-Id: I5eab3e7f1993b686103eaa257aacda379dc259fa Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/device/device_const.c M src/include/device/device.h M src/soc/intel/apollolake/include/soc/pci_devs.h M src/soc/intel/broadwell/include/soc/pci_devs.h M src/soc/intel/cannonlake/include/soc/pci_devs.h M src/soc/intel/denverton_ns/include/soc/pci_devs.h M src/soc/intel/icelake/include/soc/pci_devs.h M src/soc/intel/skylake/include/soc/pci_devs.h 8 files changed, 27 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/34285/1 diff --git a/src/device/device_const.c b/src/device/device_const.c index c1b0b06..05dfb30 100644 --- a/src/device/device_const.c +++ b/src/device/device_const.c @@ -234,6 +234,16 @@ return pcidev_path_on_root(PCI_DEVFN(dev, fn)); } +DEVTREE_CONST struct device *pcidev_debug_path_on_root(pci_devfn_t devfn, const char *func) +{ + DEVTREE_CONST struct device *dev = pcidev_path_on_root(devfn); + if (dev) + return dev; + + printk(BIOS_ERR, "BUG: %s requests hidden 00:%02x.%d\n", func, devfn >> 3, devfn & 7); + return dev_find_slot(0, devfn); +} + /** * Given an SMBus bus and a device number, find the device structure. * diff --git a/src/include/device/device.h b/src/include/device/device.h index 007c51f..12c258e 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -275,8 +275,6 @@ void tolm_test(void *gp, struct device *dev, struct resource *new); u32 find_pci_tolm(struct bus *bus); -DEVTREE_CONST struct device *dev_find_slot(unsigned int bus, - unsigned int devfn); DEVTREE_CONST struct device *dev_find_next_pci_device( DEVTREE_CONST struct device *previous_dev); DEVTREE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus, @@ -292,6 +290,10 @@ DEVTREE_CONST struct device *pcidev_on_root(uint8_t dev, uint8_t fn); DEVTREE_CONST struct bus *pci_root_bus(void); +/* To be deprecated, avoid using. */ +DEVTREE_CONST struct device *dev_find_slot(unsigned int bus, unsigned int devfn); +DEVTREE_CONST struct device *pcidev_debug_path_on_root(pci_devfn_t devfn, const char *func); + void scan_smbus(struct device *bus); void scan_generic_bus(struct device *bus); void scan_static_bus(struct device *bus); diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h index a334f63..c5eaf4c 100644 --- a/src/soc/intel/apollolake/include/soc/pci_devs.h +++ b/src/soc/intel/apollolake/include/soc/pci_devs.h @@ -22,8 +22,8 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #else #define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func) diff --git a/src/soc/intel/broadwell/include/soc/pci_devs.h b/src/soc/intel/broadwell/include/soc/pci_devs.h index 522e3eb..ae3e08f 100644 --- a/src/soc/intel/broadwell/include/soc/pci_devs.h +++ b/src/soc/intel/broadwell/include/soc/pci_devs.h @@ -25,8 +25,8 @@ #else #include <device/device.h> #include <device/pci_def.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #endif /* System Agent Devices */ diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h index 1bc028f..33814b0 100644 --- a/src/soc/intel/cannonlake/include/soc/pci_devs.h +++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h @@ -24,8 +24,8 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #else #define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func) diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index 303ba67..27f9e35 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -27,8 +27,8 @@ #if ENV_RAMSTAGE #include <device/device.h> #include <device/pci_def.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #else #define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_##slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_##slot, func) diff --git a/src/soc/intel/icelake/include/soc/pci_devs.h b/src/soc/intel/icelake/include/soc/pci_devs.h index 1348f23b..0eddee2 100644 --- a/src/soc/intel/icelake/include/soc/pci_devs.h +++ b/src/soc/intel/icelake/include/soc/pci_devs.h @@ -23,8 +23,8 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #else #define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func) diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 5acaaeb..d25942f 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -24,8 +24,8 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#define _SA_DEV(slot) pcidev_path_on_root(_SA_DEVFN(slot)) -#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#define _SA_DEV(slot) pcidev_debug_path_on_root(_SA_DEVFN(slot), __func__) +#define _PCH_DEV(slot, func) pcidev_debug_path_on_root(_PCH_DEVFN(slot, func), __func__) #else #define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func) @@ -39,7 +39,7 @@ #define SA_DEV_SLOT_PEG 0x01 #define SA_DEVFN_PEG(func) PCI_DEVFN(SA_DEV_SLOT_PEG, func) -#define SA_DEV_PEG(func) pcidev_path_on_root(SA_DEVFN_PEG(func)) +#define SA_DEV_PEG(func) pcidev_debug_path_on_root(SA_DEVFN_PEG(func), __func__) #define SA_DEV_PEG0 SA_DEV_PEG(0) #define SA_DEV_PEG1 SA_DEV_PEG(1) #define SA_DEV_PEG2 SA_DEV_PEG(2) -- To view, visit https://review.coreboot.org/c/coreboot/+/34285 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5eab3e7f1993b686103eaa257aacda379dc259fa Gerrit-Change-Number: 34285 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: device: Introduce pcidev_on_root() and friends
by Aaron Durbin (Code Review) 26 Sep '19

26 Sep '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26447 ) Change subject: device: Introduce pcidev_on_root() and friends ...................................................................... Patch Set 25: (1 comment) https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c File src/device/device_const.c: https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c… PS25, Line 43: result = 0; > OK. I'll add a comment here and in the header file. https://review.coreboot.org/c/coreboot/+/35632 -- To view, visit https://review.coreboot.org/c/coreboot/+/26447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Gerrit-Change-Number: 26447 Gerrit-PatchSet: 25 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Sep 2019 18:07:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: device: Introduce pcidev_on_root() and friends
by Aaron Durbin (Code Review) 26 Sep '19

26 Sep '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26447 ) Change subject: device: Introduce pcidev_on_root() and friends ...................................................................... Patch Set 25: (1 comment) https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c File src/device/device_const.c: https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c… PS25, Line 43: result = 0; > Better you add the comment since we have CB:34084 too. […] OK. I'll add a comment here and in the header file. -- To view, visit https://review.coreboot.org/c/coreboot/+/26447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Gerrit-Change-Number: 26447 Gerrit-PatchSet: 25 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Sep 2019 18:01:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: device: Introduce pcidev_on_root() and friends
by Kyösti Mälkki (Code Review) 26 Sep '19

26 Sep '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26447 ) Change subject: device: Introduce pcidev_on_root() and friends ...................................................................... Patch Set 25: (1 comment) https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c File src/device/device_const.c: https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c… PS25, Line 43: result = 0; > I can add a comment if you think this function will live on longer than a few months. Let me know. Better you add the comment since we have CB:34084 too. This has to live until amdfam10 is wiped with next release, maybe late this year. -- To view, visit https://review.coreboot.org/c/coreboot/+/26447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Gerrit-Change-Number: 26447 Gerrit-PatchSet: 25 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Sep 2019 18:00:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: device: Introduce pcidev_on_root() and friends
by Aaron Durbin (Code Review) 26 Sep '19

26 Sep '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26447 ) Change subject: device: Introduce pcidev_on_root() and friends ...................................................................... Patch Set 25: (1 comment) https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c File src/device/device_const.c: https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c… PS25, Line 43: result = 0; > Well.. […] I can add a comment if you think this function will live on longer than a few months. Let me know. -- To view, visit https://review.coreboot.org/c/coreboot/+/26447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Gerrit-Change-Number: 26447 Gerrit-PatchSet: 25 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Sep 2019 17:38:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: device: Introduce pcidev_on_root() and friends
by Kyösti Mälkki (Code Review) 26 Sep '19

26 Sep '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26447 ) Change subject: device: Introduce pcidev_on_root() and friends ...................................................................... Patch Set 25: (1 comment) https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c File src/device/device_const.c: https://review.coreboot.org/c/coreboot/+/26447/25/src/device/device_const.c… PS25, Line 43: result = 0; > Why didn't we put a comment here indicating why this function sometimes doesn't work? I assume it's […] Well.. comment was not requested during the review and at least I had hoped in May 2018 that we can just throw this function out the window fast. -- To view, visit https://review.coreboot.org/c/coreboot/+/26447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Gerrit-Change-Number: 26447 Gerrit-PatchSet: 25 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Sep 2019 17:37:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit September 2019