Thomas Heijligen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32815 )
Change subject: nvme driver
......................................................................
Abandoned
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Gerrit-Change-Id: I71a33076b58bbfccd1eb18e4de90daf149accf75
Gerrit-Change-Number: 32815
Gerrit-PatchSet: 1
Gerrit-Owner: Thomas Heijligen <src(a)posteo.de>
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Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31373
Change subject: vendorcode/amd/pi: Add merlinfalcon vendor code
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vendorcode/amd/pi: Add merlinfalcon vendor code
Merlinfalcon is essentially stoneyridge (00670F00), but using a carizo CPU.
Therefore, it needs carizo AGESA (00660F01), but a stoneyridge vendor code
with a small modification to gcccar.inc due to carizo AGESA requiring CAR
at 0x3000 to 0x4000.
Please notice:
Most of the new files are duplicate from src/vendorcode/amd/pi/00670F00,
the only difference is gcccar.inc which has 1 extra instruction. I would
rather have some conditional build on a config parameter, but I was
not aware how to do it for an assembly file. I'm open to suggestions.
BUG=b:none.
TEST=Tested later with padmelon board.
Change-Id: I01b4cdef01ba185fd0d96e6674f8b1c56307d1f2
Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
---
A src/vendorcode/amd/pi/00670F00_CZ/AGESA.h
A src/vendorcode/amd/pi/00670F00_CZ/AMD.h
A src/vendorcode/amd/pi/00670F00_CZ/Include/Filecode.h
A src/vendorcode/amd/pi/00670F00_CZ/Include/PlatformMemoryConfiguration.h
A src/vendorcode/amd/pi/00670F00_CZ/Include/Topology.h
A src/vendorcode/amd/pi/00670F00_CZ/Makefile.inc
A src/vendorcode/amd/pi/00670F00_CZ/Porting.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/Family/cpuFamRegisters.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/Table.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/cpuFamilyTranslation.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/cpuRegisters.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/cpuServices.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/CPU/heapManager.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/Common/AmdFch.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/Fch/Common/FchCommonCfg.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/Fch/Fch.h
A src/vendorcode/amd/pi/00670F00_CZ/Proc/Fch/FchPlatform.h
A src/vendorcode/amd/pi/00670F00_CZ/agesa_headers.h
A src/vendorcode/amd/pi/00670F00_CZ/binaryPI/AGESA.c
A src/vendorcode/amd/pi/00670F00_CZ/binaryPI/OptionsIds.h
A src/vendorcode/amd/pi/00670F00_CZ/binaryPI/gcccar.inc
A src/vendorcode/amd/pi/00670F00_CZ/check_for_wrapper.h
A src/vendorcode/amd/pi/00670F00_CZ/gcc-intrin.h
M src/vendorcode/amd/pi/Kconfig
24 files changed, 15,360 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/31373/1
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Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 )
Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
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Patch Set 47:
> Can this be related to VBOOT?
> Or is VBOOT disabled?
I've only tested without VBOOT
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