coreboot-gerrit June 2019

coreboot-gerrit@coreboot.org

1 participants
1454 discussions

Change in ...coreboot[master]: crossgcc: Upgrade GDB to version 8.3
by HAOUAS Elyes (Code Review) 25 Jul '19

25 Jul '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32754 Change subject: crossgcc: Upgrade GDB to version 8.3 ...................................................................... crossgcc: Upgrade GDB to version 8.3 Change-Id: I7a85ad171fa259e0dcb0019941d735ef41511737 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc D util/crossgcc/patches/gdb-8.2.1_amd64.patch A util/crossgcc/patches/gdb-8.3_amd64.patch R util/crossgcc/patches/gdb-8.3_no-doc.patch R util/crossgcc/patches/gdb-8.3_pythonhome.patch D util/crossgcc/sum/gdb-8.2.1.tar.xz.cksum A util/crossgcc/sum/gdb-8.3.tar.xz.cksum 7 files changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/32754/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 0951fb6..f2cce88 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -53,7 +53,7 @@ GCC_VERSION=8.3.0 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.32 -GDB_VERSION=8.2.1 +GDB_VERSION=8.3 IASL_VERSION=20190215 PYTHON_VERSION=3.7.2 EXPAT_VERSION=2.2.6 diff --git a/util/crossgcc/patches/gdb-8.2.1_amd64.patch b/util/crossgcc/patches/gdb-8.2.1_amd64.patch deleted file mode 100644 index 978fa26..0000000 --- a/util/crossgcc/patches/gdb-8.2.1_amd64.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff -urN gdb-8.2.1.orig/gdb/configure.tgt gdb-8.2.1/gdb/configure.tgt ---- gdb-8.2.1.orig/gdb/configure.tgt 2019-01-04 12:34:10.301072023 +0100 -+++ gdb-8.2.1/gdb/configure.tgt 2019-01-04 12:35:21.948388220 +0100 -@@ -732,6 +732,10 @@ - x86_64-*-rtems*) - gdb_target_obs="${amd64_tobjs} ${i386_tobjs} i386-bsd-tdep.o" - ;; -+x86_64-*-*) -+ # Target: amd64 -+ gdb_target_obs="amd64-tdep.o i386-tdep.o i387-tdep.o" -+ ;; - xtensa*-*-linux*) - # Target: GNU/Linux Xtensa - gdb_target_obs="xtensa-linux-tdep.o symfile-mem.o linux-tdep.o" diff --git a/util/crossgcc/patches/gdb-8.3_amd64.patch b/util/crossgcc/patches/gdb-8.3_amd64.patch new file mode 100644 index 0000000..47d9a72 --- /dev/null +++ b/util/crossgcc/patches/gdb-8.3_amd64.patch @@ -0,0 +1,14 @@ +diff -urN gdb-3.orig/gdb/configure.tgt gdb-8.3/gdb/configure.tgt +--- gdb-8.3.orig/gdb/configure.tgt 2019-02-27 05:51:48.000000000 +0100 ++++ gdb-8.3/gdb/configure.tgt 2019-05-12 08:07:45.624984535 +0200 +@@ -772,6 +772,10 @@ + x86_64-*-rtems*) + gdb_target_obs="${amd64_tobjs} ${i386_tobjs} i386-bsd-tdep.o" + ;; ++x86_64-*-*) ++ # Target: amd6 ++ gdb_target_obs="amd64-tdep.o i386-tdep.o i387-tdep.o" ++ ;; + xtensa*-*-*linux*) + # Target: GNU/Linux Xtensa + gdb_target_obs="xtensa-linux-tdep.o symfile-mem.o linux-tdep.o" diff --git a/util/crossgcc/patches/gdb-8.2.1_no-doc.patch b/util/crossgcc/patches/gdb-8.3_no-doc.patch similarity index 100% rename from util/crossgcc/patches/gdb-8.2.1_no-doc.patch rename to util/crossgcc/patches/gdb-8.3_no-doc.patch diff --git a/util/crossgcc/patches/gdb-8.2.1_pythonhome.patch b/util/crossgcc/patches/gdb-8.3_pythonhome.patch similarity index 100% rename from util/crossgcc/patches/gdb-8.2.1_pythonhome.patch rename to util/crossgcc/patches/gdb-8.3_pythonhome.patch diff --git a/util/crossgcc/sum/gdb-8.2.1.tar.xz.cksum b/util/crossgcc/sum/gdb-8.2.1.tar.xz.cksum deleted file mode 100644 index a976106..0000000 --- a/util/crossgcc/sum/gdb-8.2.1.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -023556a6d6effa1ffaadf0007cc4458cbe8dde3d tarballs/gdb-8.2.1.tar.xz diff --git a/util/crossgcc/sum/gdb-8.3.tar.xz.cksum b/util/crossgcc/sum/gdb-8.3.tar.xz.cksum new file mode 100644 index 0000000..bc82f51 --- /dev/null +++ b/util/crossgcc/sum/gdb-8.3.tar.xz.cksum @@ -0,0 +1 @@ +f45de6af561f0fa0241f0d5085198556fcfd1e5e tarballs/gdb-8.3.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/32754 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a85ad171fa259e0dcb0019941d735ef41511737 Gerrit-Change-Number: 32754 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 4

Change in ...coreboot[master]: soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 25 Jul '19

25 Jul '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33691 Change subject: soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriate ...................................................................... soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriate Change-Id: Iab605f6be4a48c10fa5aae7a1222520149ad1392 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/qualcomm/ipq806x/spi.c M src/soc/rockchip/common/edp.c M src/soc/rockchip/common/spi.c 3 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33691/1 diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c index 2657b9c..65ce594 100644 --- a/src/soc/qualcomm/ipq806x/spi.c +++ b/src/soc/qualcomm/ipq806x/spi.c @@ -19,7 +19,7 @@ #include <gpio.h> #include <soc/iomap.h> #include <soc/spi.h> -#include <stdlib.h> +#include <stddef.h> #define SUCCESS 0 diff --git a/src/soc/rockchip/common/edp.c b/src/soc/rockchip/common/edp.c index 91e2de9..301bc41 100644 --- a/src/soc/rockchip/common/edp.c +++ b/src/soc/rockchip/common/edp.c @@ -18,7 +18,7 @@ #include <delay.h> #include <device/device.h> #include <edid.h> -#include <stdlib.h> +#include <stddef.h> #include <stdint.h> #include <string.h> #include <soc/addressmap.h> diff --git a/src/soc/rockchip/common/spi.c b/src/soc/rockchip/common/spi.c index e929419..1fc5889 100644 --- a/src/soc/rockchip/common/spi.c +++ b/src/soc/rockchip/common/spi.c @@ -23,7 +23,7 @@ #include <soc/clock.h> #include <spi-generic.h> #include <spi_flash.h> -#include <stdlib.h> +#include <stddef.h> #include <timer.h> struct rockchip_spi_slave { -- To view, visit https://review.coreboot.org/c/coreboot/+/33691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab605f6be4a48c10fa5aae7a1222520149ad1392 Gerrit-Change-Number: 33691 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: soc/mediatek: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 25 Jul '19

25 Jul '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33690 Change subject: soc/mediatek: Use 'include <stdlib.h>' when appropriate ...................................................................... soc/mediatek: Use 'include <stdlib.h>' when appropriate Change-Id: Id6d881055826044d04843ba165641131b9111342 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/mediatek/common/spi.c M src/soc/mediatek/mt8173/flash_controller.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/33690/1 diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c index 1af6f10..21ece21 100644 --- a/src/soc/mediatek/common/spi.c +++ b/src/soc/mediatek/common/spi.c @@ -17,9 +17,9 @@ #include <assert.h> #include <console/console.h> #include <endian.h> -#include <stdlib.h> #include <soc/pll.h> #include <soc/spi.h> +#include <stddef.h> #include <timer.h> #define MTK_SPI_DEBUG 0 diff --git a/src/soc/mediatek/mt8173/flash_controller.c b/src/soc/mediatek/mt8173/flash_controller.c index bca2ecf..305aca6 100644 --- a/src/soc/mediatek/mt8173/flash_controller.c +++ b/src/soc/mediatek/mt8173/flash_controller.c @@ -21,12 +21,12 @@ #include <spi_flash.h> #include <spi-generic.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <symbols.h> #include <timer.h> #include <soc/symbols.h> #include <soc/flash_controller.h> +#include <stddef.h> #define get_nth_byte(d, n) ((d >> (8 * n)) & 0xff) -- To view, visit https://review.coreboot.org/c/coreboot/+/33690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id6d881055826044d04843ba165641131b9111342 Gerrit-Change-Number: 33690 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: soc/nvidia: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 25 Jul '19

25 Jul '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33687 Change subject: soc/nvidia: Use 'include <stdlib.h>' when appropriate ...................................................................... soc/nvidia: Use 'include <stdlib.h>' when appropriate Change-Id: I812d468c68b31917da5d406e2fb3b84bc6331b69 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/nvidia/tegra/i2c.c M src/soc/nvidia/tegra124/dp.c M src/soc/nvidia/tegra124/spi.c M src/soc/nvidia/tegra210/addressmap.c M src/soc/nvidia/tegra210/arm_tf.c M src/soc/nvidia/tegra210/dc.c M src/soc/nvidia/tegra210/dp.c M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c M src/soc/nvidia/tegra210/mipi.c M src/soc/nvidia/tegra210/mipi_dsi.c M src/soc/nvidia/tegra210/mmu_operations.c 11 files changed, 15 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33687/1 diff --git a/src/soc/nvidia/tegra/i2c.c b/src/soc/nvidia/tegra/i2c.c index 9dbfde8..c96ebc2 100644 --- a/src/soc/nvidia/tegra/i2c.c +++ b/src/soc/nvidia/tegra/i2c.c @@ -17,9 +17,9 @@ #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> -#include <stdlib.h> #include <string.h> #include <soc/addressmap.h> + #include "i2c.h" static void do_bus_clear(int bus) diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c index b9fa0ea..102e9df 100644 --- a/src/soc/nvidia/tegra124/dp.c +++ b/src/soc/nvidia/tegra124/dp.c @@ -27,7 +27,7 @@ #include <soc/nvidia/tegra/dc.h> #include <soc/nvidia/tegra/displayport.h> #include <soc/sor.h> -#include <stdlib.h> +#include <stddef.h> #include <string.h> #include "chip.h" diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index 45159c2..e0d62d7 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -26,8 +26,8 @@ #include <soc/spi.h> #include <spi-generic.h> #include <spi_flash.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <symbols.h> #include <timer.h> diff --git a/src/soc/nvidia/tegra210/addressmap.c b/src/soc/nvidia/tegra210/addressmap.c index 4f11d4e..e5f94c0 100644 --- a/src/soc/nvidia/tegra210/addressmap.c +++ b/src/soc/nvidia/tegra210/addressmap.c @@ -21,7 +21,7 @@ #include <soc/id.h> #include <soc/mc.h> #include <soc/sdram.h> -#include <stdlib.h> +#include <stddef.h> #include <symbols.h> #include <soc/nvidia/tegra/types.h> diff --git a/src/soc/nvidia/tegra210/arm_tf.c b/src/soc/nvidia/tegra210/arm_tf.c index bd34185..c6f564b 100644 --- a/src/soc/nvidia/tegra210/arm_tf.c +++ b/src/soc/nvidia/tegra210/arm_tf.c @@ -18,7 +18,7 @@ #include <assert.h> #include <soc/addressmap.h> #include <soc/console_uart.h> -#include <stdlib.h> +#include <stddef.h> #include <symbols.h> typedef struct bl31_plat_params { diff --git a/src/soc/nvidia/tegra210/dc.c b/src/soc/nvidia/tegra210/dc.c index ceffb41..46443cf 100644 --- a/src/soc/nvidia/tegra210/dc.c +++ b/src/soc/nvidia/tegra210/dc.c @@ -12,16 +12,17 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <console/console.h> #include <device/mmio.h> #include <stdint.h> -#include <stdlib.h> #include <edid.h> #include <device/device.h> #include <soc/nvidia/tegra/dc.h> -#include "chip.h" #include <soc/display.h> +#include "chip.h" + int dump = 0; unsigned long READL(void *p) { diff --git a/src/soc/nvidia/tegra210/dp.c b/src/soc/nvidia/tegra210/dp.c index b0c0846..a7a931e 100644 --- a/src/soc/nvidia/tegra210/dp.c +++ b/src/soc/nvidia/tegra210/dp.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/i2c_simple.h> #include <edid.h> -#include <stdlib.h> #include <string.h> #include <delay.h> #include <soc/addressmap.h> @@ -32,6 +31,7 @@ #include <soc/nvidia/tegra/pwm.h> #include <soc/nvidia/tegra/displayport.h> #include <soc/sor.h> +#include <stddef.h> #include "chip.h" #define DO_FAST_LINK_TRAINING 0 diff --git a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c index a9101b8..f95a819 100644 --- a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c +++ b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c @@ -12,18 +12,19 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <console/console.h> #include <stdint.h> -#include <stdlib.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <device/device.h> #include <soc/nvidia/tegra/types.h> -#include "../chip.h" #include <soc/display.h> #include <soc/mipi_dsi.h> #include <soc/tegra_dsi.h> + +#include "../chip.h" #include "panel-jdi-lpm102a188a.h" struct panel_jdi jdi_data[NUM_DSI]; diff --git a/src/soc/nvidia/tegra210/mipi.c b/src/soc/nvidia/tegra210/mipi.c index f863496..89349a0 100644 --- a/src/soc/nvidia/tegra210/mipi.c +++ b/src/soc/nvidia/tegra210/mipi.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/mmio.h> #include <stdint.h> -#include <stdlib.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/clock.h> @@ -26,6 +25,7 @@ #include <soc/display.h> #include <soc/mipi_dsi.h> #include <soc/tegra_dsi.h> + #include "jdi_25x18_display/panel-jdi-lpm102a188a.h" static unsigned long dsi_pads[] = { diff --git a/src/soc/nvidia/tegra210/mipi_dsi.c b/src/soc/nvidia/tegra210/mipi_dsi.c index 23d9274..db61ce1 100644 --- a/src/soc/nvidia/tegra210/mipi_dsi.c +++ b/src/soc/nvidia/tegra210/mipi_dsi.c @@ -40,8 +40,8 @@ */ #include <console/console.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/soc/nvidia/tegra210/mmu_operations.c b/src/soc/nvidia/tegra210/mmu_operations.c index 9cee6b2..0c620a4 100644 --- a/src/soc/nvidia/tegra210/mmu_operations.c +++ b/src/soc/nvidia/tegra210/mmu_operations.c @@ -17,7 +17,7 @@ #include <assert.h> #include <soc/addressmap.h> #include <soc/mmu_operations.h> -#include <stdlib.h> +#include <stddef.h> #include <stdint.h> #include <symbols.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33687 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I812d468c68b31917da5d406e2fb3b84bc6331b69 Gerrit-Change-Number: 33687 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: device/Kconfig: Add HAVE_EXT_GFX kconfig
by Subrata Banik (Code Review) 25 Jul '19

25 Jul '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33738 Change subject: device/Kconfig: Add HAVE_EXT_GFX kconfig ...................................................................... device/Kconfig: Add HAVE_EXT_GFX kconfig This patch creates new kconfig option to bring display over external PCI based GFX card. CONFIG_ENABLE_EXT_GFX to select all required kconfig to launch legacy oprom from pci based GFX card. Change-Id: I8ebde69e38defbe3321eb5e5bbd632c209ae2cd8 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/device/Kconfig 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/33738/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index 0539062..0ee6158 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -682,4 +682,20 @@ I2C controller is not (yet) available. The platform code needs to provide bindings to manually toggle I2C lines. +config HAVE_EXT_GFX + bool + +config ENABLE_EXT_GFX + bool "Enable Display over external PCI GFX card" + default n + depends on HAVE_EXT_GFX + select VGA_ROM_RUN + select ALWAYS_LOAD_OPROM + select ALWAYS_RUN_OPROM + select ON_DEVICE_ROM_LOAD + select FRAMEBUFFER_SET_VESA_MODE + help + Its possible to bring display through external graphics card in coreboot. + This option enables graphics initialization with external graphics card. + endmenu -- To view, visit https://review.coreboot.org/c/coreboot/+/33738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ebde69e38defbe3321eb5e5bbd632c209ae2cd8 Gerrit-Change-Number: 33738 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

7 72

Change in ...coreboot[master]: qcs405: Add board_id entry in the interface table
by Nitheesh Sekar (Code Review) 24 Jul '19

24 Jul '19

Nitheesh Sekar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33160 Change subject: qcs405: Add board_id entry in the interface table ...................................................................... qcs405: Add board_id entry in the interface table This patch adds board id entry in the interface table. Change-Id: I2de11b6357db0eb2e1966aaf5069d002dc39a10e Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org> --- M src/mainboard/google/mistral/romstage.c M src/soc/qualcomm/common/include/soc/qclib_common.h M src/soc/qualcomm/qcs405/include/soc/memlayout.ld M src/soc/qualcomm/qcs405/include/soc/symbols.h M src/soc/qualcomm/qcs405/soc_blob_load.c 5 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33160/1 diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c index bce258d..a21f6f3 100644 --- a/src/mainboard/google/mistral/romstage.c +++ b/src/mainboard/google/mistral/romstage.c @@ -16,6 +16,10 @@ #include <arch/stages.h> #include <soc/qclib.h> #include <soc/usb.h> +#include <symbols.h> +#include <soc/symbols.h> +#include <boardid.h> + static void prepare_usb(void) { @@ -28,6 +32,7 @@ void platform_romstage_main(void) { + *_board_id = (uint8_t)board_id(); /* QCLib: DDR init & train */ qclib_load_and_run(); prepare_usb(); diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h index 19ec083..834a6aa 100644 --- a/src/soc/qualcomm/common/include/soc/qclib_common.h +++ b/src/soc/qualcomm/common/include/soc/qclib_common.h @@ -36,6 +36,7 @@ #define QCLIB_TE_DDR_TRAINING_DATA "ddr_training_data" #define QCLIB_TE_LIMITS_CFG_DATA "limits_cfg_data" #define QCLIB_TE_QCSDI "qcsdi" +#define QCLIB_TE_BOARD_ID "board_id" /* BA_BMASK_VALUES (blob_attributes bit mask values) */ #define QCLIB_BA_SAVE_TO_STORAGE 0x00000001 diff --git a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld index 4505b11..2abb33e 100644 --- a/src/soc/qualcomm/qcs405/include/soc/memlayout.ld +++ b/src/soc/qualcomm/qcs405/include/soc/memlayout.ld @@ -54,6 +54,7 @@ REGION(ddr_training, 0x8cfe000, 0x2000, 0x1000) REGION(ddr_information, 0x8d00000, 0x100, 0x100) REGION(dcb, 0x8d01000, 0x1000, 0x1000) + REGION(board_id, 0x8d02000, 0x8, 0x10) REGION(qclib_shared_data, 0x8d78000, 0x8000, 0x1000) BSRAM_END(0x8D80000) diff --git a/src/soc/qualcomm/qcs405/include/soc/symbols.h b/src/soc/qualcomm/qcs405/include/soc/symbols.h index c0e2dcf..d8b54ec 100644 --- a/src/soc/qualcomm/qcs405/include/soc/symbols.h +++ b/src/soc/qualcomm/qcs405/include/soc/symbols.h @@ -24,6 +24,7 @@ DECLARE_REGION(dram_reserved); DECLARE_REGION(dcb); DECLARE_REGION(pmic); +DECLARE_REGION(board_id); extern u8 _rpm[]; extern u8 _erpm[]; diff --git a/src/soc/qualcomm/qcs405/soc_blob_load.c b/src/soc/qualcomm/qcs405/soc_blob_load.c index 67ef831..4519536 100644 --- a/src/soc/qualcomm/qcs405/soc_blob_load.c +++ b/src/soc/qualcomm/qcs405/soc_blob_load.c @@ -45,6 +45,9 @@ qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0); + qclib_add_if_table_entry(QCLIB_TE_BOARD_ID, _board_id, + REGION_SIZE(board_id), 0); + return 0; fail: -- To view, visit https://review.coreboot.org/c/coreboot/+/33160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2de11b6357db0eb2e1966aaf5069d002dc39a10e Gerrit-Change-Number: 33160 Gerrit-PatchSet: 1 Gerrit-Owner: Nitheesh Sekar <nsekar(a)codeaurora.org> Gerrit-MessageType: newchange

4 11

Change in ...coreboot[master]: vboot: relocate call to vboot_save_recovery_reason_vbnv
by Joel Kitching (Code Review) 23 Jul '19

23 Jul '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33551 Change subject: vboot: relocate call to vboot_save_recovery_reason_vbnv ...................................................................... vboot: relocate call to vboot_save_recovery_reason_vbnv Relocate call to vboot_save_recovery_reason_vbnv and rename vb2_clear_recovery_reason_vbnv for consistency. BUG=b:124141368, b:124192753 TEST=make clean && make test-abuild BRANCH=none Change-Id: I111cc23cf3d4b16fdb058dd395ac17a97f23a53f Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/security/vboot/bootmode.c M src/security/vboot/vboot_loader.c M src/security/vboot/vboot_logic.c 3 files changed, 5 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/33551/1 diff --git a/src/security/vboot/bootmode.c b/src/security/vboot/bootmode.c index 4d4dc0d..4625bcd 100644 --- a/src/security/vboot/bootmode.c +++ b/src/security/vboot/bootmode.c @@ -43,7 +43,7 @@ set_recovery_mode_into_vbnv(reason); } -static void vb2_clear_recovery_reason_vbnv(void *unused) +static void vboot_clear_recovery_reason_vbnv(void *unused) { if (!CONFIG(VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT)) return; @@ -62,7 +62,7 @@ * only in FSP stages which run before BS_DEV_INIT. */ BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, - vb2_clear_recovery_reason_vbnv, NULL); + vboot_clear_recovery_reason_vbnv, NULL); /* * Returns 1 if vboot is being used and currently in a stage which might have diff --git a/src/security/vboot/vboot_loader.c b/src/security/vboot/vboot_loader.c index 9e2cd00..b205a38 100644 --- a/src/security/vboot/vboot_loader.c +++ b/src/security/vboot/vboot_loader.c @@ -44,7 +44,6 @@ /* Note: this path is not used for VBOOT_RETURN_FROM_VERSTAGE */ verstage_main(); car_set_var(vboot_executed, 1); - vboot_save_recovery_reason_vbnv(); } else if (verstage_should_load()) { struct cbfsf file; struct prog verstage = diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index 62e033a..2468f5f 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -474,6 +474,9 @@ if (ENV_ROMSTAGE && CONFIG(VBOOT_STARTS_IN_ROMSTAGE)) vboot_log_and_clear_recovery_mode_switch(0); + /* Save recovery reason in case of unexpected reboots on x86. */ + vboot_save_recovery_reason_vbnv(); + vboot_finalize_work_context(&ctx); timestamp_add_now(TS_END_VBOOT); } -- To view, visit https://review.coreboot.org/c/coreboot/+/33551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I111cc23cf3d4b16fdb058dd395ac17a97f23a53f Gerrit-Change-Number: 33551 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: vboot: deprecate vboot_handoff structure
by Joel Kitching (Code Review) 23 Jul '19

23 Jul '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33536 Change subject: vboot: deprecate vboot_handoff structure ...................................................................... vboot: deprecate vboot_handoff structure vboot_handoff is no longer used in coreboot, and is not needed in CBMEM or cbtable. BUG=b:124141368, b:124192753 TEST=make clean && make runtests BRANCH=none Change-Id: I782d53f969dc9ae2775e3060371d06e7bf8e1af6 Signed-off-by: Joel Kitching <kitching(a)google.com> --- M 3rdparty/blobs M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c M src/commonlib/include/commonlib/cbmem_id.h M src/commonlib/include/commonlib/coreboot_tables.h M src/lib/coreboot_table.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_common.h 9 files changed, 4 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33536/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index ca6cfcd..678b4c4 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit ca6cfcdbe1cdeb38c2622ee2e5236cc4657e3377 +Subproject commit 678b4c4a81069bb6e10e2e59f5374b83d727cd2b diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 8e5cec0..779cf5c 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -201,7 +201,7 @@ }; #define CB_TAG_VBNV 0x0019 -#define CB_TAG_VBOOT_HANDOFF 0x0020 +#define CB_TAG_VBOOT_HANDOFF 0x0020 /* deprecated */ #define CB_TAG_VBOOT_WORKBUF 0x0034 #define CB_TAG_DMA 0x0022 #define CB_TAG_RAM_OOPS 0x0023 diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index 72059ad..50f0e39 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -95,8 +95,6 @@ struct cb_header *header; struct cb_mainboard *mainboard; - void *vboot_handoff; - u32 vboot_handoff_size; void *vboot_workbuf; uint32_t vboot_workbuf_size; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 26a3a48..03778b6 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -78,14 +78,6 @@ info->serial = ((struct cb_serial *)ptr); } -static void cb_parse_vboot_handoff(unsigned char *ptr, struct sysinfo_t *info) -{ - struct lb_range *vbho = (struct lb_range *)ptr; - - info->vboot_handoff = (void *)(uintptr_t)vbho->range_start; - info->vboot_handoff_size = vbho->range_size; -} - static void cb_parse_vboot_workbuf(unsigned char *ptr, struct sysinfo_t *info) { struct lb_range *vbwb = (struct lb_range *)ptr; @@ -367,9 +359,6 @@ case CB_TAG_VBNV: cb_parse_vbnv(ptr, info); break; - case CB_TAG_VBOOT_HANDOFF: - cb_parse_vboot_handoff(ptr, info); - break; case CB_TAG_VBOOT_WORKBUF: cb_parse_vboot_workbuf(ptr, info); break; diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h index 2236c95..ec702ec 100644 --- a/src/commonlib/include/commonlib/cbmem_id.h +++ b/src/commonlib/include/commonlib/cbmem_id.h @@ -68,7 +68,7 @@ #define CBMEM_ID_TCPA_TCG_LOG 0x54445041 #define CBMEM_ID_TIMESTAMP 0x54494d45 #define CBMEM_ID_TPM2_TCG_LOG 0x54504d32 -#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0 +#define CBMEM_ID_VBOOT_HANDOFF 0x780074f0 /* deprecated */ #define CBMEM_ID_VBOOT_SEL_REG 0x780074f1 /* deprecated */ #define CBMEM_ID_VBOOT_WORKBUF 0x78007343 #define CBMEM_ID_VPD 0x56504420 diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 277b746..7d7a2e9 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -291,7 +291,7 @@ }; #define LB_TAG_VBNV 0x0019 -#define LB_TAG_VBOOT_HANDOFF 0x0020 +#define LB_TAG_VBOOT_HANDOFF 0x0020 /* deprecated */ #define LB_TAG_VBOOT_WORKBUF 0x0034 #define LB_TAG_DMA 0x0022 #define LB_TAG_RAM_OOPS 0x0023 diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index df75698..95c2ae6 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -209,22 +209,6 @@ } #endif /* CONFIG_CHROMEOS */ -static void lb_vboot_handoff(struct lb_header *header) -{ - void *addr; - uint32_t size; - struct lb_range *vbho; - - if (vboot_get_handoff_info(&addr, &size)) - return; - - vbho = (struct lb_range *)lb_new_record(header); - vbho->tag = LB_TAG_VBOOT_HANDOFF; - vbho->size = sizeof(*vbho); - vbho->range_start = (intptr_t)addr; - vbho->range_size = size; -} - static void lb_vboot_workbuf(struct lb_header *header) { struct lb_range *vbwb; @@ -563,9 +547,6 @@ #endif if (CONFIG(VBOOT)) { - /* pass along the vboot_handoff address. */ - lb_vboot_handoff(head); - /* pass along the vboot workbuf address. */ lb_vboot_workbuf(head); } diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c index 8456dcf..cbd7a2e 100644 --- a/src/security/vboot/vboot_common.c +++ b/src/security/vboot/vboot_common.c @@ -51,30 +51,6 @@ return 0; } -/* ========================== VBOOT HANDOFF APIs =========================== */ -int vboot_get_handoff_info(void **addr, uint32_t *size) -{ - /* - * vboot_handoff is present only after cbmem comes online. If we are in - * pre-ram stage, then bail out early. - */ - if (ENV_BOOTBLOCK || - (ENV_VERSTAGE && CONFIG(VBOOT_STARTS_IN_BOOTBLOCK))) - return -1; - - struct vboot_handoff *vboot_handoff; - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff == NULL) - return -1; - - *addr = vboot_handoff; - - if (size) - *size = sizeof(*vboot_handoff); - return 0; -} - /* ============================ VBOOT REBOOT ============================== */ void __weak vboot_platform_prepare_reboot(void) { diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index 241dc90..8aadf9e 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -32,27 +32,6 @@ */ int vboot_check_recovery_request(void); -/* ========================== VBOOT HANDOFF APIs =========================== */ -/* - * The vboot_handoff structure contains the data to be consumed by downstream - * firmware after firmware selection has been completed. Namely it provides - * vboot shared data as well as the flags from VbInit. - */ -struct vboot_handoff { - uint32_t reserved0; /* originally from VbInitParams */ - uint32_t out_flags; - uint32_t selected_firmware; - char shared_data[VB_SHARED_DATA_MIN_SIZE]; -} __packed; - -/* - * vboot_get_handoff_info returns pointer to the vboot_handoff structure if - * available. vboot_handoff is available only after CBMEM comes online. If size - * is not NULL, size of the vboot_handoff structure is returned in it. - * Returns 0 on success and -1 on error. - */ -int vboot_get_handoff_info(void **addr, uint32_t *size); - /* ============================ VBOOT REBOOT ============================== */ /* * vboot_reboot handles the reboot requests made by vboot_reference library. It -- To view, visit https://review.coreboot.org/c/coreboot/+/33536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I782d53f969dc9ae2775e3060371d06e7bf8e1af6 Gerrit-Change-Number: 33536 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

5 9

Change in ...coreboot[master]: libpayload/libc: Use size_t for lengths and indices
by Jacob Garber (Code Review) 23 Jul '19

23 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33794 Change subject: libpayload/libc: Use size_t for lengths and indices ...................................................................... libpayload/libc: Use size_t for lengths and indices size_t is the natural integer type for strlen() and array indices, and this fixes several integer conversion and sign comparison warnings. Change-Id: I5658b19f990de4596a602b36d9533b1ca96ad947 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/libpayload/libc/string.c 1 file changed, 38 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/33794/1 diff --git a/payloads/libpayload/libc/string.c b/payloads/libpayload/libc/string.c index fd88a88..0e34a03 100644 --- a/payloads/libpayload/libc/string.c +++ b/payloads/libpayload/libc/string.c @@ -91,9 +91,9 @@ */ int strcasecmp(const char *s1, const char *s2) { - int i, res; + int res; - for (i = 0; 1; i++) { + for (size_t i = 0; 1; i++) { res = tolower(s1[i]) - tolower(s2[i]); if (res || (s1[i] == '\0')) break; @@ -112,10 +112,9 @@ */ int strncasecmp(const char *s1, const char *s2, size_t maxlen) { - int i, res; + int res = 0; - res = 0; - for (i = 0; i < maxlen; i++) { + for (size_t i = 0; i < maxlen; i++) { res = tolower(s1[i]) - tolower(s2[i]); if (res || (s1[i] == '\0')) break; @@ -135,9 +134,9 @@ */ int strcmp(const char *s1, const char *s2) { - int i, res; + int res; - for (i = 0; 1; i++) { + for (size_t i = 0; 1; i++) { res = s1[i] - s2[i]; if (res || (s1[i] == '\0')) break; @@ -156,10 +155,9 @@ */ int strncmp(const char *s1, const char *s2, size_t maxlen) { - int i, res; + int res = 0; - res = 0; - for (i = 0; i < maxlen; i++) { + for (size_t i = 0; i < maxlen; i++) { res = s1[i] - s2[i]; if (res || (s1[i] == '\0')) break; @@ -179,10 +177,9 @@ char *strncpy(char *d, const char *s, size_t n) { /* Use +1 to get the NUL terminator. */ - int max = n > strlen(s) + 1 ? strlen(s) + 1 : n; - int i; + size_t max = n > strlen(s) + 1 ? strlen(s) + 1 : n; - for (i = 0; i < max; i++) + for (size_t i = 0; i < max; i++) d[i] = (char)s[i]; return d; @@ -210,13 +207,12 @@ char *strcat(char *d, const char *s) { char *p = d + strlen(d); - int sl = strlen(s); - int i; + size_t sl = strlen(s); - for (i = 0; i < sl; i++) + for (size_t i = 0; i < sl; i++) p[i] = s[i]; - p[i] = '\0'; + p[sl] = '\0'; return d; } @@ -231,15 +227,13 @@ char *strncat(char *d, const char *s, size_t n) { char *p = d + strlen(d); - int sl = strlen(s); - int max = n > sl ? sl : n; - // int max = n > strlen(s) ? strlen(s) : n; - int i; + size_t sl = strlen(s); + size_t max = n > sl ? sl : n; - for (i = 0; i < max; i++) + for (size_t i = 0; i < max; i++) p[i] = s[i]; - p[i] = '\0'; + p[max] = '\0'; return d; } @@ -253,17 +247,19 @@ */ size_t strlcat(char *d, const char *s, size_t n) { - int sl = strlen(s); - int dl = strlen(d); + size_t sl = strlen(s); + size_t dl = strlen(d); + + if (n <= dl + 1) + return sl + dl; char *p = d + dl; - int max = n > (sl + dl) ? sl : (n - dl - 1); - int i; + size_t max = n > (sl + dl) ? sl : (n - dl - 1); - for (i = 0; i < max; i++) + for (size_t i = 0; i < max; i++) p[i] = s[i]; - p[i] = '\0'; + p[max] = '\0'; return sl + dl; } @@ -316,7 +312,7 @@ */ char *strdup(const char *s) { - int n = strlen(s); + size_t n = strlen(s); char *p = malloc(n + 1); if (p != NULL) { @@ -336,11 +332,13 @@ */ char *strstr(const char *h, const char *n) { - int hn = strlen(h); - int nn = strlen(n); - int i; + size_t hn = strlen(h); + size_t nn = strlen(n); - for (i = 0; i <= hn - nn; i++) + if (hn < nn) + return NULL; + + for (size_t i = 0; i <= hn - nn; i++) if (!memcmp(&h[i], n, nn)) return (char *)&h[i]; @@ -532,11 +530,11 @@ */ size_t strspn(const char *s, const char *a) { - int i, j; - int al = strlen(a); + size_t i; + size_t al = strlen(a); for (i = 0; s[i] != 0; i++) { int found = 0; - for (j = 0; j < al; j++) { + for (size_t j = 0; j < al; j++) { if (s[i] == a[j]) { found = 1; break; @@ -556,11 +554,11 @@ */ size_t strcspn(const char *s, const char *a) { - int i, j; - int al = strlen(a); + size_t i; + size_t al = strlen(a); for (i = 0; s[i] != 0; i++) { int found = 0; - for (j = 0; j < al; j++) { + for (size_t j = 0; j < al; j++) { if (s[i] == a[j]) { found = 1; break; -- To view, visit https://review.coreboot.org/c/coreboot/+/33794 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5658b19f990de4596a602b36d9533b1ca96ad947 Gerrit-Change-Number: 33794 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

4 6

Change in ...coreboot[master]: libpayload/libc: Tidy utf16le_to_ascii
by Jacob Garber (Code Review) 23 Jul '19

23 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33793 Change subject: libpayload/libc: Tidy utf16le_to_ascii ...................................................................... libpayload/libc: Tidy utf16le_to_ascii - Constify the string argument - Change int to size_t, which is what xmalloc expects Change-Id: I8b5a13319ded4025f883760f2b6d4d7a9ad9fb8b Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/libpayload/include/string.h M payloads/libpayload/libc/string.c 2 files changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/33793/1 diff --git a/payloads/libpayload/include/string.h b/payloads/libpayload/include/string.h index 4aff0e8..52379a0 100644 --- a/payloads/libpayload/include/string.h +++ b/payloads/libpayload/include/string.h @@ -73,7 +73,7 @@ * @defgroup string Unicode functions * @{ */ -char *utf16le_to_ascii(uint16_t *utf16_string, int maxlen); +char *utf16le_to_ascii(const uint16_t *utf16_string, size_t maxlen); /** @} */ /** diff --git a/payloads/libpayload/libc/string.c b/payloads/libpayload/libc/string.c index 9a5a1ea..fd88a88 100644 --- a/payloads/libpayload/libc/string.c +++ b/payloads/libpayload/libc/string.c @@ -645,12 +645,11 @@ * @param maxlen Maximum possible length of the string in code points * @return Newly allocated ASCII string */ -char *utf16le_to_ascii(uint16_t *utf16_string, int maxlen) +char *utf16le_to_ascii(const uint16_t *utf16_string, size_t maxlen) { char *ascii_string = xmalloc(maxlen + 1); /* +1 for trailing \0 */ ascii_string[maxlen] = '\0'; - int i; - for (i = 0; i < maxlen; i++) { + for (size_t i = 0; i < maxlen; i++) { uint16_t wchar = utf16_string[i]; ascii_string[i] = wchar > 0x7f ? '?' : (char)wchar; } -- To view, visit https://review.coreboot.org/c/coreboot/+/33793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b5a13319ded4025f883760f2b6d4d7a9ad9fb8b Gerrit-Change-Number: 33793 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

3 2

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2019