coreboot-gerrit April 2019

coreboot-gerrit@coreboot.org

1 participants
1219 discussions

Change in ...coreboot[master]: sdm845: Add DSI clock support
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Sravan Kumar Deepala, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28013 to look at the new patch set (#35). Change subject: sdm845: Add DSI clock support ...................................................................... sdm845: Add DSI clock support Change-Id: I051cb1b2150399589427922bcf5c9d270674705a Signed-off-by: Rajashekar Alusa <arajashe(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/clock.c M src/soc/qualcomm/sdm845/include/soc/addressmap.h M src/soc/qualcomm/sdm845/include/soc/clock.h 3 files changed, 174 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/28013/35 -- To view, visit https://review.coreboot.org/c/coreboot/+/28013 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I051cb1b2150399589427922bcf5c9d270674705a Gerrit-Change-Number: 28013 Gerrit-PatchSet: 35 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sravan Kumar Deepala <sravank(a)qti-qualcomm.corp-partner.google.com> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Enable bl31
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Julius Werner, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29522 to look at the new patch set (#22). Change subject: sdm845: Enable bl31 ...................................................................... sdm845: Enable bl31 Change-Id: I4f01f873a4f24544c33aa0cd5914dbe0eca3ce8a Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/Kconfig M src/soc/qualcomm/sdm845/Makefile.inc 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/29522/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/29522 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f01f873a4f24544c33aa0cd5914dbe0eca3ce8a Gerrit-Change-Number: 29522 Gerrit-PatchSet: 22 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add GPIO IRQ APIs
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Taniya Das, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30003 to look at the new patch set (#16). Change subject: sdm845: Add GPIO IRQ APIs ...................................................................... sdm845: Add GPIO IRQ APIs Introduces new and required GPIO IRQ APIs in coreboot GPIO driver. Change-Id: I68f34e7bba17d9baad1db2bf025ba2db4afdfb58 Signed-off-by: Taniya Das <tdas(a)codeaurora.org> Signed-off-by: Shefali Jain <shefjain(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/gpio.c M src/soc/qualcomm/sdm845/i2c.c M src/soc/qualcomm/sdm845/include/soc/gpio.h M src/soc/qualcomm/sdm845/qspi.c 4 files changed, 95 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/30003/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/30003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68f34e7bba17d9baad1db2bf025ba2db4afdfb58 Gerrit-Change-Number: 30003 Gerrit-PatchSet: 16 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: Taniya Das <tdas(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: HACK sdm845 soc/qualcomm/clocks
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Julius Werner, David Dai, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29489 to look at the new patch set (#27). Change subject: HACK sdm845 soc/qualcomm/clocks ...................................................................... HACK sdm845 soc/qualcomm/clocks Hack patch to enable qup clock branches Change-Id: If34415ccc35f6e66a5c313890c9d062d7bb51f6b Signed-off-by: David Dai <daidavid1(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/clock.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/29489/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/29489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If34415ccc35f6e66a5c313890c9d062d7bb51f6b Gerrit-Change-Number: 29489 Gerrit-PatchSet: 27 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: David Dai <daidavid1(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add QUPv3 FW load & config
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Mukesh Savaliya, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25372 to look at the new patch set (#69). Change subject: sdm845: Add QUPv3 FW load & config ...................................................................... sdm845: Add QUPv3 FW load & config UART driver requires FW loading TEST=build Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org> --- M src/mainboard/google/cheza/Makefile.inc M src/mainboard/google/cheza/mainboard.c A src/mainboard/google/cheza/qupv3_config.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/bootblock.c A src/soc/qualcomm/sdm845/include/soc/qupv3_config.h A src/soc/qualcomm/sdm845/include/soc/qupv3_fw_config.h A src/soc/qualcomm/sdm845/qupv3_fw_config.c 8 files changed, 587 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/25372/69 -- To view, visit https://review.coreboot.org/c/coreboot/+/25372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Gerrit-Change-Number: 25372 Gerrit-PatchSet: 69 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add QCLib to RomStage to perform IP init
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Julius Werner, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25208 to look at the new patch set (#74). Change subject: sdm845: Add QCLib to RomStage to perform IP init ...................................................................... sdm845: Add QCLib to RomStage to perform IP init CB acts as I/O handler for QCLib (e.g. DDR training data) This interface allows bi-directional data flow between CB and QCLib Tested and working interfaces: DDR Training data QCLib serial console output DDR Information (base & size) limits cfg data TEST=build & run Change-Id: I073186674a1a593547d1ee1d15c7cd4fd8ad5bc1 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/mainboard/google/cheza/chromeos.fmd M src/mainboard/google/cheza/romstage.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/include/soc/memlayout.ld M src/soc/qualcomm/sdm845/include/soc/mmu.h M src/soc/qualcomm/sdm845/include/soc/symbols.h M src/soc/qualcomm/sdm845/mmu.c A src/soc/qualcomm/sdm845/qclib.c M src/soc/qualcomm/sdm845/soc.c 9 files changed, 86 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/25208/74 -- To view, visit https://review.coreboot.org/c/coreboot/+/25208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I073186674a1a593547d1ee1d15c7cd4fd8ad5bc1 Gerrit-Change-Number: 25208 Gerrit-PatchSet: 74 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Combine BB with QC-Sec for ROM boot
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25207 to look at the new patch set (#74). Change subject: sdm845: Combine BB with QC-Sec for ROM boot ...................................................................... sdm845: Combine BB with QC-Sec for ROM boot TEST=build & run Change-Id: I222a56f1c9b74856a1e1ff8132bab5e041672c5d Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/soc/qualcomm/ipq40xx/Kconfig M src/soc/qualcomm/ipq40xx/mbn_header.h M src/soc/qualcomm/ipq806x/Makefile.inc M src/soc/qualcomm/ipq806x/mbn_header.h R util/qualcomm/createxbl.py R util/qualcomm/ipqheader.py R util/qualcomm/mbn_tools.py R util/qualcomm/mbncat.py A util/qualcomm/qgpt.py 9 files changed, 276 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/25207/74 -- To view, visit https://review.coreboot.org/c/coreboot/+/25207 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I222a56f1c9b74856a1e1ff8132bab5e041672c5d Gerrit-Change-Number: 25207 Gerrit-PatchSet: 74 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add USB support on cheza platform
by T.Michael Turney (Code Review) 24 Apr '19

24 Apr '19

Hello T Michael Turney, Julius Werner, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, Ciluveru chandana kishori, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25213 to look at the new patch set (#69). Change subject: sdm845: Add USB support on cheza platform ...................................................................... sdm845: Add USB support on cheza platform This patch adds code to initialize two USB DWC3.0 controllers and its associated QUSB V2 10nm PHYs to the SDM845 SOC, and uses them to initialize USB3.0 on the cheza mainboard. Synopsis controller initialization and configuration sequences taken from USB 3.0 HPG chapter 2.2 and refer PHY HPG chapter 10.2 for QUSB phy programming. Includes Super speed mode support. TEST=USB keypad and mass-storage device enumeration tested with this patch Change-Id: I475a7757239acb8ef22a4d61afd59b304a7f0acc Signed-off-by: Chandana Kishori Chiluveru <cchiluve(a)codeaurora.org> --- M src/mainboard/google/cheza/mainboard.c M src/mainboard/google/cheza/romstage.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/include/soc/addressmap.h M src/soc/qualcomm/sdm845/include/soc/clock.h A src/soc/qualcomm/sdm845/include/soc/efuse.h A src/soc/qualcomm/sdm845/include/soc/usb.h A src/soc/qualcomm/sdm845/usb.c 8 files changed, 1,114 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/25213/69 -- To view, visit https://review.coreboot.org/c/coreboot/+/25213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I475a7757239acb8ef22a4d61afd59b304a7f0acc Gerrit-Change-Number: 25213 Gerrit-PatchSet: 69 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Ciluveru chandana kishori <cchiluve(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chandana Kishori Chiluveru <cchiluve(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: lenovo/x230: introduce FHD variant
by Christian Herzog (Code Review) 24 Apr '19

24 Apr '19

Christian Herzog has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28950 ) Change subject: lenovo/x230: introduce FHD variant ...................................................................... Patch Set 7: > Patch Set 7: > > > Patch Set 7: > > > > patchset 6 works for me on my x230 with a full hd display. even using qubes/xen :) > > just to make sure: with the current patchset you get graphics output before the kernel starts, right? if so, i'll merge this :) Hi all, new guy here. I ported patch set 7 to an X220 (nitrocaster FullHD mod + LP125WF2 SPB4) and managed to create a coreboot config that shows seabios output and works nicely in Linux (VGA BIOS dump needed). If you're interested, I'd be happy to create a PR and provide .config and all relevant information. cheers, -Christian -- To view, visit https://review.coreboot.org/c/coreboot/+/28950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0 Gerrit-Change-Number: 28950 Gerrit-PatchSet: 7 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Slindee Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Herzog Gerrit-CC: Holger Levsen <holger(a)layer-acht.org> Gerrit-CC: Kilian Neuner <cb(a)9-r.net> Gerrit-CC: Matthias Wiedhalm Gerrit-CC: Sergey Alirzaev <zl29ah(a)gmail.com> Gerrit-CC: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Comment-Date: Wed, 24 Apr 2019 20:24:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Add interface between CB & QCLib
by T Michael Turney (Code Review) 24 Apr '19

24 Apr '19

T Michael Turney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27360 ) Change subject: sdm845: Add interface between CB & QCLib ...................................................................... Patch Set 35: > Patch Set 35: > > (2 comments) > > > One comment from PS31 on 9.Nov.2018 is not addressed yet, regarding CONFIG_CBFS_PREFIX being part of #define for name, e.g. "/pmic". Please confirm, after reviewing latest patch that this is still desired change. > > Yes, I still think that would be a bit cleaner. After looking at how the whole codebase uses CONFIG_CBFS_PREFIX, this request would make sdm845 code different. In fact to fit in with the codebase, the #define for the name, e.g. pmic or aop should be removed... ./mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c:152: file_name = CONFIG_CBFS_PREFIX "/ssdt2.aml"; ./mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c:155: file_name = CONFIG_CBFS_PREFIX "/ssdt3.aml"; ./mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c:158: file_name = CONFIG_CBFS_PREFIX "/ssdt4.aml"; ./mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c:162: file_name = CONFIG_CBFS_PREFIX "/ssdt5.aml"; ./arch/arm64/arm_tf.c:47: struct prog bl31 = PROG_INIT(PROG_BL31, CONFIG_CBFS_PREFIX"/bl31"); ./arch/arm64/arm_tf.c:61: CONFIG_CBFS_PREFIX"/secure_os"); ./arch/x86/acpi.c:1143: CONFIG_CBFS_PREFIX "/dsdt.aml", ./arch/x86/acpi.c:1157: slic_file = cbfs_boot_map_with_leak(CONFIG_CBFS_PREFIX "/slic", ./arch/x86/postcar_loader.c:161: PROG_INIT(PROG_POSTCAR, CONFIG_CBFS_PREFIX "/postcar"); ./security/vboot/vboot_loader.c:98: CONFIG_CBFS_PREFIX "/verstage"); ./security/vboot/vboot_crtm.c:57: PROG_INIT(PROG_VERSTAGE, CONFIG_CBFS_PREFIX "/verstage"); ./security/vboot/vboot_crtm.c:59: PROG_INIT(PROG_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); ./security/vboot/vboot_crtm.c:111: CONFIG_CBFS_PREFIX "/romstage"); ./security/vboot/vboot_crtm.c:134: CONFIG_CBFS_PREFIX "/verstage"); ./lib/prog_loaders.c:56: PROG_INIT(PROG_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); ./lib/prog_loaders.c:129: PROG_INIT(PROG_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); ./lib/prog_loaders.c:171: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/payload"); ./lib/decompressor.c:29: ".incbin \"" __BUILD_DIR__ "/cbfs/" CONFIG_CBFS_PREFIX "/bootblock.lz4\"\n\t" ./soc/qualcomm/sdm845/aop_load_reset.c:31: PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/aop"); ./soc/qualcomm/sdm845/qclib.c:30: size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX PMIC_NAME, ./soc/qualcomm/sdm845/qclib.c:37: size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX DCB_NAME, ./soc/qualcomm/common/qclib.c:164: PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX QCSDI_NAME); ./soc/qualcomm/common/qclib.c:182: PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX QCLIB_NAME); ./soc/intel/baytrail/refcode.c:47: PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); ./soc/intel/broadwell/refcode.c:44: PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); -- To view, visit https://review.coreboot.org/c/coreboot/+/27360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d86f360d9e5f1a50f052ab99e821a587e091946 Gerrit-Change-Number: 27360 Gerrit-PatchSet: 35 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 24 Apr 2019 19:51:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2019