coreboot-gerrit March 2019

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Change in ...coreboot[master]: x86/smbios: Untangle system and board tables
by HAOUAS Elyes (Code Review) 16 Mar '19

16 Mar '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29477 ) Change subject: x86/smbios: Untangle system and board tables ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Gerrit-Change-Number: 29477 Gerrit-PatchSet: 9 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Sat, 16 Mar 2019 07:09:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: Revert "Documentation: Our coding style now allows 80 + 2*8 columns i...
by Julius Werner (Code Review) 16 Mar '19

16 Mar '19

Julius Werner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31915 Change subject: Revert "Documentation: Our coding style now allows 80 + 2*8 columns in a line" ...................................................................... Revert "Documentation: Our coding style now allows 80 + 2*8 columns in a line" This reverts commit b3a8cc54dbaf833c590a56f912209a5632b71f49. This change was submitted under the incorrect assumption that there was agreement on a coding style change. There wasn't, so while the issue is under discussion we should revert to the previous status quo. Change-Id: I37a5585764346af11a98bdf58c810dd3cf5bfe40 --- M Documentation/coding_style.md 1 file changed, 4 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/31915/1 diff --git a/Documentation/coding_style.md b/Documentation/coding_style.md index e034193..048b8e6 100644 --- a/Documentation/coding_style.md +++ b/Documentation/coding_style.md @@ -30,11 +30,6 @@ more than 3 levels of indentation, you're screwed anyway, and should fix your program. -Since most code in a file is indented at least 1 level, we account for -2 levels in addition to the 80 characters on the terminal under the -assumption that editors can scroll to the right, making an 80 characters -screen visible with little loss on the left end. - In short, 8-char indents make things easier to read, and have the added benefit of warning you when you're nesting your functions too deep. Heed that warning. @@ -85,11 +80,11 @@ Coding style is all about readability and maintainability using commonly available tools. -The limit on the length of lines is 96 columns (80 columns + 2 tab levels) -and this is a strongly preferred limit. +The limit on the length of lines is 80 columns and this is a strongly +preferred limit. -Statements longer than 96 columns will be broken into sensible chunks, -unless exceeding 96 columns significantly increases readability and does +Statements longer than 80 columns will be broken into sensible chunks, +unless exceeding 80 columns significantly increases readability and does not hide information. Descendants are always substantially shorter than the parent and are placed substantially to the right. The same applies to function headers with a long argument list. However, never break -- To view, visit https://review.coreboot.org/c/coreboot/+/31915 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37a5585764346af11a98bdf58c810dd3cf5bfe40 Gerrit-Change-Number: 31915 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: lint/clang-format: set to 96 chars per line
by Patrick Georgi (Code Review) 16 Mar '19

16 Mar '19

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31651 Change subject: lint/clang-format: set to 96 chars per line ...................................................................... lint/clang-format: set to 96 chars per line 80 chars + 2 tabs was the compromise we got to in the last round of discussion. Change-Id: I9293a69d1bea900da36501cde512004d0695ad37 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M .clang-format M util/lint/lint-007-checkpatch 2 files changed, 5 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/31651/1 diff --git a/.clang-format b/.clang-format index d853f50..5c8aa3c 100644 --- a/.clang-format +++ b/.clang-format @@ -7,7 +7,7 @@ IndentCaseLabels: false SortIncludes: false ContinuationIndentWidth: 8 -ColumnLimit: 0 +ColumnLimit: 96 AlwaysBreakBeforeMultilineStrings: true AllowShortLoopsOnASingleLine: false AllowShortFunctionsOnASingleLine: false diff --git a/util/lint/lint-007-checkpatch b/util/lint/lint-007-checkpatch index afa593e..a7b63e8 100755 --- a/util/lint/lint-007-checkpatch +++ b/util/lint/lint-007-checkpatch @@ -28,6 +28,8 @@ ^src/vendorcode\|\ ^Documentation" +opts="--max-line-length 96" + # default: test src and util if [ "$1" = "" ]; then INCLUDED_DIRS="src util" @@ -35,7 +37,7 @@ elif [ "$1" = "diff" ]; then args=$( echo $EXCLUDED_DIRS | \ sed -e 's,\\|, ,g' -e 's,\^,--exclude=,g' ) - util/lint/checkpatch.pl --quiet --no-signoff $args - + util/lint/checkpatch.pl --quiet --no-signoff $opts $args - exit $? # Space separated list of directories to test else @@ -49,5 +51,5 @@ grep -v $EXCLUDED_DIRS ) for FILE in $FILELIST; do - util/lint/checkpatch.pl --show-types --file --quiet "$FILE" + util/lint/checkpatch.pl --show-types --file --quiet $opts "$FILE" done -- To view, visit https://review.coreboot.org/c/coreboot/+/31651 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9293a69d1bea900da36501cde512004d0695ad37 Gerrit-Change-Number: 31651 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: drivers/tpm: remove initialization call from Intel FSP2.0
by Joel Kitching (Code Review) 16 Mar '19

16 Mar '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31837 Change subject: drivers/tpm: remove initialization call from Intel FSP2.0 ...................................................................... drivers/tpm: remove initialization call from Intel FSP2.0 Remove extraneous call to tpm_setup from Intel FSP memory initialization. * For CONFIG_VBOOT=n devices, src/drivers/tpm/tpm.c takes care of initializing TPM (see Kconfig option TPM_INIT). * For CONFIG_VBOOT=y devices, TPM will be initialized whenever verstage is executed, depending on how the device is configured (VBOOT_STARTS_IN_BOOTBLOCK or VBOOT_STARTS_IN_ROMSTAGE). See bug for more information: https://bugs.chromium.org/p/chromium/issues/detail?id=940377 BUG=chromium:940377 TEST=util/lint/checkpatch.pl -g origin/master..HEAD TEST=util/abuild/abuild -B -e -y -c 50 -p none -x TEST=make clean && make test-abuild BRANCH=none Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6 Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/31837/1 diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 2002c11..04af4a0 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -92,14 +92,6 @@ /* Create romstage handof information */ romstage_handoff_init(s3wake); - - /* - * Initialize the TPM, unless the TPM was already initialized - * in verstage and used to verify romstage. - */ - if ((IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) && - !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) - tpm_setup(s3wake); } static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version) -- To view, visit https://review.coreboot.org/c/coreboot/+/31837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6 Gerrit-Change-Number: 31837 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/cannonlake: Fix GEN_PMCON bit checks
by Furquan Shaikh (Code Review) 16 Mar '19

16 Mar '19

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31908 Change subject: soc/intel/cannonlake: Fix GEN_PMCON bit checks ...................................................................... soc/intel/cannonlake: Fix GEN_PMCON bit checks CNL PCH has PWR_FLR, SUS_PWR_FLR and HOST_RST_STS bits in GEN_PMCON_A and so this change updates the check for these bits to use GEN_PMCON_A instead of GEN_PMCON_B. BUG=b:128482282 TEST=Verified that prev_sleep_state is reported correctly when booting from S5. Change-Id: I75780a004ded8f282ffb3feb0cdc76233ebfd4f2 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/cannonlake/elog.c M src/soc/intel/cannonlake/pmutil.c 2 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/31908/1 diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c index 5319cff..2ec6b41 100644 --- a/src/soc/intel/cannonlake/elog.c +++ b/src/soc/intel/cannonlake/elog.c @@ -76,11 +76,11 @@ elog_add_event(ELOG_TYPE_THERM_TRIP); /* PWR_FLR Power Failure */ - if (ps->gen_pmcon_b & PWR_FLR) + if (ps->gen_pmcon_a & PWR_FLR) elog_add_event(ELOG_TYPE_POWER_FAIL); /* SUS Well Power Failure */ - if (ps->gen_pmcon_b & SUS_PWR_FLR) + if (ps->gen_pmcon_a & SUS_PWR_FLR) elog_add_event(ELOG_TYPE_SUS_POWER_FAIL); /* TCO Timeout */ @@ -97,7 +97,7 @@ elog_add_event(ELOG_TYPE_RTC_RESET); /* Host Reset Status */ - if (ps->gen_pmcon_b & HOST_RST_STS) + if (ps->gen_pmcon_a & HOST_RST_STS) elog_add_event(ELOG_TYPE_SYSTEM_RESET); /* ACPI Wake Event */ diff --git a/src/soc/intel/cannonlake/pmutil.c b/src/soc/intel/cannonlake/pmutil.c index 16c4db6..8c166cf 100644 --- a/src/soc/intel/cannonlake/pmutil.c +++ b/src/soc/intel/cannonlake/pmutil.c @@ -217,7 +217,7 @@ * S5 because the PCH does not set the WAK_STS bit when waking * from a true G3 state. */ - if (ps->gen_pmcon_b & (PWR_FLR | SUS_PWR_FLR)) + if (ps->gen_pmcon_a & (PWR_FLR | SUS_PWR_FLR)) prev_sleep_state = ACPI_S5; /* @@ -233,7 +233,7 @@ if (!deep_s3_enabled()) mask |= SUS_PWR_FLR; - if (ps->gen_pmcon_b & mask) + if (ps->gen_pmcon_a & mask) prev_sleep_state = ACPI_S5; } -- To view, visit https://review.coreboot.org/c/coreboot/+/31908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I75780a004ded8f282ffb3feb0cdc76233ebfd4f2 Gerrit-Change-Number: 31908 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: device/pci_ops: Rewrite pci_moving() with pci_devfn_t
by Kyösti Mälkki (Code Review) 16 Mar '19

16 Mar '19

Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31756 ) Change subject: device/pci_ops: Rewrite pci_moving() with pci_devfn_t ...................................................................... Abandoned So tied to .read_resources I see no point supporting these without resource allocator. -- To view, visit https://review.coreboot.org/c/coreboot/+/31756 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I83f5c9ffb6855b42cf9d246d7af9aed1d400066f Gerrit-Change-Number: 31756 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: x86/smbios: Untangle system and board tables
by Richard Spiegel (Code Review) 16 Mar '19

16 Mar '19

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29477 ) Change subject: x86/smbios: Untangle system and board tables ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Gerrit-Change-Number: 29477 Gerrit-PatchSet: 9 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 15 Mar 2019 19:01:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: x86/smbios: Untangle system and board tables
by Nico Huber (Code Review) 16 Mar '19

16 Mar '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29477 ) Change subject: x86/smbios: Untangle system and board tables ...................................................................... Uploaded patch set 9. (1 comment) https://review.coreboot.org/#/c/29477/8/src/drivers/i2c/at24rf08c/Kconfig File src/drivers/i2c/at24rf08c/Kconfig: https://review.coreboot.org/#/c/29477/8/src/drivers/i2c/at24rf08c/Kconfig@1 PS8, Line 1: DRIVERS_I2C_AT24RF08C > Right, this might just be a cosmetic change. I'll check […] Seems unneeded and incomplete (I never updated the Makefile.inc). I've droped the changes to this file. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/29477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Gerrit-Change-Number: 29477 Gerrit-PatchSet: 9 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 15 Mar 2019 17:31:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: x86/smbios: Untangle system and board tables
by Nico Huber (Code Review) 16 Mar '19

16 Mar '19

Hello HAOUAS Elyes, Piotr Król, Patrick Rudolph, Richard Spiegel, Thomas Heijligen, Lijian Zhao, build bot (Jenkins), Patrick Georgi, Michał Żygowski, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29477 to look at the new patch set (#9). Change subject: x86/smbios: Untangle system and board tables ...................................................................... x86/smbios: Untangle system and board tables We were used to set the same values in the system and board tables. We'll keep the mainboard values as defaults for the system tables, so nothing changes unless somebody overrides the system table hooks. Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M src/Kconfig M src/arch/x86/smbios.c M src/drivers/i2c/at24rf08c/lenovo_serials.c M src/include/smbios.h M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/hatch/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/rammus/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/sarien/sku.c M src/mainboard/pcengines/apu1/mainboard.c M src/mainboard/pcengines/apu2/mainboard.c M src/mainboard/scaleway/tagada/ramstage.c 17 files changed, 65 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/29477/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/29477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Gerrit-Change-Number: 29477 Gerrit-PatchSet: 9 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: x86/smbios: Untangle system and board tables
by Nico Huber (Code Review) 16 Mar '19

16 Mar '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29477 ) Change subject: x86/smbios: Untangle system and board tables ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/#/c/29477/8/src/drivers/i2c/at24rf08c/Kconfig File src/drivers/i2c/at24rf08c/Kconfig: https://review.coreboot.org/#/c/29477/8/src/drivers/i2c/at24rf08c/Kconfig@1 PS8, Line 1: DRIVERS_I2C_AT24RF08C > I don't see this new config being used. […] Right, this might just be a cosmetic change. I'll check if it's needed (don't remember off-hand). -- To view, visit https://review.coreboot.org/c/coreboot/+/29477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Gerrit-Change-Number: 29477 Gerrit-PatchSet: 8 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 15 Mar 2019 17:20:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2019