coreboot-gerrit March 2019

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Change in ...coreboot[master]: src: Drop unused 'iclude <types.h>'
by HAOUAS Elyes (Code Review) 29 May '19

29 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31892 Change subject: src: Drop unused 'iclude <types.h>' ...................................................................... src: Drop unused 'iclude <types.h>' Use stdint.h when appropriate. Change-Id: I57aead27806e307b9827fc7ee2cd663f12ee6e5e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/arm/armv7/exception.c M src/arch/arm/include/arch/clock.h M src/arch/arm/include/armv7.h M src/arch/arm64/armv8/exception.c M src/arch/arm64/include/arm_tf.h M src/arch/arm64/include/arm_tf_temp.h M src/arch/arm64/include/armv8/arch/mmu.h M src/arch/mips/include/arch/mmio.h M src/arch/x86/gdt.c M src/cpu/allwinner/a10/bootblock.c M src/cpu/allwinner/a10/chip.h M src/cpu/allwinner/a10/clock.h M src/cpu/allwinner/a10/dramc.h M src/cpu/allwinner/a10/gpio.h M src/cpu/allwinner/a10/timer.h M src/cpu/allwinner/a10/twi.c M src/cpu/allwinner/a10/twi.h M src/cpu/allwinner/a10/uart.h M src/cpu/allwinner/a10/uart_console.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/powernow_acpi.c M src/cpu/intel/fsp_model_406dx/acpi.c M src/cpu/intel/haswell/acpi.c M src/cpu/intel/haswell/smmrelocate.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/cpu/intel/model_206ax/common.c M src/cpu/intel/smm/gen1/smmrelocate.c M src/cpu/intel/speedstep/acpi.c M src/cpu/intel/speedstep/speedstep.c M src/cpu/ti/am335x/bootblock.c M src/cpu/ti/am335x/uart.c M src/device/dram/ddr2.c M src/device/dram/ddr3.c M src/device/oprom/yabel/biosemu.c M src/device/oprom/yabel/compat/functions.c M src/device/oprom/yabel/debug.h M src/device/oprom/yabel/device.h M src/device/oprom/yabel/interrupt.c M src/device/oprom/yabel/io.c M src/device/oprom/yabel/io.h M src/device/oprom/yabel/mem.c M src/device/oprom/yabel/mem.h M src/device/oprom/yabel/pmm.h M src/device/oprom/yabel/vbe.c M src/drivers/i2c/at24rf08c/at24rf08c.c M src/drivers/i2c/at24rf08c/lenovo_serials.c M src/drivers/i2c/pca9538/pca9538.h M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tpm.c M src/drivers/intel/fsp1_0/fsp_util.c M src/drivers/intel/fsp1_0/hob.c M src/drivers/intel/fsp1_1/include/fsp/memmap.h M src/drivers/intel/fsp2_0/graphics.c M src/drivers/intel/fsp2_0/include/fsp/memmap.h M src/drivers/intel/fsp2_0/include/fsp/memory_init.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/fsp2_0/silicon_init.c M src/drivers/intel/fsp2_0/temp_ram_exit.c M src/drivers/intel/fsp2_0/util.c M src/drivers/intel/gma/intel_ddi.c M src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c M src/drivers/lenovo/hybrid_graphics/romstage.c M src/drivers/lenovo/wacom.c M src/drivers/net/atl1e.c M src/drivers/net/r8168.c M src/drivers/pc80/rtc/mc146818rtc.c M src/drivers/ti/tps65090/tps65090.c M src/drivers/tpm/tpm.c M src/drivers/uart/pl011.h M src/drivers/uart/util.c M src/drivers/usb/ehci_debug.h M src/drivers/xpowers/axp209/axp209.c M src/drivers/xpowers/axp209/chip.h M src/ec/lenovo/h8/bluetooth.c M src/ec/lenovo/h8/h8.c M src/ec/lenovo/h8/wwan.c M src/ec/lenovo/pmh7/pmh7.c M src/include/bootblock_common.h M src/include/cpu/x86/msr.h M src/include/cpu/x86/smm.h M src/include/device/azalia_device.h M src/include/gpio.h M src/include/lib.h M src/include/smbios.h M src/include/spi_bitbang.h M src/include/symbols.h M src/include/timer.h M src/lib/libgcc.c M src/lib/trace.c M src/mainboard/adi/rcc-dff/acpi_tables.c M src/mainboard/asus/kcma-d8/romstage.c M src/mainboard/asus/kgpe-d16/romstage.c M src/mainboard/asus/p5gc-mx/acpi_tables.c M src/mainboard/cubietech/cubieboard/romstage.c M src/mainboard/emulation/qemu-i440fx/acpi_tables.c M src/mainboard/emulation/qemu-power8/uart.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/emulation/qemu-riscv/uart.c M src/mainboard/emulation/spike-riscv/uart.c M src/mainboard/esd/atom15/acpi_tables.c M src/mainboard/foxconn/d41s/acpi_tables.c M src/mainboard/getac/p470/acpi_tables.c M src/mainboard/google/auron/ec.c M src/mainboard/google/auron/variants/buddy/variant.c M src/mainboard/google/beltino/acpi_tables.c M src/mainboard/google/beltino/lan.c M src/mainboard/google/beltino/mainboard.c M src/mainboard/google/beltino/variants/mccloud/led.c M src/mainboard/google/beltino/variants/monroe/led.c M src/mainboard/google/beltino/variants/panther/led.c M src/mainboard/google/beltino/variants/tricky/led.c M src/mainboard/google/beltino/variants/zako/led.c M src/mainboard/google/butterfly/mainboard.c M src/mainboard/google/cyan/ec.c M src/mainboard/google/daisy/romstage.c M src/mainboard/google/gale/cdp.c M src/mainboard/google/gale/mmu.h M src/mainboard/google/gru/sdram_configs.c M src/mainboard/google/jecht/acpi_tables.c M src/mainboard/google/jecht/lan.c M src/mainboard/google/jecht/led.c M src/mainboard/google/link/ec.c M src/mainboard/google/link/i915.c M src/mainboard/google/link/mainboard.c M src/mainboard/google/parrot/acpi_tables.c M src/mainboard/google/parrot/ec.c M src/mainboard/google/parrot/mainboard.c M src/mainboard/google/peach_pit/romstage.c M src/mainboard/google/rambi/acpi_tables.c M src/mainboard/google/rambi/ec.c M src/mainboard/google/rambi/mainboard.c M src/mainboard/google/rambi/variants/ninja/lan.c M src/mainboard/google/rambi/variants/sumo/lan.c M src/mainboard/google/slippy/acpi_tables.c M src/mainboard/google/slippy/ec.c M src/mainboard/google/slippy/mainboard.c M src/mainboard/google/storm/cdp.c M src/mainboard/google/storm/mmu.h M src/mainboard/google/stout/acpi_tables.c M src/mainboard/google/stout/ec.c M src/mainboard/google/stout/mainboard.c M src/mainboard/google/veyron/romstage.c M src/mainboard/google/veyron/sdram_configs.c M src/mainboard/google/veyron_mickey/romstage.c M src/mainboard/google/veyron_mickey/sdram_configs.c M src/mainboard/google/veyron_rialto/romstage.c M src/mainboard/google/veyron_rialto/sdram_configs.c M src/mainboard/ibase/mb899/superio_hwm.c M src/mainboard/intel/baskingridge/acpi_tables.c M src/mainboard/intel/baskingridge/mainboard.c M src/mainboard/intel/bayleybay_fsp/acpi_tables.c M src/mainboard/intel/bayleybay_fsp/mainboard.c M src/mainboard/intel/camelbackmountain_fsp/mainboard.c M src/mainboard/intel/d510mo/acpi_tables.c M src/mainboard/intel/dcp847ske/smihandler.c M src/mainboard/intel/emeraldlake2/acpi_tables.c M src/mainboard/intel/emeraldlake2/ec.c M src/mainboard/intel/emeraldlake2/mainboard.c M src/mainboard/intel/harcuvar/acpi_tables.c M src/mainboard/intel/littleplains/acpi_tables.c M src/mainboard/intel/minnowmax/acpi_tables.c M src/mainboard/intel/mohonpeak/acpi_tables.c M src/mainboard/intel/strago/acpi_tables.c M src/mainboard/intel/strago/ec.c M src/mainboard/intel/wtm2/acpi_tables.c M src/mainboard/intel/wtm2/mainboard.c M src/mainboard/kontron/986lcd-m/mainboard.c M src/mainboard/lenovo/t430s/variants/t430s/romstage.c M src/mainboard/roda/rk886ex/m3885.c M src/mainboard/samsung/lumpy/acpi_tables.c M src/mainboard/samsung/lumpy/ec.c M src/mainboard/samsung/lumpy/mainboard.c M src/mainboard/samsung/stumpy/acpi_tables.c M src/mainboard/siemens/mc_tcu3/acpi_tables.c M src/mainboard/siemens/mc_tcu3/ptn3460.c M src/mainboard/ti/beaglebone/bootblock.c M src/mainboard/ti/beaglebone/romstage.c M src/northbridge/amd/amdfam10/link_control.c M src/northbridge/amd/amdfam10/misc_control.c M src/northbridge/amd/amdfam10/northbridge.c M src/northbridge/amd/amdht/h3finit.c M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c M src/northbridge/amd/amdmct/mct_ddr3/s3utils.c M src/northbridge/amd/amdmct/wrappers/mcti_d.c M src/northbridge/intel/fsp_rangeley/acpi.c M src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/early_reset.c M src/northbridge/intel/gm45/gma.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/gma.c M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/gma.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/early_init.c M src/northbridge/intel/sandybridge/gma.c M src/northbridge/intel/sandybridge/raminit.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/gma.c M src/northbridge/intel/x4x/raminit.c M src/security/tpm/tss.h M src/security/tpm/tss/tcg-2.0/tss_structures.h M src/security/vboot/antirollback.h M src/security/vboot/vbnv.c M src/security/vboot/vbnv.h M src/security/vboot/vbnv_cmos.c M src/security/vboot/vbnv_ec.c M src/security/vboot/vboot_crtm.h M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/stoneyridge/include/soc/northbridge.h M src/soc/amd/stoneyridge/southbridge.c M src/soc/cavium/cn81xx/cpu.c M src/soc/cavium/cn81xx/include/soc/clock.h M src/soc/cavium/cn81xx/include/soc/gpio.h M src/soc/cavium/cn81xx/include/soc/sdram.h M src/soc/cavium/cn81xx/include/soc/soc.h M src/soc/cavium/cn81xx/include/soc/timer.h M src/soc/cavium/cn81xx/include/soc/twsi.h M src/soc/cavium/cn81xx/include/soc/uart.h M src/soc/intel/apollolake/graphics.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/gfx.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/include/soc/pei_data.h M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/igd.c M src/soc/intel/broadwell/include/soc/pei_data.h M src/soc/intel/broadwell/smihandler.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/graphics.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/gpio/gpio.c M src/soc/intel/common/block/include/intelblocks/gpio.h M src/soc/intel/common/vbt.h M src/soc/intel/fsp_baytrail/acpi.c M src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c M src/soc/intel/fsp_broadwell_de/smihandler.c M src/soc/intel/fsp_broadwell_de/smmrelocate.c M src/soc/intel/icelake/graphics.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/quark/include/soc/pei_wrapper.h M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/graphics.c M src/soc/intel/skylake/include/soc/pei_data.h M src/soc/intel/skylake/smmrelocate.c M src/soc/mediatek/common/include/soc/timer.h M src/soc/mediatek/common/pll.c M src/soc/mediatek/mt8173/ddp.c M src/soc/mediatek/mt8173/gpio.c M src/soc/mediatek/mt8173/include/soc/infracfg.h M src/soc/mediatek/mt8173/include/soc/mipi.h M src/soc/mediatek/mt8173/include/soc/mt6391.h M src/soc/mediatek/mt8173/include/soc/pericfg.h M src/soc/mediatek/mt8173/include/soc/pmic_wrap.h M src/soc/mediatek/mt8173/mt6391.c M src/soc/mediatek/mt8173/pll.c M src/soc/mediatek/mt8173/rtc.c M src/soc/mediatek/mt8183/include/soc/dramc_register.h M src/soc/mediatek/mt8183/include/soc/emi.h M src/soc/mediatek/mt8183/include/soc/gpio.h M src/soc/mediatek/mt8183/include/soc/infracfg.h M src/soc/mediatek/mt8183/include/soc/mcucfg.h M src/soc/mediatek/mt8183/include/soc/pll.h M src/soc/mediatek/mt8183/include/soc/pmic_wrap.h M src/soc/mediatek/mt8183/include/soc/smi.h M src/soc/mediatek/mt8183/include/soc/spm.h M src/soc/nvidia/tegra/pwm.h M src/soc/nvidia/tegra210/dsi.c M src/soc/nvidia/tegra210/include/soc/dma.h M src/soc/nvidia/tegra210/mipi-phy.c M src/soc/nvidia/tegra210/spi.c M src/soc/qualcomm/ipq40xx/include/soc/cdp.h M src/soc/qualcomm/ipq40xx/include/soc/clock.h M src/soc/qualcomm/ipq40xx/include/soc/gpio.h M src/soc/qualcomm/ipq40xx/include/soc/soc_services.h M src/soc/qualcomm/ipq40xx/include/soc/usbl_if.h M src/soc/qualcomm/ipq40xx/mbn_header.h M src/soc/qualcomm/ipq806x/include/soc/cdp.h M src/soc/qualcomm/ipq806x/include/soc/clock.h M src/soc/qualcomm/ipq806x/include/soc/gpio.h M src/soc/qualcomm/ipq806x/include/soc/soc_services.h M src/soc/qualcomm/ipq806x/include/soc/usbl_if.h M src/soc/qualcomm/ipq806x/mbn_header.h M src/soc/qualcomm/sdm845/gpio.c M src/soc/qualcomm/sdm845/include/soc/clock.h M src/soc/qualcomm/sdm845/include/soc/gpio.h M src/soc/qualcomm/sdm845/include/soc/symbols.h M src/soc/qualcomm/sdm845/uart_bitbang.c M src/soc/rockchip/common/gpio.c M src/soc/rockchip/common/include/soc/gpio.h M src/soc/rockchip/rk3288/crypto.c M src/soc/rockchip/rk3288/include/soc/clock.h M src/soc/rockchip/rk3288/include/soc/grf.h M src/soc/rockchip/rk3288/include/soc/hdmi.h M src/soc/rockchip/rk3288/sdram.c M src/soc/rockchip/rk3399/include/soc/clock.h M src/soc/rockchip/rk3399/include/soc/grf.h M src/soc/rockchip/rk3399/include/soc/mipi.h M src/soc/rockchip/rk3399/include/soc/sdram.h M src/soc/rockchip/rk3399/mipi.c M src/soc/rockchip/rk3399/sdram.c M src/soc/samsung/exynos5250/gpio.c M src/soc/samsung/exynos5250/uart.c M src/soc/samsung/exynos5420/smp.c M src/soc/samsung/exynos5420/uart.c M src/soc/sifive/fu540/include/soc/sdram.h M src/southbridge/amd/pi/hudson/gpio.h M src/southbridge/amd/pi/hudson/hudson.c M src/southbridge/amd/pi/hudson/lpc.c M src/southbridge/amd/rs780/early_setup.c M src/southbridge/amd/sb700/early_setup.c M src/southbridge/amd/sb700/ide.c M src/southbridge/amd/sb700/sata.c M src/southbridge/amd/sb700/usb.c M src/southbridge/intel/bd82x6x/sata.c M src/southbridge/intel/bd82x6x/smihandler.c M src/southbridge/intel/common/pmutil.c M src/southbridge/intel/common/smihandler.c M src/southbridge/intel/i82801dx/smihandler.c M src/southbridge/intel/i82801gx/smihandler.c M src/southbridge/intel/i82801ix/sata.c M src/southbridge/intel/i82801ix/smihandler.c M src/southbridge/intel/i82801jx/sata.c M src/southbridge/intel/i82801jx/smihandler.c M src/southbridge/intel/ibexpeak/sata.c M src/southbridge/intel/ibexpeak/smihandler.c M src/southbridge/intel/lynxpoint/acpi.c M src/southbridge/intel/lynxpoint/smihandler.c M src/superio/ite/it8720f/superio.c 342 files changed, 163 insertions(+), 303 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/31892/1 diff --git a/src/arch/arm/armv7/exception.c b/src/arch/arm/armv7/exception.c index 4fac0bc..882193e 100644 --- a/src/arch/arm/armv7/exception.c +++ b/src/arch/arm/armv7/exception.c @@ -28,7 +28,6 @@ */ #include <stdint.h> -#include <types.h> #include <arch/cache.h> #include <arch/exception.h> #include <console/console.h> diff --git a/src/arch/arm/include/arch/clock.h b/src/arch/arm/include/arch/clock.h index 77d09d8..4a4c5b1 100644 --- a/src/arch/arm/include/arch/clock.h +++ b/src/arch/arm/include/arch/clock.h @@ -16,7 +16,7 @@ #ifndef __ARM_CLOCK_H_ #define __ARM_CLOCK_H_ -#include <types.h> +#include <stdint.h> void set_cntfrq(uint32_t); diff --git a/src/arch/arm/include/armv7.h b/src/arch/arm/include/armv7.h index bec7fd7..f652833 100644 --- a/src/arch/arm/include/armv7.h +++ b/src/arch/arm/include/armv7.h @@ -15,7 +15,6 @@ */ #ifndef ARMV7_H #define ARMV7_H -#include <types.h> /* Cortex-A9 revisions */ #define MIDR_CORTEX_A9_R0P1 0x410FC091 diff --git a/src/arch/arm64/armv8/exception.c b/src/arch/arm64/armv8/exception.c index 58a3523..d369c7b 100644 --- a/src/arch/arm64/armv8/exception.c +++ b/src/arch/arm64/armv8/exception.c @@ -28,7 +28,6 @@ */ #include <stdint.h> -#include <types.h> #include <arch/barrier.h> #include <arch/cache.h> #include <arch/exception.h> diff --git a/src/arch/arm64/include/arm_tf.h b/src/arch/arm64/include/arm_tf.h index ea5a0f4..6e9b52d 100644 --- a/src/arch/arm64/include/arm_tf.h +++ b/src/arch/arm64/include/arm_tf.h @@ -16,8 +16,6 @@ #ifndef __ARM_TF_H__ #define __ARM_TF_H__ -#include <types.h> - /* TODO: Pull in directly from ARM TF once its headers have been reorganized. */ #include <arm_tf_temp.h> diff --git a/src/arch/arm64/include/arm_tf_temp.h b/src/arch/arm64/include/arm_tf_temp.h index 8db5dcb..c0c1a24 100644 --- a/src/arch/arm64/include/arm_tf_temp.h +++ b/src/arch/arm64/include/arm_tf_temp.h @@ -31,7 +31,7 @@ #ifndef __ARM_TF_TEMP_H__ #define __ARM_TF_TEMP_H__ -#include <types.h> +#include <stdint.h> /* * Code temporarily copied from arm-trusted-firmware/include/common/bl_common.h, diff --git a/src/arch/arm64/include/armv8/arch/mmu.h b/src/arch/arm64/include/armv8/arch/mmu.h index 6c83749..573954f 100644 --- a/src/arch/arm64/include/armv8/arch/mmu.h +++ b/src/arch/arm64/include/armv8/arch/mmu.h @@ -16,7 +16,7 @@ #ifndef __ARCH_ARM64_MMU_H__ #define __ARCH_ARM64_MMU_H__ -#include <types.h> +#include <stdint.h> /* Memory attributes for mmap regions * These attributes act as tag values for memrange regions diff --git a/src/arch/mips/include/arch/mmio.h b/src/arch/mips/include/arch/mmio.h index 27a4944..40ffa11 100644 --- a/src/arch/mips/include/arch/mmio.h +++ b/src/arch/mips/include/arch/mmio.h @@ -20,7 +20,7 @@ #ifndef __ARCH_MMIO_H__ #define __ARCH_MMIO_H__ -#include <types.h> +#include <stdint.h> #include <arch/cache.h> #include <endian.h> diff --git a/src/arch/x86/gdt.c b/src/arch/x86/gdt.c index c9aec6d..285b124 100644 --- a/src/arch/x86/gdt.c +++ b/src/arch/x86/gdt.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/cpu/allwinner/a10/bootblock.c b/src/cpu/allwinner/a10/bootblock.c index 471104b..d4aa630 100644 --- a/src/cpu/allwinner/a10/bootblock.c +++ b/src/cpu/allwinner/a10/bootblock.c @@ -18,7 +18,7 @@ * */ -#include <types.h> +#include <stdint.h> #include <arch/cache.h> #include <bootblock_common.h> diff --git a/src/cpu/allwinner/a10/chip.h b/src/cpu/allwinner/a10/chip.h index af419ea..7c531b9 100644 --- a/src/cpu/allwinner/a10/chip.h +++ b/src/cpu/allwinner/a10/chip.h @@ -17,7 +17,5 @@ * */ -#include <types.h> - struct cpu_allwinner_a10_config { }; diff --git a/src/cpu/allwinner/a10/clock.h b/src/cpu/allwinner/a10/clock.h index 110a6f8..03d52b4 100644 --- a/src/cpu/allwinner/a10/clock.h +++ b/src/cpu/allwinner/a10/clock.h @@ -22,7 +22,6 @@ #define CPU_ALLWINNER_A10_CLOCK_H #include "memmap.h" -#include <types.h> /* CPU_AHB_APB0 config values */ #define CPU_CLK_SRC_MASK (3 << 16) diff --git a/src/cpu/allwinner/a10/dramc.h b/src/cpu/allwinner/a10/dramc.h index fe50acd..dc408fa 100644 --- a/src/cpu/allwinner/a10/dramc.h +++ b/src/cpu/allwinner/a10/dramc.h @@ -25,8 +25,6 @@ #ifndef CPU_ALLWINNER_A10_DRAMC_H #define CPU_ALLWINNER_A10_DRAMC_H -#include <types.h> - #define DRAM_CCR_COMMAND_RATE_1T (0x1 << 5) #define DRAM_CCR_DQS_GATE (0x1 << 14) #define DRAM_CCR_DQS_DRIFT_COMP (0x1 << 17) diff --git a/src/cpu/allwinner/a10/gpio.h b/src/cpu/allwinner/a10/gpio.h index c05122f..e10cfc7 100644 --- a/src/cpu/allwinner/a10/gpio.h +++ b/src/cpu/allwinner/a10/gpio.h @@ -18,8 +18,6 @@ #ifndef __CPU_ALLWINNER_A10_PINMUX_H #define __CPU_ALLWINNER_A10_PINMUX_H -#include <types.h> - #define GPIO_BASE 0x01C20800 #define GPA 0 diff --git a/src/cpu/allwinner/a10/timer.h b/src/cpu/allwinner/a10/timer.h index b7658da..dd2be3a 100644 --- a/src/cpu/allwinner/a10/timer.h +++ b/src/cpu/allwinner/a10/timer.h @@ -22,7 +22,6 @@ #define CPU_ALLWINNER_A10_TIMER_H #include "memmap.h" -#include <types.h> /* TMRx_CTRL values */ #define TIMER_CTRL_MODE_SINGLE (1 << 7) diff --git a/src/cpu/allwinner/a10/twi.c b/src/cpu/allwinner/a10/twi.c index 6e7f9e2..de0044d 100644 --- a/src/cpu/allwinner/a10/twi.c +++ b/src/cpu/allwinner/a10/twi.c @@ -22,7 +22,7 @@ #include "memmap.h" #include "twi.h" - +#include <types.h> #include <device/mmio.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/cpu/allwinner/a10/twi.h b/src/cpu/allwinner/a10/twi.h index 833b1dc..2656bd9 100644 --- a/src/cpu/allwinner/a10/twi.h +++ b/src/cpu/allwinner/a10/twi.h @@ -19,8 +19,6 @@ #ifndef CPU_ALLWINNER_A10_TWI_H #define CPU_ALLWINNER_A10_TWI_H -#include <types.h> - /* TWI_CTL values */ #define TWI_CTL_INT_EN (1 << 7) #define TWI_CTL_BUS_EN (1 << 6) diff --git a/src/cpu/allwinner/a10/uart.h b/src/cpu/allwinner/a10/uart.h index a57fc9c..610237a 100644 --- a/src/cpu/allwinner/a10/uart.h +++ b/src/cpu/allwinner/a10/uart.h @@ -25,8 +25,6 @@ #ifndef CPU_ALLWINNER_A10_UART_H #define CPU_ALLWINNER_A10_UART_H -#include <types.h> - struct a10_uart { union { /* operational mode */ diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 363a41a..c82db1c 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -17,7 +17,6 @@ * Glue to UART code to enable serial console */ -#include <types.h> #include <console/uart.h> #include <boot/coreboot_tables.h> diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 76bc6d9..6970528 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <cpu/amd/msr.h> #include <device/pci_ops.h> #include "init_cpus.h" diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c index d024069..a847f22 100644 --- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c +++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <stdint.h> #include <option.h> diff --git a/src/cpu/intel/fsp_model_406dx/acpi.c b/src/cpu/intel/fsp_model_406dx/acpi.c index f30567e..f41143e 100644 --- a/src/cpu/intel/fsp_model_406dx/acpi.c +++ b/src/cpu/intel/fsp_model_406dx/acpi.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 9dcd8ec..cd23e3f 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c index 3948cfe..73a5f32 100644 --- a/src/cpu/intel/haswell/smmrelocate.c +++ b/src/cpu/intel/haswell/smmrelocate.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 514ea44..24b460f 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index aca2277..9451ce0 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/cpu/intel/model_206ax/common.c b/src/cpu/intel/model_206ax/common.c index 1e832c8..492da89 100644 --- a/src/cpu/intel/model_206ax/common.c +++ b/src/cpu/intel/model_206ax/common.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <cpu/x86/msr.h> #include "model_206ax.h" diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c index cc2a895..c6106ee 100644 --- a/src/cpu/intel/smm/gen1/smmrelocate.c +++ b/src/cpu/intel/smm/gen1/smmrelocate.c @@ -17,7 +17,7 @@ Right now used for sandybridge and ivybridge. */ #include <assert.h> -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index b5e2c9e9..856dd83 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/cpu/intel/speedstep/speedstep.c b/src/cpu/intel/speedstep/speedstep.c index 43d5b5a..b45f084 100644 --- a/src/cpu/intel/speedstep/speedstep.c +++ b/src/cpu/intel/speedstep/speedstep.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <arch/cpu.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/ti/am335x/bootblock.c b/src/cpu/ti/am335x/bootblock.c index cf80ee8..a51ac74 100644 --- a/src/cpu/ti/am335x/bootblock.c +++ b/src/cpu/ti/am335x/bootblock.c @@ -13,8 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> - +#include <stdint.h> #include <arch/cache.h> #include <bootblock_common.h> diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index c482a85..5d7a549 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -13,7 +13,7 @@ */ #include <stdlib.h> -#include <types.h> +#include <stdint.h> #include <console/uart.h> #include <device/mmio.h> #include <boot/coreboot_tables.h> diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c index 53106f2..33ad6ff 100644 --- a/src/device/dram/ddr2.c +++ b/src/device/dram/ddr2.c @@ -21,6 +21,7 @@ * \brief Utilities for decoding DDR2 SPDs */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/dram/ddr2.h> diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index f27fdcb..95e3be4 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -20,6 +20,7 @@ * \brief Utilities for decoding DDR3 SPDs */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/dram/ddr3.h> diff --git a/src/device/oprom/yabel/biosemu.c b/src/device/oprom/yabel/biosemu.c index 1c94d92..67a1856 100644 --- a/src/device/oprom/yabel/biosemu.c +++ b/src/device/oprom/yabel/biosemu.c @@ -34,7 +34,6 @@ *****************************************************************************/ #include <string.h> -#include <types.h> #include "debug.h" diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index fa1b6b7..8f0766e 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -35,7 +35,6 @@ * they should go away in the future... */ -#include <types.h> #include <string.h> #include <device/device.h> #include "../debug.h" diff --git a/src/device/oprom/yabel/debug.h b/src/device/oprom/yabel/debug.h index d93fc6e..a08658a 100644 --- a/src/device/oprom/yabel/debug.h +++ b/src/device/oprom/yabel/debug.h @@ -35,7 +35,6 @@ #define _BIOSEMU_DEBUG_H_ #include <timer.h> -#include <types.h> #if CONFIG(X86EMU_DEBUG_TIMINGS) extern struct mono_time zero; diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 8e8450a..fab4d43 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -35,7 +35,6 @@ #ifndef DEVICE_LIB_H #define DEVICE_LIB_H -#include <types.h> #include <endian.h> #include "compat/of.h" #include "debug.h" diff --git a/src/device/oprom/yabel/interrupt.c b/src/device/oprom/yabel/interrupt.c index ea2a803..1992d86 100644 --- a/src/device/oprom/yabel/interrupt.c +++ b/src/device/oprom/yabel/interrupt.c @@ -32,7 +32,6 @@ * IBM Corporation - initial implementation *****************************************************************************/ -#include <types.h> #include "compat/rtas.h" #include "biosemu.h" diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 7117a6e..6d8ecab 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -32,7 +32,7 @@ * IBM Corporation - initial implementation *****************************************************************************/ -#include <types.h> +#include <stdint.h> #include "compat/rtas.h" #include "compat/time.h" #include "device.h" diff --git a/src/device/oprom/yabel/io.h b/src/device/oprom/yabel/io.h index f2ecced..1b92310 100644 --- a/src/device/oprom/yabel/io.h +++ b/src/device/oprom/yabel/io.h @@ -33,8 +33,8 @@ #ifndef _BIOSEMU_IO_H_ #define _BIOSEMU_IO_H_ + #include <x86emu/x86emu.h> -#include <types.h> u8 my_inb(X86EMU_pioAddr addr); diff --git a/src/device/oprom/yabel/mem.c b/src/device/oprom/yabel/mem.c index fa6959e..618345d 100644 --- a/src/device/oprom/yabel/mem.c +++ b/src/device/oprom/yabel/mem.c @@ -32,7 +32,6 @@ * IBM Corporation - initial implementation *****************************************************************************/ -#include <types.h> #include "debug.h" #include "device.h" #include "x86emu/x86emu.h" diff --git a/src/device/oprom/yabel/mem.h b/src/device/oprom/yabel/mem.h index e1fb95b..8eb9d77 100644 --- a/src/device/oprom/yabel/mem.h +++ b/src/device/oprom/yabel/mem.h @@ -34,7 +34,6 @@ #ifndef _BIOSEMU_MEM_H_ #define _BIOSEMU_MEM_H_ #include <x86emu/x86emu.h> -#include <types.h> // read byte from memory u8 my_rdb(u32 addr); diff --git a/src/device/oprom/yabel/pmm.h b/src/device/oprom/yabel/pmm.h index 2ecc36e..1e929be 100644 --- a/src/device/oprom/yabel/pmm.h +++ b/src/device/oprom/yabel/pmm.h @@ -34,8 +34,6 @@ #ifndef _YABEL_PMM_H_ #define _YABEL_PMM_H_ -#include <types.h> - /* PMM Structure see PMM Spec Version 1.01 Chapter 3.1.1 * (search web for specspmm101.pdf) */ diff --git a/src/device/oprom/yabel/vbe.c b/src/device/oprom/yabel/vbe.c index 682bf00..58c6565 100644 --- a/src/device/oprom/yabel/vbe.c +++ b/src/device/oprom/yabel/vbe.c @@ -33,7 +33,6 @@ *****************************************************************************/ #include <string.h> -#include <types.h> #if CONFIG(FRAMEBUFFER_SET_VESA_MODE) #include <boot/coreboot_tables.h> #endif diff --git a/src/drivers/i2c/at24rf08c/at24rf08c.c b/src/drivers/i2c/at24rf08c/at24rf08c.c index f20678c..27780a0 100644 --- a/src/drivers/i2c/at24rf08c/at24rf08c.c +++ b/src/drivers/i2c/at24rf08c/at24rf08c.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/smbus.h> diff --git a/src/drivers/i2c/at24rf08c/lenovo_serials.c b/src/drivers/i2c/at24rf08c/lenovo_serials.c index 60b12ce..9ee2044 100644 --- a/src/drivers/i2c/at24rf08c/lenovo_serials.c +++ b/src/drivers/i2c/at24rf08c/lenovo_serials.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/smbus.h> diff --git a/src/drivers/i2c/pca9538/pca9538.h b/src/drivers/i2c/pca9538/pca9538.h index 6db95be..dd16fb9 100644 --- a/src/drivers/i2c/pca9538/pca9538.h +++ b/src/drivers/i2c/pca9538/pca9538.h @@ -16,7 +16,7 @@ #ifndef _I2C_PCA9538_H_ #define _I2C_PCA9538_H_ -#include <types.h> +#include <stdint.h> #include <device/device.h> /* Register layout */ diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 19c8f6b..8e08555 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -33,7 +33,6 @@ #include <commonlib/endian.h> #include <stdint.h> #include <string.h> -#include <types.h> #include <delay.h> #include <console/console.h> #include <device/i2c_simple.h> diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index 447fc24..46695da 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -32,7 +32,6 @@ #include <commonlib/endian.h> #include <stdint.h> #include <string.h> -#include <types.h> #include <delay.h> #include <console/console.h> #include <device/i2c_simple.h> diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index 2da07d5..f35fb6e 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <bootstate.h> diff --git a/src/drivers/intel/fsp1_0/hob.c b/src/drivers/intel/fsp1_0/hob.c index 05060d8..b96e059 100644 --- a/src/drivers/intel/fsp1_0/hob.c +++ b/src/drivers/intel/fsp1_0/hob.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <console/console.h> #include "fsp_util.h" diff --git a/src/drivers/intel/fsp1_1/include/fsp/memmap.h b/src/drivers/intel/fsp1_1/include/fsp/memmap.h index 965bce6..29907e9 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/memmap.h +++ b/src/drivers/intel/fsp1_1/include/fsp/memmap.h @@ -16,7 +16,7 @@ #ifndef _COMMON_MEMMAP_H_ #define _COMMON_MEMMAP_H_ -#include <types.h> +#include <stdint.h> /* * mmap_region_granularity must to return a size which is a positive non-zero diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c index e0c63d2..29efdb5 100644 --- a/src/drivers/intel/fsp2_0/graphics.c +++ b/src/drivers/intel/fsp2_0/graphics.c @@ -10,6 +10,7 @@ * (at your option) any later version. */ +#include <types.h> #include <console/console.h> #include <fsp/util.h> #include <soc/intel/common/vbt.h> diff --git a/src/drivers/intel/fsp2_0/include/fsp/memmap.h b/src/drivers/intel/fsp2_0/include/fsp/memmap.h index 965bce6..29907e9 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/memmap.h +++ b/src/drivers/intel/fsp2_0/include/fsp/memmap.h @@ -16,7 +16,7 @@ #ifndef _COMMON_MEMMAP_H_ #define _COMMON_MEMMAP_H_ -#include <types.h> +#include <stdint.h> /* * mmap_region_granularity must to return a size which is a positive non-zero diff --git a/src/drivers/intel/fsp2_0/include/fsp/memory_init.h b/src/drivers/intel/fsp2_0/include/fsp/memory_init.h index 05ea440..fd39426 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/memory_init.h +++ b/src/drivers/intel/fsp2_0/include/fsp/memory_init.h @@ -16,7 +16,7 @@ #ifndef _FSP2_0_MEMORY_INIT_H_ #define _FSP2_0_MEMORY_INIT_H_ -#include <types.h> +#include <stdint.h> /* * Updates mrc cache hash if it differs. diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index 231162e..4d1c3fa 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -13,6 +13,7 @@ #ifndef _FSP2_0_UTIL_H_ #define _FSP2_0_UTIL_H_ +#include <types.h> #include <boot/coreboot_tables.h> #include <commonlib/region.h> #include <arch/cpu.h> diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 3dafcf8..89b6df4 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -11,6 +11,7 @@ * (at your option) any later version. */ +#include <types.h> #include <security/vboot/antirollback.h> #include <arch/symbols.h> #include <assert.h> diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 402b05d..3c5eef3 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -10,6 +10,7 @@ * (at your option) any later version. */ +#include <types.h> #include <cbfs.h> #include <cbmem.h> #include <commonlib/fsp.h> diff --git a/src/drivers/intel/fsp2_0/temp_ram_exit.c b/src/drivers/intel/fsp2_0/temp_ram_exit.c index 5532c43..ae0aefe 100644 --- a/src/drivers/intel/fsp2_0/temp_ram_exit.c +++ b/src/drivers/intel/fsp2_0/temp_ram_exit.c @@ -9,6 +9,7 @@ * (at your option) any later version. */ +#include <types.h> #include <arch/cpu.h> #include <console/console.h> #include <fsp/api.h> diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c index 19b8127..171c80d 100644 --- a/src/drivers/intel/fsp2_0/util.c +++ b/src/drivers/intel/fsp2_0/util.c @@ -11,6 +11,7 @@ * (at your option) any later version. */ +#include <types.h> #include <device/mmio.h> #include <cf9_reset.h> #include <console/console.h> diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index 220f141..5b662ea 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -25,7 +25,7 @@ * Eugeni Dodonov <eugeni.dodonov(a)intel.com> * */ -#include <types.h> + #include <string.h> #include <stdlib.h> #include <device/device.h> diff --git a/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c b/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c index b6d2241..98ff9bf 100644 --- a/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c +++ b/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <option.h> #include <device/device.h> diff --git a/src/drivers/lenovo/hybrid_graphics/romstage.c b/src/drivers/lenovo/hybrid_graphics/romstage.c index 35cb384..39983d8 100644 --- a/src/drivers/lenovo/hybrid_graphics/romstage.c +++ b/src/drivers/lenovo/hybrid_graphics/romstage.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <option.h> #include <device/device.h> diff --git a/src/drivers/lenovo/wacom.c b/src/drivers/lenovo/wacom.c index 9dcbf15..a924fc6 100644 --- a/src/drivers/lenovo/wacom.c +++ b/src/drivers/lenovo/wacom.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/drivers/net/atl1e.c b/src/drivers/net/atl1e.c index d6e7a84..20bbba1 100644 --- a/src/drivers/net/atl1e.c +++ b/src/drivers/net/atl1e.c @@ -20,6 +20,7 @@ * This driver sets the macaddress of a Atheros AR8121/AR8113/AR8114 */ +#include <types.h> #include <device/mmio.h> #include <device/device.h> #include <cbfs.h> diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 3200163..6be5cfb 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -21,6 +21,7 @@ * so that if the EEPROM/efuse is unconfigured it still has a default MAC. */ +#include <types.h> #include <cbfs.h> #include <arch/acpi_device.h> #include <arch/acpigen.h> diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c index c18f1e94..eaa7d89 100644 --- a/src/drivers/pc80/rtc/mc146818rtc.c +++ b/src/drivers/pc80/rtc/mc146818rtc.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/acpi.h> #include <arch/io.h> #include <bcd.h> diff --git a/src/drivers/ti/tps65090/tps65090.c b/src/drivers/ti/tps65090/tps65090.c index 6eae6fb..504a605 100644 --- a/src/drivers/ti/tps65090/tps65090.c +++ b/src/drivers/ti/tps65090/tps65090.c @@ -34,7 +34,6 @@ */ #include <delay.h> -#include <types.h> #include <console/console.h> #include <device/i2c_simple.h> #include "tps65090.h" diff --git a/src/drivers/tpm/tpm.c b/src/drivers/tpm/tpm.c index 4d8b0a3..744e4d3 100644 --- a/src/drivers/tpm/tpm.c +++ b/src/drivers/tpm/tpm.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <stddef.h> #include <bootstate.h> #include <security/tpm/tspi.h> diff --git a/src/drivers/uart/pl011.h b/src/drivers/uart/pl011.h index 9247ef7..fa080c2 100644 --- a/src/drivers/uart/pl011.h +++ b/src/drivers/uart/pl011.h @@ -11,7 +11,6 @@ #define __DRIVERS_UART_PL011_H #include <inttypes.h> -#include <types.h> /* PL011 r1p5 registers */ struct pl011_uart { diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c index 2f8aa84..921fd71 100644 --- a/src/drivers/uart/util.c +++ b/src/drivers/uart/util.c @@ -12,7 +12,6 @@ */ #include <console/uart.h> -#include <types.h> #include <timer.h> /* Calculate divisor. Do not floor but round to nearest integer. */ diff --git a/src/drivers/usb/ehci_debug.h b/src/drivers/usb/ehci_debug.h index 0ac94bf..769c45d 100644 --- a/src/drivers/usb/ehci_debug.h +++ b/src/drivers/usb/ehci_debug.h @@ -17,8 +17,6 @@ #ifndef _EHCI_DEBUG_H_ #define _EHCI_DEBUG_H_ -#include <types.h> - void usbdebug_re_enable(unsigned ehci_base); void usbdebug_disable(void); diff --git a/src/drivers/xpowers/axp209/axp209.c b/src/drivers/xpowers/axp209/axp209.c index da575cc..1d58129 100644 --- a/src/drivers/xpowers/axp209/axp209.c +++ b/src/drivers/xpowers/axp209/axp209.c @@ -10,7 +10,7 @@ #include "axp209.h" #include "chip.h" - +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/i2c_simple.h> diff --git a/src/drivers/xpowers/axp209/chip.h b/src/drivers/xpowers/axp209/chip.h index c19253d..3199756 100644 --- a/src/drivers/xpowers/axp209/chip.h +++ b/src/drivers/xpowers/axp209/chip.h @@ -8,8 +8,6 @@ #ifndef AXP209_CHIP_H #define AXP209_CHIP_H -#include <types.h> - struct drivers_xpowers_axp209_config { u16 dcdc2_voltage_mv; /**< DCDC2 converter voltage output */ u16 dcdc3_voltage_mv; /**< DCDC3 converter voltage output */ diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c index c3a2555..95bc9a3 100644 --- a/src/ec/lenovo/h8/bluetooth.c +++ b/src/ec/lenovo/h8/bluetooth.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <southbridge/intel/common/gpio.h> #include <console/console.h> #include <device/device.h> diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index de4f2c2..4538693 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/acpi.h> #include <console/console.h> #include <device/device.h> diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c index cf3c8f7..72bbe72 100644 --- a/src/ec/lenovo/h8/wwan.c +++ b/src/ec/lenovo/h8/wwan.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <southbridge/intel/common/gpio.h> #include <console/console.h> #include <device/device.h> diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c index 986abb5..a55b448 100644 --- a/src/ec/lenovo/pmh7/pmh7.c +++ b/src/ec/lenovo/pmh7/pmh7.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <console/console.h> #include <device/device.h> diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h index 08b2b7a..31328276 100644 --- a/src/include/bootblock_common.h +++ b/src/include/bootblock_common.h @@ -19,7 +19,7 @@ #include <arch/cpu.h> #include <main_decl.h> #include <timestamp.h> -#include <types.h> +#include <stdint.h> /* * These are defined as weak no-ops that can be overridden by mainboard/SoC. diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 5c6cae3..3b858c5 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -78,7 +78,7 @@ #define IA32_L3_MASK_2 0xc92 #ifndef __ASSEMBLER__ -#include <types.h> +#include <stdint.h> #if defined(__ROMCC__) typedef __builtin_msr_t msr_t; diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index ffcc2a1..1073364 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -21,7 +21,7 @@ #define CPU_X86_SMM_H #include <arch/cpu.h> -#include <types.h> +#include <stdint.h> #define SMM_DEFAULT_BASE 0x30000 #define SMM_DEFAULT_SIZE 0x10000 diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 002b8244..d66820b 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -16,7 +16,6 @@ #ifndef DEVICE_AZALIA_H #define DEVICE_AZALIA_H -#include <types.h> #include <string.h> #include <console/console.h> #include <arch/acpi.h> diff --git a/src/include/gpio.h b/src/include/gpio.h index 0a37ee7..de723b8 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -17,7 +17,7 @@ #define __SRC_INCLUDE_GPIO_H__ #include <soc/gpio.h> -#include <types.h> +#include <stdint.h> /* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */ _Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio"); diff --git a/src/include/lib.h b/src/include/lib.h index 3edc372..0ea785c 100644 --- a/src/include/lib.h +++ b/src/include/lib.h @@ -17,8 +17,8 @@ #ifndef __LIB_H__ #define __LIB_H__ + #include <stdint.h> -#include <types.h> /* Defined in src/lib/lzma.c. Returns decompressed size or 0 on error. */ size_t ulzman(const void *src, size_t srcn, void *dst, size_t dstn); diff --git a/src/include/smbios.h b/src/include/smbios.h index c046b1a..c460b66 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -18,7 +18,7 @@ #ifndef SMBIOS_H #define SMBIOS_H -#include <types.h> +#include <stdint.h> unsigned long smbios_write_tables(unsigned long start); int smbios_add_string(u8 *start, const char *str); diff --git a/src/include/spi_bitbang.h b/src/include/spi_bitbang.h index 710fefb..629d0d7 100644 --- a/src/include/spi_bitbang.h +++ b/src/include/spi_bitbang.h @@ -15,7 +15,7 @@ #ifndef _SPI_BITBANG_H_ #define _SPI_BITBANG_H_ -#include <types.h> +#include <stdint.h> struct spi_bitbang_ops { int (*get_miso)(const struct spi_bitbang_ops *ops); diff --git a/src/include/symbols.h b/src/include/symbols.h index 8786db7..beb6395 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -16,8 +16,6 @@ #ifndef __SYMBOLS_H #define __SYMBOLS_H -#include <types.h> - extern u8 _dram[]; #define REGION_SIZE(name) (_e##name - _##name) diff --git a/src/include/timer.h b/src/include/timer.h index 621b486..6090f39 100644 --- a/src/include/timer.h +++ b/src/include/timer.h @@ -15,8 +15,6 @@ #ifndef TIMER_H #define TIMER_H -#include <types.h> - #define NSECS_PER_SEC 1000000000 #define USECS_PER_SEC 1000000 #define MSECS_PER_SEC 1000 diff --git a/src/lib/libgcc.c b/src/lib/libgcc.c index b8bcd1c..509e9a0 100644 --- a/src/lib/libgcc.c +++ b/src/lib/libgcc.c @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> - /* * Provide platform-independent backend implementation for __builtin_clz() in * <lib.h> in case GCC does not have an assembly version for this arch. diff --git a/src/lib/trace.c b/src/lib/trace.c index b118817..5e6a503 100644 --- a/src/lib/trace.c +++ b/src/lib/trace.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <trace.h> diff --git a/src/mainboard/adi/rcc-dff/acpi_tables.c b/src/mainboard/adi/rcc-dff/acpi_tables.c index a0ebbba..22eeb17 100644 --- a/src/mainboard/adi/rcc-dff/acpi_tables.c +++ b/src/mainboard/adi/rcc-dff/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index a74c6dd..8bda290 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -17,6 +17,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <string.h> #include <device/pci_def.h> diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 7fe9b64..408df25 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -17,6 +17,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <string.h> #include <device/pci_def.h> diff --git a/src/mainboard/asus/p5gc-mx/acpi_tables.c b/src/mainboard/asus/p5gc-mx/acpi_tables.c index 3aa5829..c212315 100644 --- a/src/mainboard/asus/p5gc-mx/acpi_tables.c +++ b/src/mainboard/asus/p5gc-mx/acpi_tables.c @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> - #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c index 21fa9b5..81bb5ae 100644 --- a/src/mainboard/cubietech/cubieboard/romstage.c +++ b/src/mainboard/cubietech/cubieboard/romstage.c @@ -23,6 +23,7 @@ * faster. */ +#include <types.h> #include <console/console.h> #include <cpu/allwinner/a10/clock.h> #include <cpu/allwinner/a10/gpio.h> diff --git a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c b/src/mainboard/emulation/qemu-i440fx/acpi_tables.c index 2829289..49e5b86 100644 --- a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c +++ b/src/mainboard/emulation/qemu-i440fx/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c index 9548b7c..a89ac26 100644 --- a/src/mainboard/emulation/qemu-power8/uart.c +++ b/src/mainboard/emulation/qemu-power8/uart.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <console/uart.h> #include <boot/coreboot_tables.h> diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index 2c6a2ec..10c97e2 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/emulation/qemu-riscv/uart.c b/src/mainboard/emulation/qemu-riscv/uart.c index 021713a..26fb5e9 100644 --- a/src/mainboard/emulation/qemu-riscv/uart.c +++ b/src/mainboard/emulation/qemu-riscv/uart.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <console/uart.h> #include <boot/coreboot_tables.h> #include <mainboard/addressmap.h> diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c index eeb0b57..3b56661 100644 --- a/src/mainboard/emulation/spike-riscv/uart.c +++ b/src/mainboard/emulation/spike-riscv/uart.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <console/uart.h> #include <boot/coreboot_tables.h> diff --git a/src/mainboard/esd/atom15/acpi_tables.c b/src/mainboard/esd/atom15/acpi_tables.c index edb66fc0..4fc6b01 100644 --- a/src/mainboard/esd/atom15/acpi_tables.c +++ b/src/mainboard/esd/atom15/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/foxconn/d41s/acpi_tables.c b/src/mainboard/foxconn/d41s/acpi_tables.c index 92688bf..6e619f4 100644 --- a/src/mainboard/foxconn/d41s/acpi_tables.c +++ b/src/mainboard/foxconn/d41s/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index 57e2911..102940a 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <arch/acpi.h> diff --git a/src/mainboard/google/auron/ec.c b/src/mainboard/google/auron/ec.c index 3fc5373..d300fb0 100644 --- a/src/mainboard/google/auron/ec.c +++ b/src/mainboard/google/auron/ec.c @@ -15,7 +15,6 @@ #include <arch/acpi.h> #include <vendorcode/google/chromeos/chromeos.h> -#include <types.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> #include "ec.h" diff --git a/src/mainboard/google/auron/variants/buddy/variant.c b/src/mainboard/google/auron/variants/buddy/variant.c index 5afb26c..39666c1 100644 --- a/src/mainboard/google/auron/variants/buddy/variant.c +++ b/src/mainboard/google/auron/variants/buddy/variant.c @@ -13,7 +13,6 @@ #include <cbfs.h> #include <fmap.h> -#include <types.h> #include <string.h> #include <arch/io.h> #include <device/pci_ops.h> diff --git a/src/mainboard/google/beltino/acpi_tables.c b/src/mainboard/google/beltino/acpi_tables.c index 7356030..56e1a9e 100644 --- a/src/mainboard/google/beltino/acpi_tables.c +++ b/src/mainboard/google/beltino/acpi_tables.c @@ -14,7 +14,6 @@ */ #include <string.h> -#include <types.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> #include <device/device.h> diff --git a/src/mainboard/google/beltino/lan.c b/src/mainboard/google/beltino/lan.c index 7286437..61813f3 100644 --- a/src/mainboard/google/beltino/lan.c +++ b/src/mainboard/google/beltino/lan.c @@ -15,7 +15,7 @@ #include <cbfs.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/mainboard/google/beltino/mainboard.c b/src/mainboard/google/beltino/mainboard.c index 9466418..4fcb191 100644 --- a/src/mainboard/google/beltino/mainboard.c +++ b/src/mainboard/google/beltino/mainboard.c @@ -16,7 +16,6 @@ #include <smbios.h> #include <string.h> -#include <types.h> #include <arch/acpi.h> #include <arch/io.h> #include <arch/interrupt.h> diff --git a/src/mainboard/google/beltino/variants/mccloud/led.c b/src/mainboard/google/beltino/variants/mccloud/led.c index 332f4c7..799f375 100644 --- a/src/mainboard/google/beltino/variants/mccloud/led.c +++ b/src/mainboard/google/beltino/variants/mccloud/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <superio/ite/it8772f/it8772f.h> #include "../../onboard.h" diff --git a/src/mainboard/google/beltino/variants/monroe/led.c b/src/mainboard/google/beltino/variants/monroe/led.c index 8900338..b6e0ad8 100644 --- a/src/mainboard/google/beltino/variants/monroe/led.c +++ b/src/mainboard/google/beltino/variants/monroe/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include "../../onboard.h" void set_power_led(int state) diff --git a/src/mainboard/google/beltino/variants/panther/led.c b/src/mainboard/google/beltino/variants/panther/led.c index e40c40d..5af9f2e 100644 --- a/src/mainboard/google/beltino/variants/panther/led.c +++ b/src/mainboard/google/beltino/variants/panther/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include "../../onboard.h" void set_power_led(int state) diff --git a/src/mainboard/google/beltino/variants/tricky/led.c b/src/mainboard/google/beltino/variants/tricky/led.c index e688a0c..e9a111f 100644 --- a/src/mainboard/google/beltino/variants/tricky/led.c +++ b/src/mainboard/google/beltino/variants/tricky/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <superio/ite/it8772f/it8772f.h> #include "../../onboard.h" diff --git a/src/mainboard/google/beltino/variants/zako/led.c b/src/mainboard/google/beltino/variants/zako/led.c index 15148ad..9d51234 100644 --- a/src/mainboard/google/beltino/variants/zako/led.c +++ b/src/mainboard/google/beltino/variants/zako/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include "../../onboard.h" void set_power_led(int state) diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c index 6b69277..ea42286 100644 --- a/src/mainboard/google/butterfly/mainboard.c +++ b/src/mainboard/google/butterfly/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <cbfs.h> #include <device/device.h> diff --git a/src/mainboard/google/cyan/ec.c b/src/mainboard/google/cyan/ec.c index 9ff0639..a18674a 100644 --- a/src/mainboard/google/cyan/ec.c +++ b/src/mainboard/google/cyan/ec.c @@ -19,7 +19,6 @@ #include <ec/google/chromeec/ec.h> #include "ec.h" #include <vendorcode/google/chromeos/chromeos.h> -#include <types.h> void mainboard_ec_init(void) { diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c index 838a6c7..30c5e44 100644 --- a/src/mainboard/google/daisy/romstage.c +++ b/src/mainboard/google/daisy/romstage.c @@ -32,7 +32,6 @@ #include <soc/trustzone.h> #include <soc/wakeup.h> #include <timestamp.h> -#include <types.h> #include "exynos5250.h" diff --git a/src/mainboard/google/gale/cdp.c b/src/mainboard/google/gale/cdp.c index 11a0f68..03e883a 100644 --- a/src/mainboard/google/gale/cdp.c +++ b/src/mainboard/google/gale/cdp.c @@ -17,7 +17,6 @@ #include <soc/cdp.h> #include <soc/ebi2.h> #include <soc/clock.h> -#include <types.h> #include <boardid.h> void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count) diff --git a/src/mainboard/google/gale/mmu.h b/src/mainboard/google/gale/mmu.h index f7bffd2..a40e628 100644 --- a/src/mainboard/google/gale/mmu.h +++ b/src/mainboard/google/gale/mmu.h @@ -10,8 +10,6 @@ * GNU General Public License for more details. */ -#include <types.h> - extern u8 _wifi_imem_0[]; /* Linker script supplied */ extern u8 _ewifi_imem_0[]; extern u8 _wifi_imem_1[]; diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c index 5e9e15f..ff8ef7a 100644 --- a/src/mainboard/google/gru/sdram_configs.c +++ b/src/mainboard/google/gru/sdram_configs.c @@ -19,7 +19,7 @@ #include <gpio.h> #include <soc/sdram.h> #include <string.h> -#include <types.h> +#include <stdint.h> static const char *sdram_configs[] = { diff --git a/src/mainboard/google/jecht/acpi_tables.c b/src/mainboard/google/jecht/acpi_tables.c index c78a219..11ee396 100644 --- a/src/mainboard/google/jecht/acpi_tables.c +++ b/src/mainboard/google/jecht/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/google/jecht/lan.c b/src/mainboard/google/jecht/lan.c index 8a8b223..e5c32ed 100644 --- a/src/mainboard/google/jecht/lan.c +++ b/src/mainboard/google/jecht/lan.c @@ -15,7 +15,6 @@ #include <cbfs.h> #include <fmap.h> -#include <types.h> #include <string.h> #include <arch/io.h> #include <device/pci_ops.h> diff --git a/src/mainboard/google/jecht/led.c b/src/mainboard/google/jecht/led.c index 9c3878f..a1bb3e9 100644 --- a/src/mainboard/google/jecht/led.c +++ b/src/mainboard/google/jecht/led.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <superio/ite/it8772f/it8772f.h> #include "onboard.h" diff --git a/src/mainboard/google/link/ec.c b/src/mainboard/google/link/ec.c index 37949f6..44ae078 100644 --- a/src/mainboard/google/link/ec.c +++ b/src/mainboard/google/link/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> #include "ec.h" diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c index e09785d..bcca296 100644 --- a/src/mainboard/google/link/i915.c +++ b/src/mainboard/google/link/i915.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <stdlib.h> #include <device/device.h> diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c index 04b03ba..cb4ec6d 100644 --- a/src/mainboard/google/link/mainboard.c +++ b/src/mainboard/google/link/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index 77b7d5e..0eb1ea3 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/google/parrot/ec.c b/src/mainboard/google/parrot/ec.c index 623c0bc..7b3cd49 100644 --- a/src/mainboard/google/parrot/ec.c +++ b/src/mainboard/google/parrot/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <device/device.h> #include <ec/compal/ene932/ec.h> diff --git a/src/mainboard/google/parrot/mainboard.c b/src/mainboard/google/parrot/mainboard.c index 2936fa2..185c93c 100644 --- a/src/mainboard/google/parrot/mainboard.c +++ b/src/mainboard/google/parrot/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c index fdbe534..c294af5 100644 --- a/src/mainboard/google/peach_pit/romstage.c +++ b/src/mainboard/google/peach_pit/romstage.c @@ -35,7 +35,7 @@ #include <soc/wakeup.h> #include <stdlib.h> #include <timestamp.h> -#include <types.h> +#include <stdint.h> #define PMIC_I2C_BUS 4 diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 3837a52..6d53fee 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/google/rambi/ec.c b/src/mainboard/google/rambi/ec.c index 60f3d30..a8b0a61 100644 --- a/src/mainboard/google/rambi/ec.c +++ b/src/mainboard/google/rambi/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> #include "ec.h" diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c index 59eeefb..4303015 100644 --- a/src/mainboard/google/rambi/mainboard.c +++ b/src/mainboard/google/rambi/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/google/rambi/variants/ninja/lan.c b/src/mainboard/google/rambi/variants/ninja/lan.c index 93ecc3a..7cb8354 100644 --- a/src/mainboard/google/rambi/variants/ninja/lan.c +++ b/src/mainboard/google/rambi/variants/ninja/lan.c @@ -15,7 +15,7 @@ #include <cbfs.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/mainboard/google/rambi/variants/sumo/lan.c b/src/mainboard/google/rambi/variants/sumo/lan.c index 9a3c130..bba6884 100644 --- a/src/mainboard/google/rambi/variants/sumo/lan.c +++ b/src/mainboard/google/rambi/variants/sumo/lan.c @@ -15,7 +15,7 @@ #include <cbfs.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c index bf5e294..424c700 100644 --- a/src/mainboard/google/slippy/acpi_tables.c +++ b/src/mainboard/google/slippy/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/google/slippy/ec.c b/src/mainboard/google/slippy/ec.c index f8ab6b8..c95b3b9 100644 --- a/src/mainboard/google/slippy/ec.c +++ b/src/mainboard/google/slippy/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> #include "ec.h" diff --git a/src/mainboard/google/slippy/mainboard.c b/src/mainboard/google/slippy/mainboard.c index e44abcd..2e244d8 100644 --- a/src/mainboard/google/slippy/mainboard.c +++ b/src/mainboard/google/slippy/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <smbios.h> #include <device/device.h> diff --git a/src/mainboard/google/storm/cdp.c b/src/mainboard/google/storm/cdp.c index 3c27491..137f9ce 100644 --- a/src/mainboard/google/storm/cdp.c +++ b/src/mainboard/google/storm/cdp.c @@ -18,7 +18,6 @@ #include <soc/cdp.h> #include <soc/ebi2.h> #include <soc/clock.h> -#include <types.h> #include <boardid.h> void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count) diff --git a/src/mainboard/google/storm/mmu.h b/src/mainboard/google/storm/mmu.h index 956553d..c583cca 100644 --- a/src/mainboard/google/storm/mmu.h +++ b/src/mainboard/google/storm/mmu.h @@ -10,8 +10,6 @@ * GNU General Public License for more details. */ -#include <types.h> - extern u8 _rpm[]; extern u8 _erpm[]; diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 681aa55..660aa1b 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c index a54b80b..0b84ba5 100644 --- a/src/mainboard/google/stout/ec.c +++ b/src/mainboard/google/stout/ec.c @@ -15,7 +15,6 @@ #include <arch/acpi.h> #include <bootmode.h> -#include <types.h> #include <console/console.h> #include <ec/quanta/it8518/ec.h> #include <device/device.h> diff --git a/src/mainboard/google/stout/mainboard.c b/src/mainboard/google/stout/mainboard.c index 2024abf..176f77e 100644 --- a/src/mainboard/google/stout/mainboard.c +++ b/src/mainboard/google/stout/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c index 9407528..2159272 100644 --- a/src/mainboard/google/veyron/romstage.c +++ b/src/mainboard/google/veyron/romstage.c @@ -31,7 +31,7 @@ #include <stdlib.h> #include <symbols.h> #include <timestamp.h> -#include <types.h> +#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> #include "board.h" diff --git a/src/mainboard/google/veyron/sdram_configs.c b/src/mainboard/google/veyron/sdram_configs.c index 8cc16b3..aea273d 100644 --- a/src/mainboard/google/veyron/sdram_configs.c +++ b/src/mainboard/google/veyron/sdram_configs.c @@ -12,12 +12,12 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <boardid.h> #include <console/console.h> #include <gpio.h> #include <soc/sdram.h> #include <string.h> -#include <types.h> static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0000 */ diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index a2e8b36..0fdc73f 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -31,7 +31,7 @@ #include <stdlib.h> #include <symbols.h> #include <timestamp.h> -#include <types.h> +#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> #include "board.h" diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c index 8cc16b3..420a0b9 100644 --- a/src/mainboard/google/veyron_mickey/sdram_configs.c +++ b/src/mainboard/google/veyron_mickey/sdram_configs.c @@ -17,7 +17,6 @@ #include <gpio.h> #include <soc/sdram.h> #include <string.h> -#include <types.h> static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0000 */ diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index 64119c1..2e116ce 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -31,7 +31,7 @@ #include <stdlib.h> #include <symbols.h> #include <timestamp.h> -#include <types.h> +#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> #include "board.h" diff --git a/src/mainboard/google/veyron_rialto/sdram_configs.c b/src/mainboard/google/veyron_rialto/sdram_configs.c index 590b051..82a907e 100644 --- a/src/mainboard/google/veyron_rialto/sdram_configs.c +++ b/src/mainboard/google/veyron_rialto/sdram_configs.c @@ -17,7 +17,6 @@ #include <gpio.h> #include <soc/sdram.h> #include <string.h> -#include <types.h> static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc" /* ram_code = 0000 */ diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c index 7fb45f9..cf199bb 100644 --- a/src/mainboard/ibase/mb899/superio_hwm.c +++ b/src/mainboard/ibase/mb899/superio_hwm.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <console/console.h> #include <device/device.h> diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c index 081733c..14aef7b 100644 --- a/src/mainboard/intel/baskingridge/acpi_tables.c +++ b/src/mainboard/intel/baskingridge/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/intel/baskingridge/mainboard.c b/src/mainboard/intel/baskingridge/mainboard.c index 8c8ae40..27078f0 100644 --- a/src/mainboard/intel/baskingridge/mainboard.c +++ b/src/mainboard/intel/baskingridge/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c index 2903a5c..d7b0f63 100644 --- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c +++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/intel/bayleybay_fsp/mainboard.c b/src/mainboard/intel/bayleybay_fsp/mainboard.c index 3280878..7fcf966 100644 --- a/src/mainboard/intel/bayleybay_fsp/mainboard.c +++ b/src/mainboard/intel/bayleybay_fsp/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c index 88cfb1d..1485190 100644 --- a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c +++ b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/intel/d510mo/acpi_tables.c b/src/mainboard/intel/d510mo/acpi_tables.c index 92688bf..6e619f4 100644 --- a/src/mainboard/intel/d510mo/acpi_tables.c +++ b/src/mainboard/intel/d510mo/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/intel/dcp847ske/smihandler.c b/src/mainboard/intel/dcp847ske/smihandler.c index 7ae3f39..d19ce08 100644 --- a/src/mainboard/intel/dcp847ske/smihandler.c +++ b/src/mainboard/intel/dcp847ske/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <cpu/x86/smm.h> #include "superio.h" diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index 666d48d..1176cdd 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/intel/emeraldlake2/ec.c b/src/mainboard/intel/emeraldlake2/ec.c index 350344a..29e764a 100644 --- a/src/mainboard/intel/emeraldlake2/ec.c +++ b/src/mainboard/intel/emeraldlake2/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <ec/smsc/mec1308/ec.h> #include "ec.h" diff --git a/src/mainboard/intel/emeraldlake2/mainboard.c b/src/mainboard/intel/emeraldlake2/mainboard.c index c57bd6f..f28a7a7 100644 --- a/src/mainboard/intel/emeraldlake2/mainboard.c +++ b/src/mainboard/intel/emeraldlake2/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index e126bd8..8550480 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -15,7 +15,6 @@ * */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/intel/littleplains/acpi_tables.c b/src/mainboard/intel/littleplains/acpi_tables.c index a0ebbba..22eeb17 100644 --- a/src/mainboard/intel/littleplains/acpi_tables.c +++ b/src/mainboard/intel/littleplains/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c index edb66fc0..4fc6b01 100644 --- a/src/mainboard/intel/minnowmax/acpi_tables.c +++ b/src/mainboard/intel/minnowmax/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/intel/mohonpeak/acpi_tables.c b/src/mainboard/intel/mohonpeak/acpi_tables.c index a0ebbba..22eeb17 100644 --- a/src/mainboard/intel/mohonpeak/acpi_tables.c +++ b/src/mainboard/intel/mohonpeak/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index 29c5de7..0f34d02 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -23,7 +23,6 @@ #include <soc/iomap.h> #include <soc/nvs.h> #include <string.h> -#include <types.h> #include <boardid.h> #include "onboard.h" diff --git a/src/mainboard/intel/strago/ec.c b/src/mainboard/intel/strago/ec.c index 9ff0639..a18674a 100644 --- a/src/mainboard/intel/strago/ec.c +++ b/src/mainboard/intel/strago/ec.c @@ -19,7 +19,6 @@ #include <ec/google/chromeec/ec.h> #include "ec.h" #include <vendorcode/google/chromeos/chromeos.h> -#include <types.h> void mainboard_ec_init(void) { diff --git a/src/mainboard/intel/wtm2/acpi_tables.c b/src/mainboard/intel/wtm2/acpi_tables.c index 39bf213..0582ba7 100644 --- a/src/mainboard/intel/wtm2/acpi_tables.c +++ b/src/mainboard/intel/wtm2/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/intel/wtm2/mainboard.c b/src/mainboard/intel/wtm2/mainboard.c index 83975db..3a72a9c 100644 --- a/src/mainboard/intel/wtm2/mainboard.c +++ b/src/mainboard/intel/wtm2/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index 73d5997..af79fcc 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -14,7 +14,6 @@ */ #include <string.h> -#include <types.h> #include <device/device.h> #include <device/pci_def.h> #include <console/console.h> diff --git a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c index e461681..9bab393 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <option.h> #include <arch/byteorder.h> #include <device/pci_ops.h> diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c index 60a4f48..d0e516f 100644 --- a/src/mainboard/roda/rk886ex/m3885.c +++ b/src/mainboard/roda/rk886ex/m3885.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <stdlib.h> #include <console/console.h> #include <arch/io.h> diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index c41e964..2ca4307 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/samsung/lumpy/ec.c b/src/mainboard/samsung/lumpy/ec.c index 708031c..603abbd 100644 --- a/src/mainboard/samsung/lumpy/ec.c +++ b/src/mainboard/samsung/lumpy/ec.c @@ -14,7 +14,6 @@ */ #include <arch/acpi.h> -#include <types.h> #include <console/console.h> #include <ec/smsc/mec1308/ec.h> #include "ec.h" diff --git a/src/mainboard/samsung/lumpy/mainboard.c b/src/mainboard/samsung/lumpy/mainboard.c index 8664217..7d26475 100644 --- a/src/mainboard/samsung/lumpy/mainboard.c +++ b/src/mainboard/samsung/lumpy/mainboard.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index b21ae22..6b8e19c 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/smp/mpspec.h> diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c index 2903a5c..d7b0f63 100644 --- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c +++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.c b/src/mainboard/siemens/mc_tcu3/ptn3460.c index 8143a16..b439af2 100644 --- a/src/mainboard/siemens/mc_tcu3/ptn3460.c +++ b/src/mainboard/siemens/mc_tcu3/ptn3460.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <hwilib.h> #include <string.h> diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c index 25e7434..c942e4a 100644 --- a/src/mainboard/ti/beaglebone/bootblock.c +++ b/src/mainboard/ti/beaglebone/bootblock.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <types.h> #include <bootblock_common.h> #include <console/uart.h> #include <cpu/ti/am335x/clock.h> diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c index e809ce4..038aab8 100644 --- a/src/mainboard/ti/beaglebone/romstage.c +++ b/src/mainboard/ti/beaglebone/romstage.c @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> - #include <armv7.h> #include <program_loading.h> diff --git a/src/northbridge/amd/amdfam10/link_control.c b/src/northbridge/amd/amdfam10/link_control.c index 871a436..e772833 100644 --- a/src/northbridge/amd/amdfam10/link_control.c +++ b/src/northbridge/amd/amdfam10/link_control.c @@ -18,6 +18,7 @@ * boost support. */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c index bbaec53..635c366 100644 --- a/src/northbridge/amd/amdfam10/misc_control.c +++ b/src/northbridge/amd/amdfam10/misc_control.c @@ -23,6 +23,7 @@ * devices which is done by the kernel */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 16b7bec..5874a2a 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <device/pci_ops.h> #include <stdint.h> diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index 8c33ad8..3970de0 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -26,7 +26,7 @@ #include "h3ncmn.h" #include "h3gtopo.h" #include "AsPsNb.h" - +#include <types.h> #include <arch/cpu.h> #include <device/pci.h> #include <device/pci_ops.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 9178c78..0cb5b6a 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -32,6 +32,7 @@ * supported. */ +#include <types.h> #include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> #include <northbridge/amd/amdfam10/raminit.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index a78a752..b5ab7c9 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <string.h> #include <arch/cpu.h> #include <arch/acpi.h> diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index e42085d..8ea74de 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -16,6 +16,7 @@ /* Call-backs */ +#include <types.h> #include <arch/cpu.h> #include <delay.h> #include <cpu/amd/msr.h> diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c index 901843d..158e03b 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi.c +++ b/src/northbridge/intel/fsp_rangeley/acpi.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <device/device.h> diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c index ec36c06..4c4b274 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <bootstate.h> diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 301743c..5c04d8e 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <arch/acpi.h> diff --git a/src/northbridge/intel/gm45/early_reset.c b/src/northbridge/intel/gm45/early_reset.c index 9f919cf..bc42ffd 100644 --- a/src/northbridge/intel/gm45/early_reset.c +++ b/src/northbridge/intel/gm45/early_reset.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <halt.h> diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 648aa48..ab22db0 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <console/console.h> #include <delay.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index d92e858..ca9fbb0 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <arch/acpi.h> #include <device/device.h> diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 0fd0228..6b7bd82 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index f817cdf..151c116 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 7ab2525..3d25c97 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <stdlib.h> #include <console/console.h> diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 633b09d..e9d772a 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <bootmode.h> #include <device/mmio.h> diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c index 462cdc0..3be1e27 100644 --- a/src/northbridge/intel/nehalem/acpi.c +++ b/src/northbridge/intel/nehalem/acpi.c @@ -18,7 +18,6 @@ #define __SIMPLE_DEVICE__ -#include <types.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 86fc583..7176b11 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <console/console.h> diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 78bc6de..7a6a569 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdlib.h> #include <console/console.h> #include <string.h> diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c index 6aefc9b..da3b980 100644 --- a/src/northbridge/intel/nehalem/smi.c +++ b/src/northbridge/intel/nehalem/smi.c @@ -13,7 +13,6 @@ #define __SIMPLE_DEVICE__ -#include <types.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c index 9dd8e31..f4f1629 100644 --- a/src/northbridge/intel/pineview/acpi.c +++ b/src/northbridge/intel/pineview/acpi.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> -#include <types.h> unsigned long acpi_fill_mcfg(unsigned long current) { diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index 11dc203..9dc2095 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <stdlib.h> #include <console/console.h> diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c index 8bacc77..40b12ac 100644 --- a/src/northbridge/intel/pineview/gma.c +++ b/src/northbridge/intel/pineview/gma.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <console/console.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 4afb546..7c675d2 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <commonlib/helpers.h> #include <arch/acpi.h> diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c index 8bfd476..2859199 100644 --- a/src/northbridge/intel/sandybridge/common.c +++ b/src/northbridge/intel/sandybridge/common.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index ad579c6..d4fdd1a 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <stdlib.h> #include <console/console.h> diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 00180fe..3ededad 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <console/console.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 3f62d10..f6b3ba6 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <commonlib/region.h> #include <bootmode.h> diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index da9ed40..86d4941 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <arch/acpi.h> diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index 8de568a..4cbf158 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <delay.h> #include <device/device.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 72ef1a9..30d92515 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <cbmem.h> diff --git a/src/security/tpm/tss.h b/src/security/tpm/tss.h index 807cb46..21633e4 100644 --- a/src/security/tpm/tss.h +++ b/src/security/tpm/tss.h @@ -13,7 +13,6 @@ #define TSS_H_ #include <stdint.h> -#include <types.h> #include <security/tpm/tss/common/tss_common.h> #include <security/tpm/tss_errors.h> diff --git a/src/security/tpm/tss/tcg-2.0/tss_structures.h b/src/security/tpm/tss/tcg-2.0/tss_structures.h index 991cbcf..fcaf682 100644 --- a/src/security/tpm/tss/tcg-2.0/tss_structures.h +++ b/src/security/tpm/tss/tcg-2.0/tss_structures.h @@ -12,7 +12,6 @@ * constants and structures needed for functions used in coreboot. */ #include <stdint.h> -#include <types.h> #include "../common/tss_common.h" /* This should be plenty for what firmware needs. */ diff --git a/src/security/vboot/antirollback.h b/src/security/vboot/antirollback.h index 6ea2c13..91e025e 100644 --- a/src/security/vboot/antirollback.h +++ b/src/security/vboot/antirollback.h @@ -35,7 +35,7 @@ #ifndef ANTIROLLBACK_H_ #define ANTIROLLBACK_H_ -#include <types.h> +#include <stdint.h> #include <security/tpm/tspi.h> struct vb2_context; diff --git a/src/security/vboot/vbnv.c b/src/security/vboot/vbnv.c index b999418..9f007b1 100644 --- a/src/security/vboot/vbnv.c +++ b/src/security/vboot/vbnv.c @@ -15,7 +15,7 @@ #include <arch/early_variables.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <security/vboot/vbnv.h> #include <security/vboot/vbnv_layout.h> diff --git a/src/security/vboot/vbnv.h b/src/security/vboot/vbnv.h index c8e689f..398cece 100644 --- a/src/security/vboot/vbnv.h +++ b/src/security/vboot/vbnv.h @@ -16,7 +16,7 @@ #ifndef __VBOOT_VBNV_H__ #define __VBOOT_VBNV_H__ -#include <types.h> +#include <stdint.h> /* Generic functions */ void read_vbnv(uint8_t *vbnv_copy); diff --git a/src/security/vboot/vbnv_cmos.c b/src/security/vboot/vbnv_cmos.c index 7758ef6..28a4b07 100644 --- a/src/security/vboot/vbnv_cmos.c +++ b/src/security/vboot/vbnv_cmos.c @@ -15,7 +15,7 @@ #include <bootstate.h> #include <console/console.h> -#include <types.h> +#include <stdint.h> #include <pc80/mc146818rtc.h> #include <security/vboot/vbnv.h> #include <security/vboot/vbnv_layout.h> diff --git a/src/security/vboot/vbnv_ec.c b/src/security/vboot/vbnv_ec.c index d73423e..98f0c5d 100644 --- a/src/security/vboot/vbnv_ec.c +++ b/src/security/vboot/vbnv_ec.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <ec/google/chromeec/ec.h> #include <security/vboot/vbnv.h> #include <security/vboot/vbnv_layout.h> diff --git a/src/security/vboot/vboot_crtm.h b/src/security/vboot/vboot_crtm.h index e1799b8..5389ae4 100644 --- a/src/security/vboot/vboot_crtm.h +++ b/src/security/vboot/vboot_crtm.h @@ -18,7 +18,7 @@ #include <program_loading.h> #include <security/tpm/tspi.h> -#include <types.h> +#include <stdint.h> #include <cbfs.h> /* CRTM */ diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index 25a564b..a069d39 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -16,6 +16,7 @@ #ifndef __AMD_PSP_H__ #define __AMD_PSP_H__ +#include <types.h> #include <amdblocks/agesawrapper.h> #include <soc/pci_devs.h> #include <stdint.h> diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h index 563dae0..0d48cd5 100644 --- a/src/soc/amd/stoneyridge/include/soc/northbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h @@ -17,6 +17,7 @@ #ifndef __PI_STONEYRIDGE_NORTHBRIDGE_H__ #define __PI_STONEYRIDGE_NORTHBRIDGE_H__ +#include <types.h> #include <device/device.h> /* D0F0 - Root Complex */ diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2f32c5c..87476bb 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -14,7 +14,7 @@ */ #include <console/console.h> - +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <bootstate.h> diff --git a/src/soc/cavium/cn81xx/cpu.c b/src/soc/cavium/cn81xx/cpu.c index 6c1d006..e38d612 100644 --- a/src/soc/cavium/cn81xx/cpu.c +++ b/src/soc/cavium/cn81xx/cpu.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <soc/addressmap.h> #include <device/mmio.h> #include <soc/cpu.h> diff --git a/src/soc/cavium/cn81xx/include/soc/clock.h b/src/soc/cavium/cn81xx/include/soc/clock.h index d436c12..36683b0 100644 --- a/src/soc/cavium/cn81xx/include/soc/clock.h +++ b/src/soc/cavium/cn81xx/include/soc/clock.h @@ -17,8 +17,6 @@ #ifndef SRC_SOC_CAVIUM_CN81XX_INCLUDE_CLOCK_H_ #define SRC_SOC_CAVIUM_CN81XX_INCLUDE_CLOCK_H_ -#include <types.h> - u64 thunderx_get_ref_clock(void); u64 thunderx_get_io_clock(void); u64 thunderx_get_core_clock(void); diff --git a/src/soc/cavium/cn81xx/include/soc/gpio.h b/src/soc/cavium/cn81xx/include/soc/gpio.h index 6986482..309c516 100644 --- a/src/soc/cavium/cn81xx/include/soc/gpio.h +++ b/src/soc/cavium/cn81xx/include/soc/gpio.h @@ -17,8 +17,6 @@ #ifndef __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_GPIO_H #define __COREBOOT_SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_GPIO_H -#include <types.h> - typedef u32 gpio_t; #include <gpio.h> diff --git a/src/soc/cavium/cn81xx/include/soc/sdram.h b/src/soc/cavium/cn81xx/include/soc/sdram.h index 5a3e519..87c827d 100644 --- a/src/soc/cavium/cn81xx/include/soc/sdram.h +++ b/src/soc/cavium/cn81xx/include/soc/sdram.h @@ -17,7 +17,7 @@ #ifndef __SOC_CAVIUM_CN81XX_SDRAM_H__ #define __SOC_CAVIUM_CN81XX_SDRAM_H__ -#include <types.h> +#include <stdint.h> size_t sdram_size_mb(void); void sdram_init(void); diff --git a/src/soc/cavium/cn81xx/include/soc/soc.h b/src/soc/cavium/cn81xx/include/soc/soc.h index a751e64..4f66ae6 100644 --- a/src/soc/cavium/cn81xx/include/soc/soc.h +++ b/src/soc/cavium/cn81xx/include/soc/soc.h @@ -17,7 +17,6 @@ #define __SOC_CAVIUM_CN81XX_INCLUDE_SOC_SOC_H #include <inttypes.h> -#include <types.h> /* MIO BOOT Registers */ struct cn81xx_mio_boot { diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h index 4507b0b..6e59187 100644 --- a/src/soc/cavium/cn81xx/include/soc/timer.h +++ b/src/soc/cavium/cn81xx/include/soc/timer.h @@ -17,7 +17,7 @@ #define __SOC_CAVIUM_CN81XX_TIMER_H__ #include <inttypes.h> -#include <types.h> +#include <stdint.h> #include <timer.h> #include <delay.h> diff --git a/src/soc/cavium/cn81xx/include/soc/twsi.h b/src/soc/cavium/cn81xx/include/soc/twsi.h index 6c5211e..fa29199 100644 --- a/src/soc/cavium/cn81xx/include/soc/twsi.h +++ b/src/soc/cavium/cn81xx/include/soc/twsi.h @@ -12,7 +12,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <types.h> + #include <device/i2c.h> #ifndef __SOC_CAVIUM_CN81XX_INCLUDE_SOC_TWSI_H diff --git a/src/soc/cavium/cn81xx/include/soc/uart.h b/src/soc/cavium/cn81xx/include/soc/uart.h index e402206..b581b94 100644 --- a/src/soc/cavium/cn81xx/include/soc/uart.h +++ b/src/soc/cavium/cn81xx/include/soc/uart.h @@ -17,7 +17,7 @@ #define __SOC_CAVIUM_COMMON_INCLUDE_SOC_UART_H #include <inttypes.h> -#include <types.h> +#include <stdint.h> int uart_is_enabled(const size_t bus); int uart_setup(const size_t bus, int baudrate); diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c index 51661d0..c610a9c 100644 --- a/src/soc/intel/apollolake/graphics.c +++ b/src/soc/intel/apollolake/graphics.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <arch/acpi.h> #include <bootmode.h> diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index c322cce..8e070d3 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -21,7 +21,7 @@ #include <cbmem.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <types.h> +#include <stdint.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 73c0d15..752140d 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index dbd2950..e909b48 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -39,7 +39,7 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> diff --git a/src/soc/intel/braswell/include/soc/pei_data.h b/src/soc/intel/braswell/include/soc/pei_data.h index 50aabed..30a3c6e 100644 --- a/src/soc/intel/braswell/include/soc/pei_data.h +++ b/src/soc/intel/braswell/include/soc/pei_data.h @@ -29,7 +29,7 @@ #ifndef _PEI_DATA_H_ #define _PEI_DATA_H_ -#include <types.h> +#include <stdint.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index e51c9bf..b12d4c1 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -21,7 +21,7 @@ #include <device/pci_ops.h> #include <cpu/x86/smm.h> #include <console/console.h> -#include <types.h> +#include <stdint.h> #include <string.h> #include <arch/cpu.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 319549d..3e1f97f 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h index 989ca06..696c2f2 100644 --- a/src/soc/intel/broadwell/include/soc/pei_data.h +++ b/src/soc/intel/broadwell/include/soc/pei_data.h @@ -29,7 +29,7 @@ #ifndef PEI_DATA_H #define PEI_DATA_H -#include <types.h> +#include <stdint.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index b36b99d..f63dae2 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -15,7 +15,6 @@ */ #include <delay.h> -#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c index 5dd076f..73e61c2 100644 --- a/src/soc/intel/broadwell/smmrelocate.c +++ b/src/soc/intel/broadwell/smmrelocate.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c index a89dcb3..002b352 100644 --- a/src/soc/intel/cannonlake/graphics.c +++ b/src/soc/intel/cannonlake/graphics.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/acpi.h> #include <console/console.h> #include <fsp/util.h> diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 47efa18..311120a 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 0065a6c..5d9d683 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -19,7 +19,7 @@ #include <intelblocks/itss.h> #include <intelblocks/pcr.h> #include <soc/pm.h> -#include <types.h> +#include <stdint.h> #define GPIO_DWx_SIZE(x) (sizeof(uint32_t) * (x)) #define PAD_CFG_OFFSET(x, dw_num) ((x) + GPIO_DWx_SIZE(dw_num)) diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index 11a03d0..094a49c 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -21,7 +21,7 @@ #include "gpio_defs.h" #ifndef __ACPI__ -#include <types.h> +#include <stdint.h> /* * GPIO numbers may not be contiguous and instead will have a different diff --git a/src/soc/intel/common/vbt.h b/src/soc/intel/common/vbt.h index e5a17fb..a7e6eb0 100644 --- a/src/soc/intel/common/vbt.h +++ b/src/soc/intel/common/vbt.h @@ -17,7 +17,6 @@ #define _INTEL_COMMON_VBT_H_ #include <commonlib/region.h> -#include <types.h> /* * Returns VBT pointer and mapping after checking prerequisites for Pre OS diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 371581b..4349ae9 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -16,7 +16,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <console/console.h> #include <arch/acpi.h> #include <arch/acpigen.h> diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index c9cbcfe..dc63034 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <console/console.h> #include <bootstate.h> diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c index a0c9ee53..4be569e 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi.c +++ b/src/soc/intel/fsp_broadwell_de/acpi.c @@ -17,7 +17,7 @@ */ #include <string.h> -#include <types.h> +#include <stdint.h> #include <arch/acpi.h> #include <arch/acpigen.h> #include <arch/io.h> diff --git a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c index 54e796d..8f215ca 100644 --- a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <string.h> #include <console/console.h> #include <bootstate.h> diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c index 038375b..f44d641 100644 --- a/src/soc/intel/fsp_broadwell_de/smihandler.c +++ b/src/soc/intel/fsp_broadwell_de/smihandler.c @@ -16,7 +16,6 @@ */ #include <delay.h> -#include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c index 57ba432..99878ed3 100644 --- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c +++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c @@ -16,7 +16,7 @@ #define __SIMPLE_DEVICE__ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/pci.h> #include <cpu/x86/lapic.h> diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c index 35fe8b6..28f7e1b 100644 --- a/src/soc/intel/icelake/graphics.c +++ b/src/soc/intel/icelake/graphics.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/acpi.h> #include <console/console.h> #include <fsp/util.h> diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index 05871e4..c2bee80 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/quark/include/soc/pei_wrapper.h b/src/soc/intel/quark/include/soc/pei_wrapper.h index c177c86..5b832dd 100644 --- a/src/soc/intel/quark/include/soc/pei_wrapper.h +++ b/src/soc/intel/quark/include/soc/pei_wrapper.h @@ -30,7 +30,7 @@ #ifndef _PEI_WRAPPER_H_ #define _PEI_WRAPPER_H_ -#include <types.h> +#include <stdint.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 26a131d..4478395 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -46,7 +46,7 @@ #include <soc/ramstage.h> #include <soc/systemagent.h> #include <string.h> -#include <types.h> +#include <stdint.h> #include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 07ee67a..3f943a3 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <bootmode.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/soc/intel/skylake/include/soc/pei_data.h b/src/soc/intel/skylake/include/soc/pei_data.h index 02e04c6..c76d0b5 100644 --- a/src/soc/intel/skylake/include/soc/pei_data.h +++ b/src/soc/intel/skylake/include/soc/pei_data.h @@ -30,7 +30,7 @@ #ifndef _PEI_DATA_H_ #define _PEI_DATA_H_ -#include <types.h> +#include <stdint.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 12ed26a..021012a 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <types.h> +#include <stdint.h> #include <string.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/mediatek/common/include/soc/timer.h b/src/soc/mediatek/common/include/soc/timer.h index babcbba..1fd21d4 100644 --- a/src/soc/mediatek/common/include/soc/timer.h +++ b/src/soc/mediatek/common/include/soc/timer.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_COMMON_TIMER_H #include <soc/addressmap.h> -#include <types.h> #define GPT4_MHZ 13 diff --git a/src/soc/mediatek/common/pll.c b/src/soc/mediatek/common/pll.c index 0968d2f..d293a66 100644 --- a/src/soc/mediatek/common/pll.c +++ b/src/soc/mediatek/common/pll.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <assert.h> #include <soc/pll.h> diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c index 9f2f3b9..5b5ca2e 100644 --- a/src/soc/mediatek/mt8173/ddp.c +++ b/src/soc/mediatek/mt8173/ddp.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <delay.h> #include <edid.h> diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c index a29c1c1..0a69e56 100644 --- a/src/soc/mediatek/mt8173/gpio.c +++ b/src/soc/mediatek/mt8173/gpio.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <assert.h> #include <gpio.h> -#include <types.h> enum { MAX_GPIO_NUMBER = 134, diff --git a/src/soc/mediatek/mt8173/include/soc/infracfg.h b/src/soc/mediatek/mt8173/include/soc/infracfg.h index 60a5209..1a947a2 100644 --- a/src/soc/mediatek/mt8173/include/soc/infracfg.h +++ b/src/soc/mediatek/mt8173/include/soc/infracfg.h @@ -17,7 +17,6 @@ #define __SOC_MEDIATEK_MT8173_INFRACFG_H__ #include <soc/addressmap.h> -#include <types.h> struct mt8173_infracfg_regs { u32 top_ckmuxsel; diff --git a/src/soc/mediatek/mt8173/include/soc/mipi.h b/src/soc/mediatek/mt8173/include/soc/mipi.h index aec0b25..6b13453 100644 --- a/src/soc/mediatek/mt8173/include/soc/mipi.h +++ b/src/soc/mediatek/mt8173/include/soc/mipi.h @@ -17,7 +17,7 @@ #define __SOC_MEDIATEK_MT8173_MIPI_H__ #include <soc/addressmap.h> -#include <types.h> +#include <stdint.h> struct mipi_rx_regs { uint32_t rev0[19]; diff --git a/src/soc/mediatek/mt8173/include/soc/mt6391.h b/src/soc/mediatek/mt8173/include/soc/mt6391.h index 65b2f7c..1d3810e 100644 --- a/src/soc/mediatek/mt8173/include/soc/mt6391.h +++ b/src/soc/mediatek/mt8173/include/soc/mt6391.h @@ -16,8 +16,6 @@ #ifndef __SOC_MEDIATEK_MT8173_MT6391_H__ #define __SOC_MEDIATEK_MT8173_MT6391_H__ -#include <types.h> - /* * PMIC definition */ diff --git a/src/soc/mediatek/mt8173/include/soc/pericfg.h b/src/soc/mediatek/mt8173/include/soc/pericfg.h index 5aa8542..b127673 100644 --- a/src/soc/mediatek/mt8173/include/soc/pericfg.h +++ b/src/soc/mediatek/mt8173/include/soc/pericfg.h @@ -17,7 +17,6 @@ #define __SOC_MEDIATEK_MT8173_PERICFG_H__ #include <soc/addressmap.h> -#include <types.h> struct mt8173_pericfg_regs { u32 rst0; diff --git a/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h b/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h index 3687a29..2fdf83e 100644 --- a/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h +++ b/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h @@ -18,7 +18,6 @@ #include <soc/addressmap.h> #include <soc/pmic_wrap_common.h> -#include <types.h> static struct mt8173_pwrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE; diff --git a/src/soc/mediatek/mt8173/mt6391.c b/src/soc/mediatek/mt8173/mt6391.c index 2656d72..b8849ae 100644 --- a/src/soc/mediatek/mt8173/mt6391.c +++ b/src/soc/mediatek/mt8173/mt6391.c @@ -12,13 +12,13 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <assert.h> #include <console/console.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/mt6391.h> #include <soc/pmic_wrap.h> -#include <types.h> #if CONFIG(DEBUG_PMIC) #define DEBUG_PMIC(level, x...) printk(level, x) diff --git a/src/soc/mediatek/mt8173/pll.c b/src/soc/mediatek/mt8173/pll.c index c59fa3f..e18c897 100644 --- a/src/soc/mediatek/mt8173/pll.c +++ b/src/soc/mediatek/mt8173/pll.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <assert.h> #include <delay.h> diff --git a/src/soc/mediatek/mt8173/rtc.c b/src/soc/mediatek/mt8173/rtc.c index 5b7d486..169d464 100644 --- a/src/soc/mediatek/mt8173/rtc.c +++ b/src/soc/mediatek/mt8173/rtc.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <soc/rtc_common.h> #include <soc/rtc.h> #include <soc/mt6391.h> diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_register.h b/src/soc/mediatek/mt8183/include/soc/dramc_register.h index 2487504..be7ca5c 100644 --- a/src/soc/mediatek/mt8183/include/soc/dramc_register.h +++ b/src/soc/mediatek/mt8183/include/soc/dramc_register.h @@ -16,7 +16,7 @@ #ifndef _DRAMC_REGISTER_H_ #define _DRAMC_REGISTER_H_ -#include <types.h> +#include <stdint.h> #include <soc/addressmap.h> struct dramc_no_regs_rk_counter { diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h index 81e3d91..5db8117 100644 --- a/src/soc/mediatek/mt8183/include/soc/emi.h +++ b/src/soc/mediatek/mt8183/include/soc/emi.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_EMI_H #include <stdint.h> -#include <types.h> #include <soc/dramc_common_mt8183.h> struct sdram_params { diff --git a/src/soc/mediatek/mt8183/include/soc/gpio.h b/src/soc/mediatek/mt8183/include/soc/gpio.h index 5a98953..47c5dbc 100644 --- a/src/soc/mediatek/mt8183/include/soc/gpio.h +++ b/src/soc/mediatek/mt8183/include/soc/gpio.h @@ -18,7 +18,7 @@ #include <soc/addressmap.h> #include <soc/gpio_common.h> -#include <types.h> +#include <stdint.h> enum { MAX_GPIO_REG_BITS = 32, diff --git a/src/soc/mediatek/mt8183/include/soc/infracfg.h b/src/soc/mediatek/mt8183/include/soc/infracfg.h index 922d977..55f39e4 100644 --- a/src/soc/mediatek/mt8183/include/soc/infracfg.h +++ b/src/soc/mediatek/mt8183/include/soc/infracfg.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_INFRACFG_H #include <soc/addressmap.h> -#include <types.h> struct mt8183_infracfg_regs { u32 reserved1[20]; diff --git a/src/soc/mediatek/mt8183/include/soc/mcucfg.h b/src/soc/mediatek/mt8183/include/soc/mcucfg.h index 0a1232a..2eaa75e 100644 --- a/src/soc/mediatek/mt8183/include/soc/mcucfg.h +++ b/src/soc/mediatek/mt8183/include/soc/mcucfg.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_MCUCFG_H #include <soc/addressmap.h> -#include <types.h> struct mt8183_mcucfg_regs { u32 mp0_ca7l_cache_config; diff --git a/src/soc/mediatek/mt8183/include/soc/pll.h b/src/soc/mediatek/mt8183/include/soc/pll.h index 5a5f58d..b9238ad 100644 --- a/src/soc/mediatek/mt8183/include/soc/pll.h +++ b/src/soc/mediatek/mt8183/include/soc/pll.h @@ -16,7 +16,6 @@ #ifndef SOC_MEDIATEK_MT8183_PLL_H #define SOC_MEDIATEK_MT8183_PLL_H -#include <types.h> #include <soc/pll_common.h> struct mtk_topckgen_regs { diff --git a/src/soc/mediatek/mt8183/include/soc/pmic_wrap.h b/src/soc/mediatek/mt8183/include/soc/pmic_wrap.h index da94230..b6c5ad1 100644 --- a/src/soc/mediatek/mt8183/include/soc/pmic_wrap.h +++ b/src/soc/mediatek/mt8183/include/soc/pmic_wrap.h @@ -18,7 +18,6 @@ #include <soc/addressmap.h> #include <soc/pmic_wrap_common.h> -#include <types.h> struct mt8183_pwrap_regs { u32 mux_sel; diff --git a/src/soc/mediatek/mt8183/include/soc/smi.h b/src/soc/mediatek/mt8183/include/soc/smi.h index e9051c2..245010d 100644 --- a/src/soc/mediatek/mt8183/include/soc/smi.h +++ b/src/soc/mediatek/mt8183/include/soc/smi.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_SMI_H #include <soc/addressmap.h> -#include <types.h> struct mt8183_smi_regs { u32 reserved1[64]; diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h index 5e7770e..8a6ef4f 100644 --- a/src/soc/mediatek/mt8183/include/soc/spm.h +++ b/src/soc/mediatek/mt8183/include/soc/spm.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_SPM_H #include <soc/addressmap.h> -#include <types.h> enum { SPM_PROJECT_CODE = 0xb16 diff --git a/src/soc/nvidia/tegra/pwm.h b/src/soc/nvidia/tegra/pwm.h index dba5465..82cd06f 100644 --- a/src/soc/nvidia/tegra/pwm.h +++ b/src/soc/nvidia/tegra/pwm.h @@ -17,8 +17,6 @@ #ifndef __SOC_NVIDIA_TEGRA_PWM_H #define __SOC_NVIDIA_TEGRA_PWM_H -#include <types.h> - /* Register definitions for the Tegra pwm controller */ #define NV_PWM_CSR_ENABLE_SHIFT 31 #define NV_PWM_CSR_PULSE_WIDTH_SHIFT 16 diff --git a/src/soc/nvidia/tegra210/dsi.c b/src/soc/nvidia/tegra210/dsi.c index 76054f0..0c3517a 100644 --- a/src/soc/nvidia/tegra210/dsi.c +++ b/src/soc/nvidia/tegra210/dsi.c @@ -12,6 +12,8 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + +#include <types.h> #include <console/console.h> #include <device/mmio.h> #include <stdint.h> diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h index 1093479..e14f493 100644 --- a/src/soc/nvidia/tegra210/include/soc/dma.h +++ b/src/soc/nvidia/tegra210/include/soc/dma.h @@ -17,6 +17,7 @@ #ifndef __NVIDIA_TEGRA210_DMA_H__ #define __NVIDIA_TEGRA210_DMA_H__ +#include <types.h> #include <inttypes.h> #include <soc/addressmap.h> diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c index 4e6bdf0..f81c2e6 100644 --- a/src/soc/nvidia/tegra210/mipi-phy.c +++ b/src/soc/nvidia/tegra210/mipi-phy.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index 6330779..a467675 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/cache.h> #include <device/mmio.h> #include <assert.h> diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h index 05a17c2..58b46ca 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h @@ -31,8 +31,6 @@ #ifndef _IPQ40XX_CDP_H_ #define _IPQ40XX_CDP_H_ -#include <types.h> - unsigned smem_get_board_machtype(void); typedef enum { diff --git a/src/soc/qualcomm/ipq40xx/include/soc/clock.h b/src/soc/qualcomm/ipq40xx/include/soc/clock.h index 8544c43..934d92e 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/clock.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/clock.h @@ -31,6 +31,7 @@ #ifndef __IPQ40XX_CLOCK_H_ #define __IPQ40XX_CLOCK_H_ +#include <types.h> #include <soc/iomap.h> /* UART clock @ 7.3728 MHz */ diff --git a/src/soc/qualcomm/ipq40xx/include/soc/gpio.h b/src/soc/qualcomm/ipq40xx/include/soc/gpio.h index 220ea93..dc57bb8 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/gpio.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/gpio.h @@ -31,8 +31,6 @@ #ifndef __SOC_QUALCOMM_IPQ40XX_GPIO_H_ #define __SOC_QUALCOMM_IPQ40XX_GPIO_H_ -#include <types.h> - #define GPIO_FUNC_ENABLE 1 #define GPIO_FUNC_DISABLE 0 #define FUNC_SEL_1 1 diff --git a/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h b/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h index 98147cf..8825945a 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/soc_services.h @@ -16,8 +16,6 @@ #ifndef __SOC_QUALCOMM_IPQ40XX_INCLUDE_SOC_SOC_SERVICES_H__ #define __SOC_QUALCOMM_IPQ40XX_INCLUDE_SOC_SOC_SERVICES_H__ -#include <types.h> - extern u8 _memlayout_cbmem_top[]; /* Returns zero on success, nonzero on failure. */ diff --git a/src/soc/qualcomm/ipq40xx/include/soc/usbl_if.h b/src/soc/qualcomm/ipq40xx/include/soc/usbl_if.h index 134b63f..49aca98 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/usbl_if.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/usbl_if.h @@ -32,8 +32,6 @@ #ifndef __SOC_QUALCOMM_IPQ40XX_INCLUDE_SOC_USBL_IF_H__ #define __SOC_QUALCOMM_IPQ40XX_INCLUDE_SOC_USBL_IF_H__ -#include <types.h> - typedef struct { u32 time_stamp; char msg[27]; diff --git a/src/soc/qualcomm/ipq40xx/mbn_header.h b/src/soc/qualcomm/ipq40xx/mbn_header.h index cedcf12..8b18b25 100644 --- a/src/soc/qualcomm/ipq40xx/mbn_header.h +++ b/src/soc/qualcomm/ipq40xx/mbn_header.h @@ -16,8 +16,6 @@ #ifndef __SOC_QCA_IPQ40XX_MBN_HEADER_H__ #define __SOC_QCA_IPQ40XX_MBN_HEADER_H__ -#include <types.h> - /* QCA firmware blob header gleaned from util/ipqheader/ipqheader.py */ struct mbn_header { diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h index 89636ac..147c4cb 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h +++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h @@ -16,7 +16,7 @@ #ifndef _IPQ806X_CDP_H_ #define _IPQ806X_CDP_H_ -#include <types.h> +#include <stdint.h> unsigned smem_get_board_machtype(void); diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h index 482dead..a9a26e7 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/clock.h +++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h @@ -33,6 +33,7 @@ #ifndef __IPQ860X_CLOCK_H_ #define __IPQ860X_CLOCK_H_ +#include <types.h> #include <soc/iomap.h> /* UART clock @ 7.3728 MHz */ diff --git a/src/soc/qualcomm/ipq806x/include/soc/gpio.h b/src/soc/qualcomm/ipq806x/include/soc/gpio.h index 3542991..41b3b1e 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/gpio.h +++ b/src/soc/qualcomm/ipq806x/include/soc/gpio.h @@ -33,8 +33,6 @@ #ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_ #define __SOC_QUALCOMM_IPQ806X_GPIO_H_ -#include <types.h> - #define GPIO_FUNC_ENABLE 1 #define GPIO_FUNC_DISABLE 0 #define FUNC_SEL_1 1 diff --git a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h index e7a6d68..2a0abac 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h +++ b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h @@ -16,8 +16,6 @@ #ifndef __SOC_QUALCOMM_IPQ806X_INCLUDE_SOC_SOC_SERVICES_H__ #define __SOC_QUALCOMM_IPQ806X_INCLUDE_SOC_SOC_SERVICES_H__ -#include <types.h> - extern u8 _memlayout_cbmem_top[]; /* Returns zero on success, nonzero on failure. */ diff --git a/src/soc/qualcomm/ipq806x/include/soc/usbl_if.h b/src/soc/qualcomm/ipq806x/include/soc/usbl_if.h index 3bbf023..dbad564 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/usbl_if.h +++ b/src/soc/qualcomm/ipq806x/include/soc/usbl_if.h @@ -29,8 +29,6 @@ #ifndef __SOC_QUALCOMM_IPQ806X_INCLUDE_SOC_USBL_IF_H__ #define __SOC_QUALCOMM_IPQ806X_INCLUDE_SOC_USBL_IF_H__ -#include <types.h> - typedef struct { u32 time_stamp; char msg[27]; diff --git a/src/soc/qualcomm/ipq806x/mbn_header.h b/src/soc/qualcomm/ipq806x/mbn_header.h index 1e6a32f..d5c7ff52 100644 --- a/src/soc/qualcomm/ipq806x/mbn_header.h +++ b/src/soc/qualcomm/ipq806x/mbn_header.h @@ -16,8 +16,6 @@ #ifndef __SOC_QUALCOMM_IPQ806X_MBN_HEADER_H__ #define __SOC_QUALCOMM_IPQ806X_MBN_HEADER_H__ -#include <types.h> - /* Qualcomm firmware blob header gleaned from util/ipqheader/ipqheader.py */ struct mbn_header { diff --git a/src/soc/qualcomm/sdm845/gpio.c b/src/soc/qualcomm/sdm845/gpio.c index a2a6fb9..25da6d8 100644 --- a/src/soc/qualcomm/sdm845/gpio.c +++ b/src/soc/qualcomm/sdm845/gpio.c @@ -14,7 +14,7 @@ */ #include <device/mmio.h> -#include <types.h> +#include <stdint.h> #include <delay.h> #include <timer.h> diff --git a/src/soc/qualcomm/sdm845/include/soc/clock.h b/src/soc/qualcomm/sdm845/include/soc/clock.h index 9f0533f..668d74a 100644 --- a/src/soc/qualcomm/sdm845/include/soc/clock.h +++ b/src/soc/qualcomm/sdm845/include/soc/clock.h @@ -14,7 +14,7 @@ */ #include <soc/addressmap.h> -#include <types.h> +#include <stdint.h> #ifndef __SOC_QUALCOMM_SDM845_CLOCK_H__ #define __SOC_QUALCOMM_SDM845_CLOCK_H__ diff --git a/src/soc/qualcomm/sdm845/include/soc/gpio.h b/src/soc/qualcomm/sdm845/include/soc/gpio.h index bb52097..61a8ed8 100644 --- a/src/soc/qualcomm/sdm845/include/soc/gpio.h +++ b/src/soc/qualcomm/sdm845/include/soc/gpio.h @@ -16,7 +16,7 @@ #ifndef _SOC_QUALCOMM_SDM845_GPIO_H_ #define _SOC_QUALCOMM_SDM845_GPIO_H_ -#include <types.h> +#include <stdint.h> #include <soc/addressmap.h> typedef struct { diff --git a/src/soc/qualcomm/sdm845/include/soc/symbols.h b/src/soc/qualcomm/sdm845/include/soc/symbols.h index 1c14c03..c8b8de1 100644 --- a/src/soc/qualcomm/sdm845/include/soc/symbols.h +++ b/src/soc/qualcomm/sdm845/include/soc/symbols.h @@ -17,7 +17,6 @@ #define _SOC_QUALCOMM_SDM845_SYMBOLS_H_ #include <symbols.h> -#include <types.h> DECLARE_REGION(ssram) DECLARE_REGION(bsram) diff --git a/src/soc/qualcomm/sdm845/uart_bitbang.c b/src/soc/qualcomm/sdm845/uart_bitbang.c index f39e0ef..ddf3736 100644 --- a/src/soc/qualcomm/sdm845/uart_bitbang.c +++ b/src/soc/qualcomm/sdm845/uart_bitbang.c @@ -15,7 +15,6 @@ #include <console/uart.h> #include <gpio.h> -#include <types.h> #define UART_TX_PIN GPIO(4) diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c index fa0990b..dedc383 100644 --- a/src/soc/rockchip/common/gpio.c +++ b/src/soc/rockchip/common/gpio.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <assert.h> #include <gpio.h> diff --git a/src/soc/rockchip/common/include/soc/gpio.h b/src/soc/rockchip/common/include/soc/gpio.h index 6660374..499a707 100644 --- a/src/soc/rockchip/common/include/soc/gpio.h +++ b/src/soc/rockchip/common/include/soc/gpio.h @@ -16,8 +16,6 @@ #ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_GPIO_H #define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_GPIO_H -#include <types.h> - #define GPIO(p, b, i) ((gpio_t){.port = p, .bank = GPIO_##b, .idx = i}) struct rockchip_gpio_regs { diff --git a/src/soc/rockchip/rk3288/crypto.c b/src/soc/rockchip/rk3288/crypto.c index 90275ff..75d5255 100644 --- a/src/soc/rockchip/rk3288/crypto.c +++ b/src/soc/rockchip/rk3288/crypto.c @@ -18,7 +18,7 @@ #include <delay.h> #include <soc/addressmap.h> #include <soc/soc.h> -#include <types.h> +#include <stdint.h> #include <vb2_api.h> enum rk3288_crypto_interrupt_bits { diff --git a/src/soc/rockchip/rk3288/include/soc/clock.h b/src/soc/rockchip/rk3288/include/soc/clock.h index b3c6302..a629789 100644 --- a/src/soc/rockchip/rk3288/include/soc/clock.h +++ b/src/soc/rockchip/rk3288/include/soc/clock.h @@ -17,7 +17,6 @@ #define __SOC_ROCKCHIP_RK3288_CLOCK_H__ #include <soc/addressmap.h> -#include <types.h> #define OSC_HZ (24*MHz) diff --git a/src/soc/rockchip/rk3288/include/soc/grf.h b/src/soc/rockchip/rk3288/include/soc/grf.h index 4a546ea..e0b7310 100644 --- a/src/soc/rockchip/rk3288/include/soc/grf.h +++ b/src/soc/rockchip/rk3288/include/soc/grf.h @@ -18,7 +18,6 @@ #include <soc/addressmap.h> #include <soc/soc.h> -#include <types.h> struct rk3288_grf_gpio_lh { u32 l; diff --git a/src/soc/rockchip/rk3288/include/soc/hdmi.h b/src/soc/rockchip/rk3288/include/soc/hdmi.h index fb20b4a..625554e 100644 --- a/src/soc/rockchip/rk3288/include/soc/hdmi.h +++ b/src/soc/rockchip/rk3288/include/soc/hdmi.h @@ -18,7 +18,6 @@ #ifndef __SOC_HDMI_H__ #define __SOC_HDMI_H__ -#include <types.h> #include <stdlib.h> #define HDMI_EDID_BLOCK_SIZE 128 diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c index b343bab..40ee591 100644 --- a/src/soc/rockchip/rk3288/sdram.c +++ b/src/soc/rockchip/rk3288/sdram.c @@ -22,7 +22,7 @@ #include <soc/soc.h> #include <soc/pmu.h> #include <string.h> -#include <types.h> +#include <stdint.h> struct rk3288_ddr_pctl_regs { u32 scfg; diff --git a/src/soc/rockchip/rk3399/include/soc/clock.h b/src/soc/rockchip/rk3399/include/soc/clock.h index 37a4c09..aa60600 100644 --- a/src/soc/rockchip/rk3399/include/soc/clock.h +++ b/src/soc/rockchip/rk3399/include/soc/clock.h @@ -17,7 +17,7 @@ #define __SOC_ROCKCHIP_RK3399_CLOCK_H__ #include <soc/addressmap.h> -#include <types.h> +#include <stdint.h> struct rk3399_pmucru_reg { u32 ppll_con[6]; diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h index 9bda967..b402a44 100644 --- a/src/soc/rockchip/rk3399/include/soc/grf.h +++ b/src/soc/rockchip/rk3399/include/soc/grf.h @@ -18,7 +18,6 @@ #include <soc/addressmap.h> #include <soc/soc.h> -#include <types.h> struct rk3399_grf_regs { u32 reserved[0x800]; diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h index f304d8f..a175027 100644 --- a/src/soc/rockchip/rk3399/include/soc/mipi.h +++ b/src/soc/rockchip/rk3399/include/soc/mipi.h @@ -16,6 +16,7 @@ #ifndef __RK_MIPI_H #define __RK_MIPI_H +#include <types.h> #include <stdlib.h> struct rk_mipi_regs { diff --git a/src/soc/rockchip/rk3399/include/soc/sdram.h b/src/soc/rockchip/rk3399/include/soc/sdram.h index 6fdb707..a9c569d 100644 --- a/src/soc/rockchip/rk3399/include/soc/sdram.h +++ b/src/soc/rockchip/rk3399/include/soc/sdram.h @@ -16,7 +16,7 @@ #ifndef __SOC_ROCKCHIP_RK3399_SDRAM_H__ #define __SOC_ROCKCHIP_RK3399_SDRAM_H__ -#include <types.h> +#include <stdint.h> enum { DDR3 = 3, diff --git a/src/soc/rockchip/rk3399/mipi.c b/src/soc/rockchip/rk3399/mipi.c index ee8cc2e..c861faa 100644 --- a/src/soc/rockchip/rk3399/mipi.c +++ b/src/soc/rockchip/rk3399/mipi.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <assert.h> #include <console/console.h> diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c index e01b3a6..e07a2fd 100644 --- a/src/soc/rockchip/rk3399/sdram.c +++ b/src/soc/rockchip/rk3399/sdram.c @@ -24,7 +24,7 @@ #include <soc/soc.h> #include <string.h> #include <timer.h> -#include <types.h> +#include <stdint.h> #define DDR_PI_OFFSET 0x800 #define DDR_PHY_OFFSET 0x2000 diff --git a/src/soc/samsung/exynos5250/gpio.c b/src/soc/samsung/exynos5250/gpio.c index 736f274..75e1608 100644 --- a/src/soc/samsung/exynos5250/gpio.c +++ b/src/soc/samsung/exynos5250/gpio.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <assert.h> #include <console/console.h> #include <device/mmio.h> diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index 1b8e785..bd3e319 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -20,7 +20,6 @@ #include <soc/cpu.h> #include <soc/periph.h> #include <soc/uart.h> -#include <types.h> #define RX_FIFO_COUNT_MASK 0xff #define RX_FIFO_FULL_MASK (1 << 8) diff --git a/src/soc/samsung/exynos5420/smp.c b/src/soc/samsung/exynos5420/smp.c index 5e16063..4fa9283 100644 --- a/src/soc/samsung/exynos5420/smp.c +++ b/src/soc/samsung/exynos5420/smp.c @@ -20,7 +20,7 @@ #include <soc/power.h> #include <stdlib.h> #include <string.h> -#include <types.h> +#include <stdint.h> /* ACTLR, L2CTLR L2ACTLR constants used in SMP core power up. */ diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index b2a0edd..70645bb 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -20,7 +20,6 @@ #include <soc/cpu.h> #include <soc/periph.h> #include <soc/uart.h> -#include <types.h> #define RX_FIFO_COUNT_MASK 0xff #define RX_FIFO_FULL_MASK (1 << 8) diff --git a/src/soc/sifive/fu540/include/soc/sdram.h b/src/soc/sifive/fu540/include/soc/sdram.h index 8610a7e..ab7d8ab 100644 --- a/src/soc/sifive/fu540/include/soc/sdram.h +++ b/src/soc/sifive/fu540/include/soc/sdram.h @@ -16,7 +16,7 @@ #ifndef __SOC_SIFIVE_FU540_SDRAM_H__ #define __SOC_SIFIVE_FU540_SDRAM_H__ -#include <types.h> +#include <stdint.h> void sdram_init(void); size_t sdram_size_mb(void); diff --git a/src/southbridge/amd/pi/hudson/gpio.h b/src/southbridge/amd/pi/hudson/gpio.h index f07855d..91b106f 100644 --- a/src/southbridge/amd/pi/hudson/gpio.h +++ b/src/southbridge/amd/pi/hudson/gpio.h @@ -17,7 +17,7 @@ #define _HUDSON_GPIO_H_ #include <southbridge/amd/common/amd_defs.h> -#include <types.h> +#include <stdint.h> #define CROS_GPIO_DEVICE_NAME "AmdKern" diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c index e1ea2ce..d6d7580 100644 --- a/src/southbridge/amd/pi/hudson/hudson.c +++ b/src/southbridge/amd/pi/hudson/hudson.c @@ -13,12 +13,11 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> - #include <arch/io.h> #include <device/mmio.h> #include <arch/acpi.h> - #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index abb92f2..abc11a9 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c index 6be6423..2724842 100644 --- a/src/southbridge/amd/rs780/early_setup.c +++ b/src/southbridge/amd/rs780/early_setup.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <device/pci_ops.h> #include <northbridge/amd/amdmct/mct/mct_d.h> #include <console/console.h> diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 3b801ba..a39b99b 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -17,6 +17,7 @@ #ifndef _SB700_EARLY_SETUP_C_ #define _SB700_EARLY_SETUP_C_ +#include <types.h> #include <stdint.h> #include <option.h> #include <arch/io.h> @@ -24,8 +25,8 @@ #include <console/console.h> #include <cpu/x86/msr.h> #include <device/pci.h> - #include <reset.h> + #include "sb700.h" #include "smbus.h" diff --git a/src/southbridge/amd/sb700/ide.c b/src/southbridge/amd/sb700/ide.c index 6734643..6dddce5 100644 --- a/src/southbridge/amd/sb700/ide.c +++ b/src/southbridge/amd/sb700/ide.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c index 39aef63..3cab3db 100644 --- a/src/southbridge/amd/sb700/sata.c +++ b/src/southbridge/amd/sb700/sata.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <delay.h> diff --git a/src/southbridge/amd/sb700/usb.c b/src/southbridge/amd/sb700/usb.c index da65311..edf03cd 100644 --- a/src/southbridge/amd/sb700/usb.c +++ b/src/southbridge/amd/sb700/usb.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index 3ee0a59..7021520 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index c7f668b..02936f8 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c index 16ae3c6..0699845 100644 --- a/src/southbridge/intel/common/pmutil.c +++ b/src/southbridge/intel/common/pmutil.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index b2cf49a..41eea8f 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <arch/acpi.h> diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index 17bedab..f5bca4d 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index cf7f277..aa19194 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index 0e7f35bc..6996a3f 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 8090a09..1a0367d 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index bd035de..dd2857b 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c index 667a853..67f69f6 100644 --- a/src/southbridge/intel/i82801jx/smihandler.c +++ b/src/southbridge/intel/i82801jx/smihandler.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 2c24bbf..af32ab3 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <types.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index fabe1c4..60f0735 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c index 8d4c4e6..9c9140b 100644 --- a/src/southbridge/intel/lynxpoint/acpi.c +++ b/src/southbridge/intel/lynxpoint/acpi.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <cbmem.h> -#include <types.h> #include <string.h> #include <version.h> diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index bfa112a..b9c4325 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -16,7 +16,6 @@ */ #include <delay.h> -#include <types.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/superio/ite/it8720f/superio.c b/src/superio/ite/it8720f/superio.c index 48bbfb2..415212a 100644 --- a/src/superio/ite/it8720f/superio.c +++ b/src/superio/ite/it8720f/superio.c @@ -21,7 +21,6 @@ #include <pc80/mc146818rtc.h> #include <superio/ite/common/env_ctrl.h> #include <superio/conf_mode.h> -#include <types.h> #include "chip.h" #include "it8720f.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/31892 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57aead27806e307b9827fc7ee2cd663f12ee6e5e Gerrit-Change-Number: 31892 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

6 32

Change in ...coreboot[master]: soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE
by Arthur Heymans (Code Review) 29 May '19

29 May '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31249 Change subject: soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE ...................................................................... soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE CONFIG_CBFS_SIZE is only meaningful to generate the default fmap layout and ought not to be used in the code directly. Change-Id: Iae72a9fb02d62d7548d34689f5eb371f34cd3d81 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/denverton_ns/bootblock/bootblock.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/31249/1 diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c index 110d67d..58144bd 100644 --- a/src/soc/intel/denverton_ns/bootblock/bootblock.c +++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c @@ -37,8 +37,8 @@ .MicrocodeRegionLength = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN, .CodeRegionBase = - (UINT32)(0x100000000ULL - CONFIG_CBFS_SIZE), - .CodeRegionLength = (UINT32)CONFIG_CBFS_SIZE, + (UINT32)(0x100000000ULL - CONFIG_ROM_SIZE), + .CodeRegionLength = (UINT32)CONFIG_ROM_SIZE, .Reserved1 = {0}, }, .FsptConfig = { -- To view, visit https://review.coreboot.org/c/coreboot/+/31249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae72a9fb02d62d7548d34689f5eb371f34cd3d81 Gerrit-Change-Number: 31249 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

6 5

Change in ...coreboot[master]: soc/intel/apollolake: Don't use CAR_GLOBAL
by Arthur Heymans (Code Review) 29 May '19

29 May '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30510 Change subject: soc/intel/apollolake: Don't use CAR_GLOBAL ...................................................................... soc/intel/apollolake: Don't use CAR_GLOBAL All platforms using this code have NO_CAR_GLOBAL_MIGRATION. Change-Id: I0f393385aa94f18c2e05af3b5a54999575323d18 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/apollolake/meminit.c M src/soc/intel/apollolake/mmap_boot.c M src/soc/intel/apollolake/romstage.c 3 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/30510/1 diff --git a/src/soc/intel/apollolake/meminit.c b/src/soc/intel/apollolake/meminit.c index 889bbde..a230222 100644 --- a/src/soc/intel/apollolake/meminit.c +++ b/src/soc/intel/apollolake/meminit.c @@ -21,7 +21,7 @@ #include <fsp/soc_binding.h> #include <string.h> -static size_t memory_size_mib CAR_GLOBAL; +static size_t memory_size_mib; size_t memory_in_system_in_mib(void) { diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c index 1c3077e..8174502 100644 --- a/src/soc/intel/apollolake/mmap_boot.c +++ b/src/soc/intel/apollolake/mmap_boot.c @@ -57,10 +57,10 @@ * */ -static size_t bios_size CAR_GLOBAL; +static size_t bios_size; -static struct mem_region_device shadow_dev CAR_GLOBAL; -static struct xlate_region_device real_dev CAR_GLOBAL; +static struct mem_region_device shadow_dev; +static struct xlate_region_device real_dev; static void bios_mmap_init(void) { diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 4f4f9f5..4133946 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -58,7 +58,7 @@ 0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42, }; -static uint32_t fsp_version CAR_GLOBAL; +static uint32_t fsp_version; /* High Performance Event Timer Configuration */ #define P2SB_HPTC 0x60 -- To view, visit https://review.coreboot.org/c/coreboot/+/30510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f393385aa94f18c2e05af3b5a54999575323d18 Gerrit-Change-Number: 30510 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 6

Change in ...coreboot[master]: src/drivers/intel/fsp1_0: Move PLATFORM_USES_FSP1_0
by Arthur Heymans (Code Review) 29 May '19

29 May '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30791 Change subject: src/drivers/intel/fsp1_0: Move PLATFORM_USES_FSP1_0 ...................................................................... src/drivers/intel/fsp1_0: Move PLATFORM_USES_FSP1_0 This is a better location. Change-Id: Ic1c86c26a66c33760484bb6a86e9763c148a7c96 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/Kconfig M src/drivers/intel/fsp1_0/Kconfig 2 files changed, 9 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/30791/1 diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 232fe63..608afd7 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -151,13 +151,6 @@ This option informs the MTRR code to use the RdMem and WrMem fields in the fixed MTRR MSRs. -config PLATFORM_USES_FSP1_0 - bool - default n - help - Selected for Intel processors/platform combinations that use the - Intel Firmware Support Package (FSP) 1.0 for initialization. - config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING def_bool n help diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index c7f6c18..4d1c4df 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -13,6 +13,15 @@ ## GNU General Public License for more details. ## +config PLATFORM_USES_FSP1_0 + bool + default n + select CACHE_MRC_SETTINGS + help + Selected for Intel processors/platform combinations that use the + Intel Firmware Support Package (FSP) 1.0 for initialization. + + if PLATFORM_USES_FSP1_0 comment "Intel FSP" -- To view, visit https://review.coreboot.org/c/coreboot/+/30791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1c86c26a66c33760484bb6a86e9763c148a7c96 Gerrit-Change-Number: 30791 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 5

Change in ...coreboot[master]: mb/lenovo/z61t/acpi_tables: Add critical and passive threshold
by Peter Lemenkov (Code Review) 27 May '19

27 May '19

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/31114 to review the following change. Change subject: mb/lenovo/z61t/acpi_tables: Add critical and passive threshold ...................................................................... mb/lenovo/z61t/acpi_tables: Add critical and passive threshold Add critical and passive threshold to be advertised in thermal zone 0. This commit follows up on commit afa627db with Change-Id Ic75a80994b27ac19651ed52b7fc3c00c65cd9c01. Change-Id: I7d645818d2b2f6b7c16d2d813bf982a55774561d Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/z61t/acpi_tables.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/31114/1 diff --git a/src/mainboard/lenovo/z61t/acpi_tables.c b/src/mainboard/lenovo/z61t/acpi_tables.c index 3e9a810..183b7fe 100644 --- a/src/mainboard/lenovo/z61t/acpi_tables.c +++ b/src/mainboard/lenovo/z61t/acpi_tables.c @@ -23,4 +23,7 @@ gnvs->cmap = 0x01; gnvs->cmbp = 0x01; + /* Set thermal levels */ + gnvs->tcrt = 100; + gnvs->tpsv = 90; } -- To view, visit https://review.coreboot.org/c/coreboot/+/31114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d645818d2b2f6b7c16d2d813bf982a55774561d Gerrit-Change-Number: 31114 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 3

Change in ...coreboot[master]: [UNTESTED]nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK
by Arthur Heymans (Code Review) 25 May '19

25 May '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30939 Change subject: [UNTESTED]nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK ...................................................................... [UNTESTED]nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK Not yet tested. Change-Id: I7e74838b0d5e9c192082084cfd9821996f0e4c50 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/mainboard/foxconn/d41s/Makefile.inc A src/mainboard/foxconn/d41s/bootblock.c M src/mainboard/foxconn/d41s/romstage.c M src/mainboard/intel/d510mo/Makefile.inc A src/mainboard/intel/d510mo/bootblock.c M src/mainboard/intel/d510mo/romstage.c M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/pineview/Makefile.inc M src/northbridge/intel/pineview/bootblock.c M src/northbridge/intel/pineview/pineview.h M src/northbridge/intel/pineview/romstage.c M src/southbridge/intel/i82801gx/Makefile.inc A src/southbridge/intel/i82801gx/bootblock_gcc.c 15 files changed, 149 insertions(+), 56 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/30939/1 diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 6566a01..e6e904d 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -20,4 +20,11 @@ hex default 0x4000 +config DCACHE_BSP_STACK_SIZE + hex + default 0x2000 + help + The amount of anticipated stack usage in CAR by bootblock and + other stages. + endif diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 868f6e5..c95e135 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -8,7 +8,9 @@ subdirs-y += ../hyperthreading subdirs-y += ../speedstep -cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S +bootblock-y += ../car/bootblock.c +bootblock-y += ../car/non-evict/cache_as_ram.S + postcar-y += ../car/non-evict/exit_car.S romstage-y += ../car/romstage.c diff --git a/src/mainboard/foxconn/d41s/Makefile.inc b/src/mainboard/foxconn/d41s/Makefile.inc index f3d7e76..abfc473 100644 --- a/src/mainboard/foxconn/d41s/Makefile.inc +++ b/src/mainboard/foxconn/d41s/Makefile.inc @@ -1,2 +1,3 @@ +bootblock-y += bootblock.c ramstage-y += cstates.c romstage-y += gpio.c diff --git a/src/mainboard/foxconn/d41s/bootblock.c b/src/mainboard/foxconn/d41s/bootblock.c new file mode 100644 index 0000000..86abba4 --- /dev/null +++ b/src/mainboard/foxconn/d41s/bootblock.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> + * Copyright (C) 2018 Arthur Heymans <arthur(a)aheymans.xyz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <southbridge/intel/i82801gx/i82801gx.h> +#include <superio/ite/common/ite.h> +#include <superio/ite/it8721f/it8721f.h> + +#define SERIAL_DEV PNP_DEV(0x2e, IT8721F_SP1) + +void bootblock_mainboard_early_init(void) +{ + /* Disable Serial IRQ */ + pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0xd0); + /* Decode range */ + pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, + pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010); + pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN | KBC_LPC_EN + | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN + | COMA_LPC_EN); + + /* Environment Controller */ + pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x00fc0a01); + + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/foxconn/d41s/romstage.c b/src/mainboard/foxconn/d41s/romstage.c index ade85e6..c7e6e55 100644 --- a/src/mainboard/foxconn/d41s/romstage.c +++ b/src/mainboard/foxconn/d41s/romstage.c @@ -15,31 +15,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> -#include <device/pnp_def.h> -#include <southbridge/intel/i82801gx/i82801gx.h> #include <northbridge/intel/pineview/pineview.h> -#include <superio/ite/common/ite.h> -#include <superio/ite/it8721f/it8721f.h> - -#define SERIAL_DEV PNP_DEV(0x2e, IT8721F_SP1) - -void mb_enable_lpc(void) -{ - /* Disable Serial IRQ */ - pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0xd0); - /* Decode range */ - pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, - pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010); - pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN | KBC_LPC_EN - | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN - | COMA_LPC_EN); - - /* Environment Controller */ - pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x00fc0a01); - - ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} void get_mb_spd_addrmap(u8 *spd_addrmap) { diff --git a/src/mainboard/intel/d510mo/Makefile.inc b/src/mainboard/intel/d510mo/Makefile.inc index f3d7e76..abfc473 100644 --- a/src/mainboard/intel/d510mo/Makefile.inc +++ b/src/mainboard/intel/d510mo/Makefile.inc @@ -1,2 +1,3 @@ +bootblock-y += bootblock.c ramstage-y += cstates.c romstage-y += gpio.c diff --git a/src/mainboard/intel/d510mo/bootblock.c b/src/mainboard/intel/d510mo/bootblock.c new file mode 100644 index 0000000..b66164e --- /dev/null +++ b/src/mainboard/intel/d510mo/bootblock.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <arch/io.h> +#include <device/pnp_def.h> +#include <southbridge/intel/i82801gx/i82801gx.h> +#include <superio/winbond/w83627thg/w83627thg.h> +#include <superio/winbond/common/winbond.h> + +#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) +#define SUPERIO_DEV PNP_DEV(0x4e, 0) + +void bootblock_mainboard_early_init(void) +{ + /* Disable Serial IRQ */ + pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0x00); + /* Decode range */ + pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, + pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010); + pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN + | CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN + | COMB_LPC_EN); + + pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN2_DEC, 0x7c0291); + + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c index 28e2e25..d9ec66b 100644 --- a/src/mainboard/intel/d510mo/romstage.c +++ b/src/mainboard/intel/d510mo/romstage.c @@ -14,31 +14,8 @@ * GNU General Public License for more details. */ -#include <arch/io.h> -#include <device/pnp_def.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <northbridge/intel/pineview/pineview.h> -#include <superio/winbond/w83627thg/w83627thg.h> -#include <superio/winbond/common/winbond.h> - -#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) -#define SUPERIO_DEV PNP_DEV(0x4e, 0) - -void mb_enable_lpc(void) -{ - /* Disable Serial IRQ */ - pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0x00); - /* Decode range */ - pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, - pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010); - pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN - | CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN - | COMB_LPC_EN); - - pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN2_DEC, 0x7c0291); - - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} void mb_pirq_setup(void) { diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index 6168305..773f1db 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -31,6 +31,7 @@ select POSTCAR_STAGE select POSTCAR_CONSOLE select SMM_TSEG + select C_ENVIRONMENT_BOOTBLOCK config BOOTBLOCK_NORTHBRIDGE_INIT string diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc index 524bcae..6323391 100644 --- a/src/northbridge/intel/pineview/Makefile.inc +++ b/src/northbridge/intel/pineview/Makefile.inc @@ -16,6 +16,8 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y) +bootblock-y += bootblock.c + ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c index 1fab845..373d476 100644 --- a/src/northbridge/intel/pineview/bootblock.c +++ b/src/northbridge/intel/pineview/bootblock.c @@ -12,11 +12,13 @@ */ #include <arch/io.h> -#define PCIEXBAR 0x60 +#include <cpu/intel/car/bootblock.h> +#include "pineview.h" + #define MMCONF_256_BUSSES 16 #define ENABLE 1 -static void bootblock_northbridge_init(void) +void bootblock_early_northbridge_init(void) { pci_io_write_config32(PCI_DEV(0,0,0), PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS | MMCONF_256_BUSSES | ENABLE); diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h index 65d21cf..f53ff17 100644 --- a/src/northbridge/intel/pineview/pineview.h +++ b/src/northbridge/intel/pineview/pineview.h @@ -236,7 +236,6 @@ u8 decode_pciebar(u32 *const base, u32 *const len); /* Mainboard romstage callback functions */ -void mb_enable_lpc(void); void get_mb_spd_addrmap(u8 *spd_addr_map); void mb_pirq_setup(void); /* optional */ diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c index 10ac0f5..b25c36e 100644 --- a/src/northbridge/intel/pineview/romstage.c +++ b/src/northbridge/intel/pineview/romstage.c @@ -55,17 +55,12 @@ if (bist == 0) enable_lapic(); - /* Disable watchdog timer */ - RCBA32(GCS) = RCBA32(GCS) | 0x20; - /* Enable GPIOs */ pci_write_config32(LPC_DEV, GPIO_BASE, DEFAULT_GPIOBASE | 1); pci_write_config8(LPC_DEV, GPIO_CNTL, 0x10); setup_pch_gpios(&mainboard_gpio_map); - mb_enable_lpc(); // nm10_enable_lpc - /* Initialize console device(s) */ console_init(); diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index 290794b..0864786 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -15,6 +15,8 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801GX),y) +bootblock-y += bootblock_gcc.c + ramstage-y += i82801gx.c ramstage-y += ac97.c ramstage-y += azalia.c diff --git a/src/southbridge/intel/i82801gx/bootblock_gcc.c b/src/southbridge/intel/i82801gx/bootblock_gcc.c new file mode 100644 index 0000000..8b9826a --- /dev/null +++ b/src/southbridge/intel/i82801gx/bootblock_gcc.c @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <cpu/intel/car/bootblock.h> +#include "i82801gx.h" + +static void enable_spi_prefetch(void) +{ + u8 reg8; + pci_devfn_t dev; + + dev = PCI_DEV(0, 0x1f, 0); + + reg8 = pci_read_config8(dev, 0xdc); + reg8 &= ~(3 << 2); + reg8 |= (2 << 2); /* Prefetching and Caching Enabled */ + pci_write_config8(dev, 0xdc, reg8); +} + +void bootblock_early_southbridge_init(void) +{ + enable_spi_prefetch(); + + /* Enable RCBA */ + pci_write_config32(PCI_DEV(0, 0x1f, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1); + + /* Enable upper 128bytes of CMOS */ + RCBA32(0x3400) = (1 << 2); + + /* Disable watchdog timer */ + RCBA32(GCS) = RCBA32(GCS) | 0x20; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/30939 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e74838b0d5e9c192082084cfd9821996f0e4c50 Gerrit-Change-Number: 30939 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

5 14

Change in ...coreboot[master]: Documentation: Add HP EliteBook 8760w
by Iru Cai (vimacs) (Code Review) 25 May '19

25 May '19

Hello Iru Cai, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/30950 to review the following change. Change subject: Documentation: Add HP EliteBook 8760w ...................................................................... Documentation: Add HP EliteBook 8760w Also add the HP EliteBook document from wiki. Change-Id: I189db9c279705af53d82af66d0c2e8afb6f84d73 Signed-off-by: Iru Cai <mytbk920423(a)gmail.com> --- A Documentation/mainboard/hp/8760w.md A Documentation/mainboard/hp/elitebook_series.md M Documentation/mainboard/index.md 3 files changed, 149 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/30950/1 diff --git a/Documentation/mainboard/hp/8760w.md b/Documentation/mainboard/hp/8760w.md new file mode 100644 index 0000000..ba4da7d --- /dev/null +++ b/Documentation/mainboard/hp/8760w.md @@ -0,0 +1,33 @@ +# HP EliteBook 8760w + +This page describes how to run coreboot on the [HP EliteBook 8760w]. + +## Required proprietary blobs + +- Intel Firmware Descriptor, ME and GbE firmware +- EC: please read [EliteBook Series](elitebook_series) + +## Flashing instructions + +HP EliteBook 8760w has an 8MB SOIC-8 flash chip on the bottom of the +mainboard. You just need to remove the service cover, and use an SOIC-8 +clip to read and flash the chip. + +## Untested + +- dock: serial port, parallel port, ... +- TPM +- S3 suspend/resume +- Gigabit Ethernet +- Using `me_cleaner` + +## Working + +- SeaBIOS payload +- EHCI debug: the port is at the right next to the charging port +- USB +- WLAN +- WWAN +- SATA + +[HP EliteBook 8760w]: https://support.hp.com/us-en/product/hp-elitebook-8760w-mobile-workstation/… diff --git a/Documentation/mainboard/hp/elitebook_series.md b/Documentation/mainboard/hp/elitebook_series.md new file mode 100644 index 0000000..6668928 --- /dev/null +++ b/Documentation/mainboard/hp/elitebook_series.md @@ -0,0 +1,111 @@ +# HP EliteBook series + +This document is about HP EliteBook series laptops up to Ivy Bridge era +which use SMSC KBC1126 as embedded controller. + +## EC + +SMSC KBC1098/KBC1126 has been used in HP EliteBooks for many generations. +They use similar EC firmware that will load other code and data from the +SPI flash chip, so we need to put some firmware blobs to the coreboot image. + +The following document takes EliteBook 2760p as an example. + +First, you need to extract the blobs needed by EC firmware using util/kbc1126. +You can extract them from your backup firmware image, or firmware update +provided by HP with [unar] as follows: + +```bash +wget https://ftp.hp.com/pub/softpaq/sp79501-80000/sp79710.exe +unar sp79710.exe +${COREBOOT_DIR}/util/kbc1126/kbc1126_ec_dump sp79710/Rompaq/68SOU.BIN +mv 68SOU.BIN.fw1 ${COREBOOT_DIR}/2760p-fw1.bin +mv 68SOU.BIN.fw2 ${COREBOOT_DIR}/2760p-fw2.bin +``` + +When you config coreboot, select: + +```text +Chipset ---> + [*] Add firmware images for KBC1126 EC + (2760p-fw1.bin) KBC1126 firmware #1 path and filename + (2760p-fw2.bin) KBC1126 filename #2 path and filename +``` + +## Super I/O + +EliteBook 8000 series laptops have SMSC LPC47n217 Super I/O to provide +a serial port and a parallel port, you can debug the laptop via this +serial port. + +## porting + +To port coreboot to an HP EliteBook laptop, you need to do the following: + +- select Kconfig option `EC_HP_KBC1126` +- select Kconfig option `SUPERIO_SMSC_LPC47N217` if there is LPC47n217 Super I/O +- initialize EC and Super I/O in romstage +- add EC and Super I/O support to devicetree.cb + +To get the related values for EC in devicetree.cb, you need to extract the EFI +module EcThermalInit from the vendor UEFI firmware with [UEFITool]. Usually, +`ec_data_port`, `ec_cmd_port` and `ec_ctrl_reg` has the following values: + +- For xx60 series: 0x60, 0x64, 0xca +- For xx70 series: 0x62, 0x66, 0x81 + +You can use [radare2] and the following [r2pipe] Python script to find +these values from the EcThermalInit EFI module: + +```python +#!/usr/bin/env python + +# install radare2 and use `pip3 install --user r2pipe` to install r2pipe + +import r2pipe +import sys + +if len(sys.argv) < 2: + fn = "ecthermalinit.efi" +else: + fn = sys.argv[1] + +r2 = r2pipe.open(fn) +r2.cmd("aa") +entryf = r2.cmdj("pdfj") + +for insn in entryf["ops"]: + if "lea r8" in insn["opcode"]: + _callback = insn["ptr"] + break + +r2.cmd("af @ {}".format(_callback)) +callbackf_insns = r2.cmdj("pdfj @ {}".format(_callback))["ops"] + +def find_port(addr): + ops = r2.cmdj("pdfj @ {}".format(addr))["ops"] + for insn in ops: + if "lea r8d" in insn["opcode"]: + return insn["ptr"] + +ctrl_reg_found = False + +for i in range(0, len(callbackf_insns)): + if not ctrl_reg_found and "mov cl" in callbackf_insns[i]["opcode"]: + ctrl_reg_found = True + ctrl_reg = callbackf_insns[i]["ptr"] + print("ec_ctrl_reg = 0x%02x" % ctrl_reg) + cmd_port = find_port(callbackf_insns[i+1]["jump"]) + data_port = find_port(callbackf_insns[i+3]["jump"]) + print("ec_cmd_port = 0x%02x\nec_data_port = 0x%02x" % (cmd_port, data_port)) + + if "mov bl" in callbackf_insns[i]["opcode"]: + ctrl_value = callbackf_insns[i]["ptr"] + print("ec_fan_ctrl_value = 0x%02x" % ctrl_value) +``` + + +[unar]: https://theunarchiver.com/command-line +[UEFITool]: https://github.com/LongSoft/UEFITool +[radare2]: https://radare.org/ +[r2pipe]: https://github.com/radare/radare2-r2pipe diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 4e2b742..606901f 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -46,6 +46,11 @@ - [Compaq 8200 Elite SFF](hp/compaq_8200_sff.md) +### EliteBook series + +- [EliteBook common](hp/elitebook_series.md) +- [EliteBook 8760w](hp/8760w.md) + ## Lenovo - [T4xx common](lenovo/t4xx_series.md) -- To view, visit https://review.coreboot.org/c/coreboot/+/30950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I189db9c279705af53d82af66d0c2e8afb6f84d73 Gerrit-Change-Number: 30950 Gerrit-PatchSet: 1 Gerrit-Owner: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-MessageType: newchange

2 5

Change in ...coreboot[master]: AGESA binaryPI: Add AGESA entry timestamps
by Kyösti Mälkki (Code Review) 25 May '19

25 May '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31515 Change subject: AGESA binaryPI: Add AGESA entry timestamps ...................................................................... AGESA binaryPI: Add AGESA entry timestamps Change-Id: I71e09d3bc4c8657979d447b90fb6ac7cae959479 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/drivers/amd/agesa/eventlog.c M src/drivers/amd/agesa/state_machine.c M src/northbridge/amd/agesa/state_machine.h 3 files changed, 37 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/31515/1 diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index 152011e..887da30 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -16,6 +16,7 @@ #include <console/console.h> #include <stdint.h> #include <string.h> +#include <timestamp.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/BiosCallOuts.h> @@ -30,54 +31,78 @@ { AGESA_STRUCT_NAME func; const char *name; + uint32_t entry_id; + uint32_t exit_id; }; static const struct agesa_mapping entrypoint[] = { { .func = AMD_INIT_RESET, .name = "AmdInitReset", + .entry_id = TS_AGESA_INIT_RESET_START, + .exit_id = TS_AGESA_INIT_RESET_DONE, }, { .func = AMD_INIT_EARLY, .name = "AmdInitEarly", + .entry_id = TS_AGESA_INIT_EARLY_START, + .exit_id = TS_AGESA_INIT_EARLY_DONE, }, { .func = AMD_INIT_POST, .name = "AmdInitPost", + .entry_id = TS_AGESA_INIT_POST_START, + .exit_id = TS_AGESA_INIT_POST_DONE, }, { .func = AMD_INIT_RESUME, .name = "AmdInitResume", + .entry_id = TS_AGESA_INIT_RESUME_START, + .exit_id = TS_AGESA_INIT_RESUME_DONE, }, { .func = AMD_INIT_ENV, .name = "AmdInitEnv", + .entry_id = TS_AGESA_INIT_ENV_START, + .exit_id = TS_AGESA_INIT_ENV_DONE, }, { .func = AMD_INIT_MID, .name = "AmdInitMid", + .entry_id = TS_AGESA_INIT_MID_START, + .exit_id = TS_AGESA_INIT_MID_DONE, }, { .func = AMD_INIT_LATE, .name = "AmdInitLate", + .entry_id = TS_AGESA_INIT_LATE_START, + .exit_id = TS_AGESA_INIT_LATE_DONE, }, { .func = AMD_S3LATE_RESTORE, .name = "AmdS3LateRestore", + .entry_id = TS_AGESA_S3_LATE_START, + .exit_id = TS_AGESA_S3_LATE_DONE, }, #if !defined(AMD_S3_SAVE_REMOVED) { .func = AMD_S3_SAVE, .name = "AmdS3Save", + .entry_id = TS_AGESA_INIT_RTB_START, + .exit_id = TS_AGESA_INIT_RTB_DONE, }, #endif { .func = AMD_S3FINAL_RESTORE, .name = "AmdS3FinalRestore", + .entry_id = TS_AGESA_S3_FINAL_START, + .exit_id = TS_AGESA_S3_FINAL_DONE, }, { .func = AMD_INIT_RTB, .name = "AmdInitRtb", + .entry_id = TS_AGESA_INIT_RTB_START, + .exit_id = TS_AGESA_INIT_RTB_DONE, }, }; @@ -92,6 +117,8 @@ for (i = 0; i < ARRAY_SIZE(entrypoint); i++) { if (task->func == entrypoint[i].func) { task->function_name = entrypoint[i].name; + task->ts_entry_id = entrypoint[i].entry_id; + task->ts_exit_id = entrypoint[i].exit_id; break; } } diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index f676192..4d56218 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -21,6 +21,8 @@ #include <arch/cpu.h> #include <bootstate.h> #include <cbfs.h> +#include <cbmem.h> +#include <timestamp.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> @@ -263,12 +265,18 @@ AMD_CONFIG_PARAMS *StdHeader = aip.NewStructPtr; ASSERT(StdHeader->Func == func); + if (task.ts_entry_id) + timestamp_add_now(task.ts_entry_id); + if (ENV_ROMSTAGE) final = romstage_dispatch(cb, func, StdHeader); if (ENV_RAMSTAGE) final = ramstage_dispatch(cb, func, StdHeader); + if (task.ts_exit_id) + timestamp_add_now(task.ts_exit_id); + agesawrapper_trace(final, StdHeader, task.function_name); ASSERT(final < AGESA_FATAL); diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h index 45d57c2..f1dd139 100644 --- a/src/northbridge/amd/agesa/state_machine.h +++ b/src/northbridge/amd/agesa/state_machine.h @@ -60,6 +60,8 @@ AGESA_STRUCT_NAME func; const char *function_name; + uint32_t ts_entry_id; + uint32_t ts_exit_id; }; void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func); -- To view, visit https://review.coreboot.org/c/coreboot/+/31515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71e09d3bc4c8657979d447b90fb6ac7cae959479 Gerrit-Change-Number: 31515 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: AGESA binaryPI: Redo entrypoints namelist
by Kyösti Mälkki (Code Review) 25 May '19

25 May '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31514 Change subject: AGESA binaryPI: Redo entrypoints namelist ...................................................................... AGESA binaryPI: Redo entrypoints namelist Stop assuming the list is complete with no gaps, and use a lookup-table to match AGESA_STRUCT_NAME types of the entrypoints we use with names. Change-Id: Ibef4690d8aa76ff5b47c879f5ceb9d8fc4c4c4cd Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/drivers/amd/agesa/eventlog.c 1 file changed, 62 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/31514/1 diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index 303af53..152011e 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2016 Kyösti Mälkki + * Copyright (C) 2016-2019 Kyösti Mälkki * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -26,45 +26,75 @@ static const char undefined[] = "undefined"; -/* Match order of enum AGESA_STRUCT_NAME. */ -static const char *AgesaFunctionNameStr[] = { - "AmdInitRecovery", "AmdCreateStruct", "AmdInitEarly", "AmdInitEnv", "AmdInitLate", - "AmdInitMid", "AmdInitPost", "AmdInitReset", "AmdInitResume", "AmdReleaseStruct", - "AmdS3LateRestore", "AmdS3Save", "AmdGetApicId", "AmdGetPciAddress", "AmdIdentifyCore", - "AmdReadEventLog", "AmdGetAvailableExeCacheSize", "AmdLateRunApTask", "AmdIdentifyDimm", - "Amd2dDataEye", "AmdS3FinalRestore", "AmdInitRtb" +struct agesa_mapping +{ + AGESA_STRUCT_NAME func; + const char *name; }; -/* This function has to match with enumeration of AGESA_STRUCT_NAME defined - * inside AMD.h header file. Unfortunately those are different across - * different vendorcode subtrees. - * - * TBD: Fix said header or move this function together with the strings above - * under vendorcode/ tree. - */ - -static const char *agesa_struct_name(AGESA_STRUCT_NAME state) -{ -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) - if ((state < AMD_INIT_RECOVERY) || (state > AMD_IDENTIFY_DIMMS)) - return undefined; - - int index = state - AMD_INIT_RECOVERY; -#else - state >>= 12; - if ((state < AMD_INIT_RECOVERY >> 12) || (state > AMD_IDENTIFY_DIMMS >> 12)) - return undefined; - - int index = state - (AMD_INIT_RECOVERY >> 12); +static const struct agesa_mapping entrypoint[] = { + { + .func = AMD_INIT_RESET, + .name = "AmdInitReset", + }, + { + .func = AMD_INIT_EARLY, + .name = "AmdInitEarly", + }, + { + .func = AMD_INIT_POST, + .name = "AmdInitPost", + }, + { + .func = AMD_INIT_RESUME, + .name = "AmdInitResume", + }, + { + .func = AMD_INIT_ENV, + .name = "AmdInitEnv", + }, + { + .func = AMD_INIT_MID, + .name = "AmdInitMid", + }, + { + .func = AMD_INIT_LATE, + .name = "AmdInitLate", + }, + { + .func = AMD_S3LATE_RESTORE, + .name = "AmdS3LateRestore", + }, +#if !defined(AMD_S3_SAVE_REMOVED) + { + .func = AMD_S3_SAVE, + .name = "AmdS3Save", + }, #endif - return AgesaFunctionNameStr[index]; -} + { + .func = AMD_S3FINAL_RESTORE, + .name = "AmdS3FinalRestore", + }, + { + .func = AMD_INIT_RTB, + .name = "AmdInitRtb", + }, +}; void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func) { + int i; + task->apic_id = (u8) (cpuid_ebx(1) >> 24); task->func = func; - task->function_name = agesa_struct_name(func); + task->function_name = undefined; + + for (i = 0; i < ARRAY_SIZE(entrypoint); i++) { + if (task->func == entrypoint[i].func) { + task->function_name = entrypoint[i].name; + break; + } + } printk(BIOS_DEBUG, "\nAPIC %02d: ** Enter %s [%08x]\n", task->apic_id, task->function_name, task->func); -- To view, visit https://review.coreboot.org/c/coreboot/+/31514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibef4690d8aa76ff5b47c879f5ceb9d8fc4c4c4cd Gerrit-Change-Number: 31514 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: AGESA: Move debug helper to eventlog file
by Kyösti Mälkki (Code Review) 25 May '19

25 May '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31513 Change subject: AGESA: Move debug helper to eventlog file ...................................................................... AGESA: Move debug helper to eventlog file Change-Id: I2d74f934936e250886526b9c8482f500628a1158 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/drivers/amd/agesa/eventlog.c M src/drivers/amd/agesa/state_machine.c M src/northbridge/amd/agesa/state_machine.h 3 files changed, 40 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/31513/1 diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index b80c220..303af53 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -1,6 +1,8 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2016 Kyösti Mälkki + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -18,6 +20,7 @@ #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <amdlib.h> +#include <debug_util.h> #include <AGESA.h> #include <AMD.h> @@ -40,7 +43,7 @@ * under vendorcode/ tree. */ -const char *agesa_struct_name(int state) +static const char *agesa_struct_name(AGESA_STRUCT_NAME state) { #if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) if ((state < AMD_INIT_RECOVERY) || (state > AMD_IDENTIFY_DIMMS)) @@ -57,6 +60,27 @@ return AgesaFunctionNameStr[index]; } +void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func) +{ + task->apic_id = (u8) (cpuid_ebx(1) >> 24); + task->func = func; + task->function_name = agesa_struct_name(func); + + printk(BIOS_DEBUG, "\nAPIC %02d: ** Enter %s [%08x]\n", + task->apic_id, task->function_name, task->func); +} + +void agesa_state_on_exit(struct agesa_state *task, + AMD_CONFIG_PARAMS *StdHeader) +{ + printk(BIOS_DEBUG, "APIC %02d: Heap in %s (%d) at 0x%08x\n", + task->apic_id, heap_status_name(StdHeader->HeapStatus), + StdHeader->HeapStatus, (u32)StdHeader->HeapBasePtr); + + printk(BIOS_DEBUG, "APIC %02d: ** Exit %s [%08x]\n", + task->apic_id, task->function_name, task->func); +} + /* * Possible AGESA_STATUS values: * diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index 672bca1..f676192 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -27,7 +27,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <amdlib.h> -#include <debug_util.h> #include <AMD.h> #if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) @@ -232,38 +231,6 @@ return status; } -/* DEBUG trace helper */ - -struct agesa_state -{ - u8 apic_id; - - AGESA_STRUCT_NAME func; - const char *function_name; -}; - -static void state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func, - const char *struct_name) -{ - task->apic_id = (u8) (cpuid_ebx(1) >> 24); - task->func = func; - task->function_name = struct_name; - - printk(BIOS_DEBUG, "\nAPIC %02d: ** Enter %s [%08x]\n", - task->apic_id, task->function_name, task->func); -} - -static void state_on_exit(struct agesa_state *task, - AMD_CONFIG_PARAMS *StdHeader) -{ - printk(BIOS_DEBUG, "APIC %02d: Heap in %s (%d) at 0x%08x\n", - task->apic_id, heap_status_name(StdHeader->HeapStatus), - StdHeader->HeapStatus, (u32)StdHeader->HeapBasePtr); - - printk(BIOS_DEBUG, "APIC %02d: ** Exit %s [%08x]\n", - task->apic_id, task->function_name, task->func); -} - int agesa_execute_state(struct sysinfo *cb, AGESA_STRUCT_NAME func) { AMD_INTERFACE_PARAMS aip; @@ -273,13 +240,12 @@ } agesa_params; void *buf = NULL; size_t len = 0; - const char *state_name = agesa_struct_name(func); AGESA_STATUS status, final; struct agesa_state task; memset(&task, 0, sizeof(task)); - state_on_entry(&task, func, state_name); + agesa_state_on_entry(&task, func); aip.StdHeader = cb->StdHeader; @@ -303,13 +269,13 @@ if (ENV_RAMSTAGE) final = ramstage_dispatch(cb, func, StdHeader); - agesawrapper_trace(final, StdHeader, state_name); + agesawrapper_trace(final, StdHeader, task.function_name); ASSERT(final < AGESA_FATAL); status = amd_release_struct(&aip); ASSERT(status == AGESA_SUCCESS); - state_on_exit(&task, &aip.StdHeader); + agesa_state_on_exit(&task, &aip.StdHeader); return (final < AGESA_FATAL) ? 0 : -1; } diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h index c7d654d..45d57c2 100644 --- a/src/northbridge/amd/agesa/state_machine.h +++ b/src/northbridge/amd/agesa/state_machine.h @@ -23,7 +23,6 @@ #define HAS_LEGACY_WRAPPER IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER) /* eventlog */ -const char *agesa_struct_name(int state); void agesawrapper_trace(AGESA_STATUS ret, AMD_CONFIG_PARAMS *StdHeader, const char *func); AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); @@ -54,6 +53,18 @@ void platform_once(struct sysinfo *cb); void agesa_set_interface(struct sysinfo *cb); + +struct agesa_state +{ + u8 apic_id; + + AGESA_STRUCT_NAME func; + const char *function_name; +}; + +void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func); +void agesa_state_on_exit(struct agesa_state *task, + AMD_CONFIG_PARAMS *StdHeader); int agesa_execute_state(struct sysinfo *cb, AGESA_STRUCT_NAME func); /* AGESA dispatchers */ -- To view, visit https://review.coreboot.org/c/coreboot/+/31513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d74f934936e250886526b9c8482f500628a1158 Gerrit-Change-Number: 31513 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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