coreboot-gerrit March 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by build bot (Jenkins) (Code Review) 05 Mar '19

05 Mar '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29563 ) Change subject: security/tpm: Fix TCPA log feature ...................................................................... Patch Set 64: (8 comments) https://review.coreboot.org/#/c/29563/64/src/include/memlayout.h File src/include/memlayout.h: https://review.coreboot.org/#/c/29563/64/src/include/memlayout.h@167 PS64, Line 167: #define VBOOT2_TPM_LOG(addr, size) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/#/c/29563/64/src/include/memlayout.h@167 PS64, Line 167: #define VBOOT2_TPM_LOG(addr, size) \ macros should not use a trailing semicolon https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c File src/security/tpm/tspi/log.c: https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@155 PS64, Line 155: struct tcpa_entry *tce = &ram_log->entries[ram_log->num_entries++]; line over 80 characters https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@156 PS64, Line 156: strncpy(tce->name, preram_log->entries[i].name, TCPA_PCR_HASH_NAME - 1); line over 80 characters https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@159 PS64, Line 159: if (preram_log->entries[i].digest_length > TCPA_DIGEST_MAX_LENGTH) { line over 80 characters https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@164 PS64, Line 164: strncpy(tce->digest_type, preram_log->entries[i].digest_type, TCPA_PCR_HASH_LEN - 1); line over 80 characters https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@165 PS64, Line 165: tce->digest_length = MIN(preram_log->entries[i].digest_length, TCPA_DIGEST_MAX_LENGTH); line over 80 characters https://review.coreboot.org/#/c/29563/64/src/security/tpm/tspi/log.c@166 PS64, Line 166: memcpy(tce->digest, preram_log->entries[i].digest, tce->digest_length); line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 64 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 05 Mar 2019 15:08:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by Philipp Deppenwiese (Code Review) 05 Mar '19

05 Mar '19

Hello Werner Zeh, Aaron Durbin, Julius Werner, Patrick Rudolph, Paul Menzel, David Hendricks, build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29563 to look at the new patch set (#64). Change subject: security/tpm: Fix TCPA log feature ...................................................................... security/tpm: Fix TCPA log feature Until now the TCPA log wasn't working correctly. * Refactor TCPA log code. * Add TCPA log dump fucntion. * Make TCPA log available in bootblock. * Fix TCPA log formatting. * Add x86 and Cavium memory for early log. Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- A Documentation/security/index.md M Documentation/security/vboot/measured_boot.md M src/arch/x86/car.ld M src/commonlib/include/commonlib/tcpa_log_serialized.h M src/include/memlayout.h M src/security/tpm/tspi.h M src/security/tpm/tspi/log.c M src/security/tpm/tspi/tspi.c M src/security/vboot/secdata_tpm.c M src/security/vboot/symbols.h M src/security/vboot/vboot_crtm.c M src/soc/cavium/cn81xx/include/soc/memlayout.ld M src/soc/imgtec/pistachio/include/soc/memlayout.ld M src/soc/mediatek/mt8173/include/soc/memlayout.ld M src/soc/mediatek/mt8183/include/soc/memlayout.ld M src/soc/nvidia/tegra124/include/soc/memlayout.ld M src/soc/nvidia/tegra210/include/soc/memlayout.ld M src/soc/samsung/exynos5250/include/soc/memlayout.ld M util/cbmem/cbmem.c 19 files changed, 351 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/29563/64 -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 64 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/fsp_broadwell_de: Use new memory clearing API
by Patrick Rudolph (Code Review) 05 Mar '19

05 Mar '19

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31551 ) Change subject: soc/intel/fsp_broadwell_de: Use new memory clearing API ...................................................................... Patch Set 10: (5 comments) https://review.coreboot.org/#/c/31551/8//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31551/8//COMMIT_MSG@10 PS8, Line 10: requested by security framework. > Please add a blank line below. Done https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/Makefile.i… File src/drivers/intel/fsp1_0/Makefile.inc: https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/Makefile.i… PS8, Line 52: romstage-y += $(call strip_quotes,$(CONFIG_FSP_SRC_PATH)) > Order it before ramstage? Done https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/fsp_util.c File src/drivers/intel/fsp1_0/fsp_util.c: https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/fsp_util.c… PS8, Line 84: STACK > stack? Done https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/fsp_util.c… PS8, Line 89: int64_t > Why not size_t? to small. https://review.coreboot.org/#/c/31551/8/src/drivers/intel/fsp1_0/fsp_util.c… PS8, Line 92: free > free_range so it doesn’t collide with the keyword? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/31551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaac34a9058ee002be71e7089605d80a8b72a3d4 Gerrit-Change-Number: 31551 Gerrit-PatchSet: 10 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Mar 2019 14:59:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/fsp_broadwell_de: Use new memory clearing API
by Patrick Rudolph (Code Review) 05 Mar '19

05 Mar '19

Hello Patrick Rudolph, Aaron Durbin, build bot (Jenkins), Patrick Georgi, Roy Wen, Huang Jin, York Yang, David Hendricks, Philipp Deppenwiese, David Guckian, Martin Roth, Jens Drenhaus, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31551 to look at the new patch set (#10). Change subject: soc/intel/fsp_broadwell_de: Use new memory clearing API ...................................................................... soc/intel/fsp_broadwell_de: Use new memory clearing API Select PLATFORM_HAS_DRAM_CLEAR and clear all DRAM after FSP-M if requested by security framework. Other FSP1.0 platforms are not supported, as platforms are to different for a clean solution. Preserve FSP below TSEG and stack which resides at 16MiB. Change-Id: Ieaac34a9058ee002be71e7089605d80a8b72a3d4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/intel/fsp1_0/Makefile.inc M src/soc/intel/fsp_broadwell_de/Kconfig M src/soc/intel/fsp_broadwell_de/romstage/romstage.c 3 files changed, 42 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/31551/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/31551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaac34a9058ee002be71e7089605d80a8b72a3d4 Gerrit-Change-Number: 31551 Gerrit-PatchSet: 10 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by build bot (Jenkins) (Code Review) 05 Mar '19

05 Mar '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29563 ) Change subject: security/tpm: Fix TCPA log feature ...................................................................... Patch Set 63: (8 comments) https://review.coreboot.org/#/c/29563/63/src/include/memlayout.h File src/include/memlayout.h: https://review.coreboot.org/#/c/29563/63/src/include/memlayout.h@167 PS63, Line 167: #define VBOOT2_TPM_LOG(addr, size) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/#/c/29563/63/src/include/memlayout.h@167 PS63, Line 167: #define VBOOT2_TPM_LOG(addr, size) \ macros should not use a trailing semicolon https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c File src/security/tpm/tspi/log.c: https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@155 PS63, Line 155: struct tcpa_entry *tce = &ram_log->entries[ram_log->num_entries++]; line over 80 characters https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@156 PS63, Line 156: strncpy(tce->name, preram_log->entries[i].name, TCPA_PCR_HASH_NAME - 1); line over 80 characters https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@159 PS63, Line 159: if (preram_log->entries[i].digest_length > TCPA_DIGEST_MAX_LENGTH) { line over 80 characters https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@164 PS63, Line 164: strncpy(tce->digest_type, preram_log->entries[i].digest_type, TCPA_PCR_HASH_LEN - 1); line over 80 characters https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@165 PS63, Line 165: tce->digest_length = MIN(preram_log->entries[i].digest_length, TCPA_DIGEST_MAX_LENGTH); line over 80 characters https://review.coreboot.org/#/c/29563/63/src/security/tpm/tspi/log.c@166 PS63, Line 166: memcpy(tce->digest, preram_log->entries[i].digest, tce->digest_length); line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 63 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 05 Mar 2019 14:57:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: security/tpm: Fix TCPA log feature
by Philipp Deppenwiese (Code Review) 05 Mar '19

05 Mar '19

Hello Werner Zeh, Aaron Durbin, Julius Werner, Patrick Rudolph, Paul Menzel, David Hendricks, build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29563 to look at the new patch set (#63). Change subject: security/tpm: Fix TCPA log feature ...................................................................... security/tpm: Fix TCPA log feature Until now the TCPA log wasn't working correctly. * Refactor TCPA log code. * Add TCPA log dump fucntion. * Make TCPA log available in bootblock. * Fix TCPA log formatting. * Add x86 and Cavium memory for early log. Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- A Documentation/security/index.md M Documentation/security/vboot/measured_boot.md M src/arch/x86/car.ld M src/commonlib/include/commonlib/tcpa_log_serialized.h M src/include/memlayout.h M src/security/tpm/tspi.h M src/security/tpm/tspi/log.c M src/security/tpm/tspi/tspi.c M src/security/vboot/secdata_tpm.c M src/security/vboot/symbols.h M src/security/vboot/vboot_crtm.c M src/soc/cavium/cn81xx/include/soc/memlayout.ld M src/soc/imgtec/pistachio/include/soc/memlayout.ld M src/soc/mediatek/mt8173/include/soc/memlayout.ld M src/soc/mediatek/mt8183/include/soc/memlayout.ld M src/soc/nvidia/tegra124/include/soc/memlayout.ld M src/soc/nvidia/tegra210/include/soc/memlayout.ld M src/soc/samsung/exynos5250/include/soc/memlayout.ld M util/cbmem/cbmem.c 19 files changed, 352 insertions(+), 84 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/29563/63 -- To view, visit https://review.coreboot.org/c/coreboot/+/29563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic93133531b84318f48940d34bded48cbae739c44 Gerrit-Change-Number: 29563 Gerrit-PatchSet: 63 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: drivers/intel/fsp1_0: Deduplicate code
by Jay Talbott (Code Review) 05 Mar '19

05 Mar '19

Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31713 ) Change subject: drivers/intel/fsp1_0: Deduplicate code ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/31713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I064ae67041c521ee92877cff30c814fce7b08e1f Gerrit-Change-Number: 31713 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Mar 2019 14:47:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: drivers/intel/fsp1_0: Use new memory clearing API
by Patrick Rudolph (Code Review) 05 Mar '19

05 Mar '19

Hello Patrick Rudolph, Aaron Durbin, build bot (Jenkins), Patrick Georgi, Roy Wen, Huang Jin, York Yang, David Hendricks, Philipp Deppenwiese, David Guckian, Martin Roth, Jens Drenhaus, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31551 to look at the new patch set (#9). Change subject: drivers/intel/fsp1_0: Use new memory clearing API ...................................................................... drivers/intel/fsp1_0: Use new memory clearing API Select PLATFORM_HAS_DRAM_CLEAR and clear all DRAM after FSP-M if requested by security framework. Preserve FSP below TSEG and stack which resides at 16MiB. Change-Id: Ieaac34a9058ee002be71e7089605d80a8b72a3d4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/intel/fsp1_0/Makefile.inc M src/drivers/intel/fsp1_0/fsp_util.c M src/northbridge/intel/fsp_rangeley/fsp/Kconfig M src/soc/intel/fsp_broadwell_de/fsp/Kconfig M src/vendorcode/intel/Makefile.inc 5 files changed, 51 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/31551/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/31551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaac34a9058ee002be71e7089605d80a8b72a3d4 Gerrit-Change-Number: 31551 Gerrit-PatchSet: 9 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by build bot (Jenkins) (Code Review) 05 Mar '19

05 Mar '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 16: (3 comments) https://review.coreboot.org/#/c/30414/16/src/mainboard/facebook/fbg1701/irq… File src/mainboard/facebook/fbg1701/irqroute.h: https://review.coreboot.org/#/c/30414/16/src/mainboard/facebook/fbg1701/irq… PS16, Line 40: #define PCI_DEV_PIRQ_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/16/src/mainboard/facebook/fbg1701/irq… PS16, Line 62: #define PIRQ_PIC_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/16/src/soc/intel/braswell/include/soc… File src/soc/intel/braswell/include/soc/irq.h: https://review.coreboot.org/#/c/30414/16/src/soc/intel/braswell/include/soc… PS16, Line 211: ((PIRQ ## b_) << 4) | ((PIRQ ## a_) << 0) code indent should use tabs where possible -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 16 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Mar 2019 14:20:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 05 Mar '19

05 Mar '19

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#16). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit Create Facebook FBG-1701 coreboot implementation coreboot implementation is prepared for Bootblock, measured boot and verified boot support. These features are default disabled. This Braswell implementation is based on Intel Strago. Additional pair of '()' is removed in PCI_DEV_PIRQ_ROUTE solving Gerrit reporting "Macros with complex values should be enclosed in parentheses". BUG=N/A TEST=Facebook FBG-1701 booting Embedded Linux Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/dptf.asl A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/board_mboot.c A src/mainboard/facebook/fbg1701/board_verified_boot.c A src/mainboard/facebook/fbg1701/board_verified_boot.h A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/fmap.fmd A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/manifest.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex A src/mainboard/facebook/fbg1701/w25q64.c M src/soc/intel/braswell/include/soc/irq.h 37 files changed, 2,449 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 16 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2019