coreboot-gerrit March 2019

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Change in ...coreboot[master]: rmodule: Add support for R_X86_64_PLT32
by Patrick Rudolph (Code Review) 06 Mar '19

06 Mar '19

Hello Aaron Durbin, Sol Boucher, Julius Werner, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31468 to look at the new patch set (#3). Change subject: rmodule: Add support for R_X86_64_PLT32 ...................................................................... rmodule: Add support for R_X86_64_PLT32 The recent toolchain update also updated binutils, which has a new relocation type, introduced with commit bd7ab16b (x86-64: Generate branch with PLT32 relocation). Add support for R_X86_64_PLT32, which is handled as R_X86_64_PC32. Add comment explaining the situation. Fixes build error on x86_64. Change-Id: I81350d2728c20ac72cc865e7ba92319858352632 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M util/cbfstool/rmodule.c 1 file changed, 8 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/31468/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/31468 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81350d2728c20ac72cc865e7ba92319858352632 Gerrit-Change-Number: 31468 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sol Boucher <solb(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: [WIP]arch/x86/postcar: Add x86_64 support
by Patrick Rudolph (Code Review) 06 Mar '19

06 Mar '19

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30500 to look at the new patch set (#4). Change subject: [WIP]arch/x86/postcar: Add x86_64 support ...................................................................... [WIP]arch/x86/postcar: Add x86_64 support Add support for loading GDT on x86_64. Add x86_64 assembly code to do the same as the x86_32 code. Tested on qemu x86_32 and x86_64 using additional MTRRs. Needs test on real hardware. Change-Id: I1c190627f5f0ed6f82738cb99423892382899d7b Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/arch/x86/Makefile.inc M src/arch/x86/exit_car.S M src/arch/x86/gdt_init.S 3 files changed, 75 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/30500/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c190627f5f0ed6f82738cb99423892382899d7b Gerrit-Change-Number: 30500 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: util/amdfwtool: Streamline functions with context
by Marshall Dawson (Code Review) 06 Mar '19

06 Mar '19

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31734 ) Change subject: util/amdfwtool: Streamline functions with context ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/31734/2/util/amdfwtool/amdfwtool.c File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/#/c/31734/2/util/amdfwtool/amdfwtool.c@472 PS2, Line 472: exceeds > exceed Done -- To view, visit https://review.coreboot.org/c/coreboot/+/31734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ad12fa5d615d1aa3648db40e3ea75f8cf2ed59a Gerrit-Change-Number: 31734 Gerrit-PatchSet: 3 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Mar 2019 17:54:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/amdfwtool: Split type field for PSP entries
by Marshall Dawson (Code Review) 06 Mar '19

06 Mar '19

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31735 ) Change subject: util/amdfwtool: Split type field for PSP entries ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/31735/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31735/2//COMMIT_MSG@10 PS2, Line 10: NDA only > Can you please still note the name of the spec? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/31735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If8f33000c31cba21f286f54459de185c21e46268 Gerrit-Change-Number: 31735 Gerrit-PatchSet: 3 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Mar 2019 17:53:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/amd/stoneyridge: Convert SMU fanless options
by Marshall Dawson (Code Review) 06 Mar '19

06 Mar '19

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31736 ) Change subject: soc/amd/stoneyridge: Convert SMU fanless options ...................................................................... Patch Set 3: > Could be squashed in the commit before. I wanted to keep src/ and util/ changes separated. -- To view, visit https://review.coreboot.org/c/coreboot/+/31736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaae4094251974b8dad48b8d2c37bb2e43a412237 Gerrit-Change-Number: 31736 Gerrit-PatchSet: 3 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 05 Mar 2019 17:52:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci: Place MMCONF_BASE_ADDRESS in const variable
by Aaron Durbin (Code Review) 06 Mar '19

06 Mar '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31752 ) Change subject: device/pci: Place MMCONF_BASE_ADDRESS in const variable ...................................................................... Patch Set 2: (2 comments) https://review.coreboot.org/#/c/31752/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31752/2//COMMIT_MSG@10 PS2, Line 10: optimisation, specially when multiple registers on > Seemed to reduce code to (base | bus:dev. […] So it loaded the base | bus:dev.fn one time and then OR'd in the register offset vs reloading everything? You might be able to achieve the same thing by using a local variable in the inline function. Not sure if that would pick up the constant folding optimization or not. Worth a try, I suppose. https://review.coreboot.org/#/c/31752/2/src/include/device/pci_mmio_cfg.h File src/include/device/pci_mmio_cfg.h: https://review.coreboot.org/#/c/31752/2/src/include/device/pci_mmio_cfg.h@24 PS2, Line 24: extern const uintptr_t var_mmconf_base; > It's in global scope, if not declared const compiler could not optimise it. […] I get that one could work around things by casting to a mutable varible to accommodate a change. However, if we actually applied proper protection to .text and read only segments this would hack would be impossible. -- To view, visit https://review.coreboot.org/c/coreboot/+/31752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id112aa5e729ffd8015bb806786bdee38783b7ea9 Gerrit-Change-Number: 31752 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Mar 2019 17:31:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci: Place MMCONF_BASE_ADDRESS in const variable
by Kyösti Mälkki (Code Review) 06 Mar '19

06 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31752 ) Change subject: device/pci: Place MMCONF_BASE_ADDRESS in const variable ...................................................................... Patch Set 2: (2 comments) https://review.coreboot.org/#/c/31752/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31752/2//COMMIT_MSG@10 PS2, Line 10: optimisation, specially when multiple registers on > In what way? Such that register is loaded once? Isn't the constant folding already done? This feels […] Seemed to reduce code to (base | bus:dev.fn) loaded just once, instead of loading immediate (base | register) for every single register access. For many cases, PCI register constant is 8bit immediate. I'll paste some examples once I have x86_64 for comparison. https://review.coreboot.org/#/c/31752/2/src/include/device/pci_mmio_cfg.h File src/include/device/pci_mmio_cfg.h: https://review.coreboot.org/#/c/31752/2/src/include/device/pci_mmio_cfg.h@24 PS2, Line 24: extern const uintptr_t var_mmconf_base; > What's the point of this? If it's const it can't be changed, right? It's in global scope, if not declared const compiler could not optimise it. Maybe there is better way to achieve the same? Even if declared const here, with casting ramstage could still change this (and the BAR !) to effectively move PCIe config region. -- To view, visit https://review.coreboot.org/c/coreboot/+/31752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id112aa5e729ffd8015bb806786bdee38783b7ea9 Gerrit-Change-Number: 31752 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 05 Mar 2019 17:05:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qualcomm/qcs405: Add support for USB host mode ...
by build bot (Jenkins) (Code Review) 06 Mar '19

06 Mar '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29966 ) Change subject: TEMP: NOT FOR REVIEW: qualcomm/qcs405: Add support for USB host mode for mistral platform ...................................................................... Patch Set 13: (7 comments) https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… File src/mainboard/google/mistral/mainboard.c: https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 49: if (IS_ENABLED(CONFIG_CHROMEOS)) { code indent should use tabs where possible https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 49: if (IS_ENABLED(CONFIG_CHROMEOS)) { please, no spaces at the start of a line https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 50: /* Copy WIFI calibration data into CBMEM. */ code indent should use tabs where possible https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 51: cbmem_add_vpd_calibration_data(); code indent should use tabs where possible https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 51: cbmem_add_vpd_calibration_data(); please, no spaces at the start of a line https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 52: } code indent should use tabs where possible https://review.coreboot.org/#/c/29966/13/src/mainboard/google/mistral/mainb… PS13, Line 52: } please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/29966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35ec549b49b9789389c80843f6103e7243d52aac Gerrit-Change-Number: 29966 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-Comment-Date: Tue, 05 Mar 2019 16:57:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qcs405: Add GPIO API
by build bot (Jenkins) (Code Review) 06 Mar '19

06 Mar '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29955 ) Change subject: TEMP: NOT FOR REVIEW: qcs405: Add GPIO API ...................................................................... Patch Set 13: (1 comment) https://review.coreboot.org/#/c/29955/13/src/soc/qualcomm/qcs405/include/so… File src/soc/qualcomm/qcs405/include/soc/gpio.h: https://review.coreboot.org/#/c/29955/13/src/soc/qualcomm/qcs405/include/so… PS13, Line 90: #define PIN(index, tlmm, func1, func2, func3, func4, func5, func6, func7) \ Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/29955 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85ce9007c545b44371c4704a0456774d0eff12a8 Gerrit-Change-Number: 29955 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-Comment-Date: Tue, 05 Mar 2019 16:57:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: libpayload: qcs405: Add new Configs
by Name of user not set (Code Review) 06 Mar '19

06 Mar '19

Hello build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29953 to look at the new patch set (#13). Change subject: libpayload: qcs405: Add new Configs ...................................................................... libpayload: qcs405: Add new Configs Add Additional configs to enable Timer and CHROMEOS build. TEST=build Change-Id: I15273fdacab0a23e05e821c433cf939be35fab97 Signed-off-by: Sricharan R <sricharan(a)codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org> --- A payloads/libpayload/configs/config.mistral 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/29953/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/29953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15273fdacab0a23e05e821c433cf939be35fab97 Gerrit-Change-Number: 29953 Gerrit-PatchSet: 13 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sricharan Ramabadhran <srichara(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2019