Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33928 )
Change subject: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE
......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33928/12//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/33928/12//COMMIT_MSG@15
PS12, Line 15: For via/epia-m850, switch romstage udelay() from UDELAY_IO to
: UDELAY_TSC.
> Should we wait for the next release? I think the via platform will be dropped.
Well, via/epia-m850 should have been separate change, not squashed here. This commit should be only about flipping TSC_CONSTANT_RATE Kconfig and naming it better.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )
Change subject: soc/intel/tigerlake: Do initial SoC commit
......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36087/10/src/soc/intel/tigerlake/M…
File src/soc/intel/tigerlake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36087/10/src/soc/intel/tigerlake/M…
PS10, Line 1: feq ($(CONFIG_SOC_INTEL_TIGERLAKE),y)
> one question. is that all means all stages like
>
> bootblock-y += somefile.c
> verstage-y += somefile.c
> romstage-y += somefile.c
> postcar-y += somefile.c
> ramstage-y += somefile.c
> smm-y += somefile.c
>
> or it excludes smm files?
The decision was made to exclude smm as it's not really a stage. So smm-y is still explicitly needed.
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36541 )
Change subject: [TEST] test CB:36444
......................................................................
Uploaded patch set 2: Patch Set 1 was rebased.
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36444 )
Change subject: device/Kconfig: hide display menu when NO_GFX_INIT is selected
......................................................................
Uploaded patch set 4.
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Hello Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36444
to look at the new patch set (#4).
Change subject: device/Kconfig: hide display menu when NO_GFX_INIT is selected
......................................................................
device/Kconfig: hide display menu when NO_GFX_INIT is selected
Hide display menu when NO_GFX_INIT is selected.
This also adds a config to make Jenkins test this.
Change-Id: Iec5a47f84b8c776a45edc6f4b31a03b9ac714b4e
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
A configs/config.no_gfx_init
M src/device/Kconfig
2 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/36444/4
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Joel Kitching has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36341 )
Change subject: security/vboot: Build vboot library with same .a that depthcharge uses
......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36341/14/src/security/vboot/Makefi…
File src/security/vboot/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36341/14/src/security/vboot/Makefi…
PS14, Line 113: VB_
Can we call this VBOOT_LIB?
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )
Change subject: soc/intel/tigerlake: Do initial SoC commit
......................................................................
Patch Set 10:
> Patch Set 10:
>
> > > > > That doesn't mean we shouldn't review the Tiger Lake addition. And
> > > > > I think we all agreed already that a 8k LOC patch isn't reviewable.
> > > > > And of course, if we had more common code already, it would be much
> > > > > easier... and we would have a better code base if 3ee54bb hadn't
> > > > > slipped in. Let's not repeat that error.
> > > >
> > > > Sure, i believe Arthur has done great work of taking pain to review this CL. we have address majority of his feedback and few more is there. will continue to address also will see if we can submit this CL into 4 part
> > > >
> > > > 1. Bootblock (soc/intel/tigerlake/bootblock/)
> > > > 2. romstage (soc/intel/tigerlake/romstage/)
> > > > 3. ramstage (soc/intel/tigerlake/)
> > > > 4. acpi (soc/intel/tigerlake/acpi/)
> > >
> > > I still don't think "this CL" is a good idea, even if split up. Any
> > > commit history that first copies stale code and then adapts it in
> > > later commits (instead of adding the adapted code step by step) will
> > > lose lots of information.
> > >
> > > For instance, I assume some developers have already looked at the
> > > copied code and identified chunks that can stay the same. A copy
> > > first, adapt later commit history will not contain this information.
> > > It would contain details about what was changed, but not about what
> > > wasn't. OTOH, if the commit that adds (pieces of) unchanged code
> > > targets a single topic, and the commit message states that this was
> > > confirmed to work on the new platform, nobody will have to doubt
> > > if that was already checked. And the information will be in the Git
> > > history and can help future maintenance.
> >
> > i understand you are suggesting for incremental patches to create TGL code in upstream. but the philosophy i'm referring is that, we have already reviewed ICL code many time and should't we allow ICL code as is when we are renaming as TGL (this is copy patch logic) and then add only 8 CL to make TGL code complete. Rather we have many CL (definitely more than 8) to even reach at any stage in incremental approach. I agree that incremental approach is easy to review entire code but do we really like to review ICL code again in TGL development?
>
> Well, I don't think ICL code was much reviewed either. Every line got
> a +2 at some point, yes. But that doesn't mean half of it wasn't rubber
> stamped. And you seem to completely ignore that reviewing includes to
> check available documentation (for the newer silicon and FSP).
Yes, you are right in terms of ICL code because of not active chrome product out. But ICL is kind of base for next generation platform hence targeting ICL code.
Thanks to all reviewers help to make ICL code in shape, really appreciate all help here.
>
> If you want to catch subtle difference between ICL and TGL silicon
> and FSP interface early, the incremental approach seems so much easier.
> If you copy first, please mention in the commit message which parts
> were identified to behave exactly the same and which will be adapted
> in future commits. Then, reviewers can confirm that. However, if that
> requires to look ahead in the patch queue for every other line of code,
> you'll likely scare the best reviewers away.
yes, will capture those increment changes expectation in commit msg so we know what we are expecting to get at each CL when we split this one in multiple smaller CL
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )
Change subject: soc/intel/tigerlake: Do initial SoC commit
......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36087/10/src/soc/intel/tigerlake/M…
File src/soc/intel/tigerlake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36087/10/src/soc/intel/tigerlake/M…
PS10, Line 1: feq ($(CONFIG_SOC_INTEL_TIGERLAKE),y)
> Thanks and this is great.
>
> btw, do you want me to use alt from ICL or lets start using the same from TGL ?
It's always nice to backport some improvements to older targets, but that is never a requirement per se.
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