coreboot-gerrit November 2019

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Change in coreboot[master]: payloads/external/GRUB2: fix constantly rebuilding due to git checkout
by Michael Niewöhner (Code Review) 04 Nov '19

04 Nov '19

Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36343 ) Change subject: payloads/external/GRUB2: fix constantly rebuilding due to git checkout ...................................................................... payloads/external/GRUB2: fix constantly rebuilding due to git checkout Multiple git checkouts cause GRUB2 to constantly rebuild even if there were no changes to code or config. This is due to changing timestamps. Fix this by not creating or switching branches but instead rely on `git checkout -f` which does not touch existing unchanged files. Change-Id: I7cf66f63268de973a654146a0a47c3d5ca516d4d Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M payloads/external/GRUB2/Makefile 1 file changed, 4 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/36343/1 diff --git a/payloads/external/GRUB2/Makefile b/payloads/external/GRUB2/Makefile index b433bc0..7654f5f 100644 --- a/payloads/external/GRUB2/Makefile +++ b/payloads/external/GRUB2/Makefile @@ -1,4 +1,4 @@ -TAG-$(CONFIG_GRUB2_MASTER)= +TAG-$(CONFIG_GRUB2_MASTER)=origin/HEAD TAG-$(CONFIG_GRUB2_REVISION)=$(CONFIG_GRUB2_REVISION_ID) TAG-$(CONFIG_GRUB2_STABLE)=grub-2.04 NAME-$(CONFIG_GRUB2_MASTER)=HEAD @@ -15,14 +15,9 @@ checkout: echo " GIT GRUB2 $(NAME-y)" - test -d grub2 || \ - git clone $(project_git_repo) $(project_dir) - cd grub2 && \ - git checkout master && \ - git pull; \ - test -n "$(TAG-y)" && \ - git branch -f $(NAME-y) $(TAG-y) && \ - git checkout $(NAME-y) || true + test -d grub2 || git clone $(project_git_repo) $(project_dir) + git -C grub2 fetch + git -C grub2 checkout -f $(TAG-y) grub2/build/config.h: $(CONFIG_DEP) | checkout echo " CONFIG GRUB2 $(NAME-y)" -- To view, visit https://review.coreboot.org/c/coreboot/+/36343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cf66f63268de973a654146a0a47c3d5ca516d4d Gerrit-Change-Number: 36343 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner Gerrit-MessageType: newchange

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Change in coreboot[master]: vendorcode/eltan/security: corrected debug output
by Wim Vervoorn (Code Review) 04 Nov '19

04 Nov '19

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36484 ) Change subject: vendorcode/eltan/security: corrected debug output ...................................................................... vendorcode/eltan/security: corrected debug output Corrected debug ouput in tpm2_get_capability_pcrs. BUG=N/A TEST=build Change-Id: Ibd12c9dc22980f21ecba204729c5da0d11618e12 Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> --- M src/vendorcode/eltan/security/mboot/mboot.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/36484/1 diff --git a/src/vendorcode/eltan/security/mboot/mboot.c b/src/vendorcode/eltan/security/mboot/mboot.c index 3799b8a..2f33a3d 100644 --- a/src/vendorcode/eltan/security/mboot/mboot.c +++ b/src/vendorcode/eltan/security/mboot/mboot.c @@ -102,8 +102,8 @@ for (index = 0; index < Pcrs->count; index++) { Pcrs->pcrSelections[index].hash = swab16(TpmCap.data.assignedPCR.pcrSelections[index].hash); - printk(BIOS_DEBUG, "Pcrs->pcrSelections[index].hash =" - "0x%x\n", Pcrs->pcrSelections[index].hash); + printk(BIOS_DEBUG, "Pcrs->pcrSelections[%d].hash = 0x%x\n", index, + Pcrs->pcrSelections[index].hash); Pcrs->pcrSelections[index].sizeofSelect = TpmCap.data.assignedPCR.pcrSelections[index].sizeofSelect; memcpy(Pcrs->pcrSelections[index].pcrSelect, -- To view, visit https://review.coreboot.org/c/coreboot/+/36484 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd12c9dc22980f21ecba204729c5da0d11618e12 Gerrit-Change-Number: 36484 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn Gerrit-MessageType: newchange

4 7

Change in coreboot[master]: vendorcode/eltan/security: Address layout issues
by Patrick Georgi (Code Review) 04 Nov '19

04 Nov '19

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36485 ) Change subject: vendorcode/eltan/security: Address layout issues ...................................................................... vendorcode/eltan/security: Address layout issues Corrected several layout issues in the mboot.c file. BUG=N/A TEST=build Change-Id: I1599c7be075130345f018a08bede3eb849129a1c Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36485 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/vendorcode/eltan/security/mboot/mboot.c 1 file changed, 12 insertions(+), 17 deletions(-) Approvals: build bot (Jenkins): Verified Frans Hendriks: Looks good to me, approved diff --git a/src/vendorcode/eltan/security/mboot/mboot.c b/src/vendorcode/eltan/security/mboot/mboot.c index bae377a..1e1bc29 100644 --- a/src/vendorcode/eltan/security/mboot/mboot.c +++ b/src/vendorcode/eltan/security/mboot/mboot.c @@ -335,11 +335,11 @@ * *mb_entry * - * initializes measured boot mechanism, initializes the - * tpm library and starts the tpm called by mb_measure + * initializes measured boot mechanism, initializes the tpm library and starts the tpm called + * by mb_measure * - * The function can be overridden at the mainboard level my simply creating a - * function with the same name there. + * The function can be overridden at the mainboard level my simply creating a function with the + * same name there. * * @param[in] wake_from_s3 1 if we are waking from S3, 0 standard boot * @@ -354,8 +354,7 @@ /* Initialize TPM driver. */ printk(BIOS_DEBUG, "%s: tlcl_lib_init\n", __func__); if (tlcl_lib_init() != VB2_SUCCESS) { - printk(BIOS_ERR, "%s: TPM driver initialization failed.\n", - __func__); + printk(BIOS_ERR, "%s: TPM driver initialization failed.\n", __func__); return TPM_E_IOERROR; } @@ -368,8 +367,7 @@ } if (status) - printk(BIOS_ERR, "%s: StartUp failed 0x%x!\n", __func__, - status); + printk(BIOS_ERR, "%s: StartUp failed 0x%x!\n", __func__, status); return status; } @@ -402,18 +400,16 @@ printk(BIOS_DEBUG, "%s: StartUp, successful!\n", __func__); status = mb_measure_log_start(); if (status == TPM_SUCCESS) { - printk(BIOS_DEBUG, "%s: Measuring, successful!\n", - __func__); + printk(BIOS_DEBUG, "%s: Measuring, successful!\n", __func__); } else { invalidate_pcrs(); - printk(BIOS_ERR, "%s: Measuring returned 0x%x " - "unsuccessful! PCRs invalidated.\n", - __func__, status); + printk(BIOS_ERR, "%s: Measuring returned 0x%x unsuccessful! PCRs invalidated.\n", + __func__, status); } } else { invalidate_pcrs(); - printk(BIOS_ERR, "%s: StartUp returned 0x%x, unsuccessful!" - "PCRs invalidated.\n", __func__, status); + printk(BIOS_ERR, "%s: StartUp returned 0x%x, unsuccessful! PCRs invalidated.\n", __func__, + status); } return status; } @@ -519,8 +515,7 @@ tcgEventHdr.eventSize, &tcgEventHdr, (uint8_t *)crtm_version, 0); if (status) { - printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", - status); + printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status); return status; } -- To view, visit https://review.coreboot.org/c/coreboot/+/36485 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1599c7be075130345f018a08bede3eb849129a1c Gerrit-Change-Number: 36485 Gerrit-PatchSet: 4 Gerrit-Owner: Wim Vervoorn Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Wim Vervoorn Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: smbios: Create a type for smbios_enclosure_type
by Mathew King (Code Review) 04 Nov '19

04 Nov '19

Mathew King has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36516 ) Change subject: smbios: Create a type for smbios_enclosure_type ...................................................................... smbios: Create a type for smbios_enclosure_type Add a name to the SMBIOS enclosure type enum and use it as the return type for smbios_mainboard_enclosure_type. BUG=b:143701965 TEST=compiles Change-Id: I816e17f0de2b0c119ddab638e57b0652f53f5b61 Signed-off-by: Mathew King <mathewk(a)chromium.org> --- M src/arch/x86/smbios.c M src/include/smbios.h 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/36516/1 diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index 5edf3c6..261888f 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -492,7 +492,7 @@ return SMBIOS_BOARD_TYPE_UNKNOWN; } -u8 __weak smbios_mainboard_enclosure_type(void) +smbios_enclosure_type __weak smbios_mainboard_enclosure_type(void) { return CONFIG_SMBIOS_ENCLOSURE_TYPE; } diff --git a/src/include/smbios.h b/src/include/smbios.h index ef1c7de..d230fb2 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -65,7 +65,6 @@ const char *smbios_mainboard_asset_tag(void); u8 smbios_mainboard_feature_flags(void); const char *smbios_mainboard_location_in_chassis(void); -u8 smbios_mainboard_enclosure_type(void); #define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7) #define BIOS_CHARACTERISTICS_PC_CARD (1 << 8) @@ -319,7 +318,7 @@ u8 eos[2]; } __packed; -enum { +typedef enum { SMBIOS_ENCLOSURE_OTHER = 0x01, SMBIOS_ENCLOSURE_UNKNOWN = 0x02, SMBIOS_ENCLOSURE_DESKTOP = 0x03, @@ -356,7 +355,7 @@ SMBIOS_ENCLOSURE_EMBEDDED_PC = 0x22, SMBIOS_ENCLOSURE_MINI_PC = 0x23, SMBIOS_ENCLOSURE_STICK_PC = 0x24, -}; +} smbios_enclosure_type; struct smbios_type3 { u8 type; @@ -798,5 +797,6 @@ struct smbios_type17 *t); smbios_board_type smbios_mainboard_board_type(void); +smbios_enclosure_type smbios_mainboard_enclosure_type(void); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/36516 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I816e17f0de2b0c119ddab638e57b0652f53f5b61 Gerrit-Change-Number: 36516 Gerrit-PatchSet: 1 Gerrit-Owner: Mathew King <mathewk(a)chromium.org> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: arch/x86/Kconfig: drop unused BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP
by HAOUAS Elyes (Code Review) 04 Nov '19

04 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36509 ) Change subject: arch/x86/Kconfig: drop unused BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP ...................................................................... arch/x86/Kconfig: drop unused BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP Change-Id: I199a4b7771192abf7e7489e84db43b04776dd7b2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/Kconfig 1 file changed, 0 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/36509/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 502e774..eb28960 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -169,15 +169,6 @@ config BOOTBLOCK_RESETS string -config BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP - bool - default n - help - Select this value to provide a routine to save the BIST and timestamp - values. The default code places the BIST value in MM0 and the - timestamp value in MM2:MM1. Another file is necessary when the CPU - does not support the MMx register set. - config HAVE_CMOS_DEFAULT def_bool n depends on HAVE_OPTION_TABLE -- To view, visit https://review.coreboot.org/c/coreboot/+/36509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I199a4b7771192abf7e7489e84db43b04776dd7b2 Gerrit-Change-Number: 36509 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: vendorcode/eltan/security: use custom hash for little endian only
by Wim Vervoorn (Code Review) 04 Nov '19

04 Nov '19

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36482 ) Change subject: vendorcode/eltan/security: use custom hash for little endian only ...................................................................... vendorcode/eltan/security: use custom hash for little endian only Only use the custom hash routine when we need little endian. Rename the function as well as it is little endian only now. BUG=N/A TEST=tested on fbg1701 board. Change-Id: I037fa38c5961dab7a81e752c1685da2dc6b33d12 Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> --- M src/vendorcode/eltan/security/include/cb_sha.h M src/vendorcode/eltan/security/lib/cb_sha.c M src/vendorcode/eltan/security/mboot/mboot.c M src/vendorcode/eltan/security/verified_boot/vboot_check.c 4 files changed, 17 insertions(+), 47 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/36482/1 diff --git a/src/vendorcode/eltan/security/include/cb_sha.h b/src/vendorcode/eltan/security/include/cb_sha.h index 4d087f4..822be69 100644 --- a/src/vendorcode/eltan/security/include/cb_sha.h +++ b/src/vendorcode/eltan/security/include/cb_sha.h @@ -20,14 +20,7 @@ #include <vb21_common.h> #include <vb2_api.h> -/* Supported Algorithm types for hash */ -enum endian_algorithm { - NO_ENDIAN_ALGORITHM = 0, - BIG_ENDIAN_ALGORITHM = 1, - LITTLE_ENDIAN_ALGORITHM = 2, -}; +vb2_error_t cb_sha_little_endian(enum vb2_hash_algorithm hash_alg, const uint8_t *data, uint32_t len, + uint8_t *digest); -int cb_sha_endian(enum vb2_hash_algorithm hash_alg, const uint8_t *data, uint32_t len, - uint8_t *digest, enum endian_algorithm endian); - -#endif \ No newline at end of file +#endif diff --git a/src/vendorcode/eltan/security/lib/cb_sha.c b/src/vendorcode/eltan/security/lib/cb_sha.c index 47cd10a..def14bf 100644 --- a/src/vendorcode/eltan/security/lib/cb_sha.c +++ b/src/vendorcode/eltan/security/lib/cb_sha.c @@ -15,42 +15,24 @@ #include <cb_sha.h> -int cb_sha_endian(enum vb2_hash_algorithm hash_alg, const uint8_t *data, uint32_t len, - uint8_t *digest, enum endian_algorithm endian) +vb2_error_t cb_sha_little_endian(enum vb2_hash_algorithm hash_alg, const uint8_t *data, uint32_t len, + uint8_t *digest) { int i; int rv; - uint32_t digest_size; - uint8_t *result_ptr; + uint32_t digest_size = vb2_digest_size(hash_alg); uint8_t result[VB2_MAX_DIGEST_SIZE]; - switch (hash_alg) { - case VB2_HASH_SHA1: - digest_size = VB2_SHA1_DIGEST_SIZE; - break; - case VB2_HASH_SHA256: - digest_size = VB2_SHA256_DIGEST_SIZE; - break; - case VB2_HASH_SHA512: - digest_size = VB2_SHA512_DIGEST_SIZE; - break; - default: + if ( !digest_size ) return VB2_ERROR_SHA_INIT_ALGORITHM; - } - result_ptr = result; - rv = vb2_digest_buffer(data, len, hash_alg, result_ptr, digest_size); - if (rv || (endian == NO_ENDIAN_ALGORITHM)) + rv = vb2_digest_buffer(data, len, hash_alg, (uint8_t *)&result, digest_size); + if (rv) return rv; for (i = 0; i < digest_size; ++i) { - if (endian == BIG_ENDIAN_ALGORITHM) { - /* use big endian */ - digest[i] = *result_ptr++; - } else { - /* use little endian */ - digest[digest_size - i - 1] = *result_ptr++; - } + /* use little endian */ + digest[digest_size - i - 1] = result[i]; } return rv; } diff --git a/src/vendorcode/eltan/security/mboot/mboot.c b/src/vendorcode/eltan/security/mboot/mboot.c index 5774429..bae377a 100644 --- a/src/vendorcode/eltan/security/mboot/mboot.c +++ b/src/vendorcode/eltan/security/mboot/mboot.c @@ -159,11 +159,8 @@ memcpy(digest->digest.sha1, (void *)hashData, VB2_SHA1_DIGEST_SIZE); } else { - status = cb_sha_endian(VB2_HASH_SHA1, hashData, - hashDataLen, - digest->digest.sha1, - NO_ENDIAN_ALGORITHM); - if ( status ) + if (cb_sha_little_endian(VB2_HASH_SHA1, hashData, + hashDataLen, digest->digest.sha1)) return TPM_E_IOERROR; } @@ -186,11 +183,9 @@ memcpy(digest->digest.sha256, (void *)hashData, hashDataLen); } else { - status = cb_sha_endian(VB2_HASH_SHA256, hashData, - hashDataLen, - digest->digest.sha256, - LITTLE_ENDIAN_ALGORITHM); - if (status) + + if (cb_sha_little_endian(VB2_HASH_SHA256, hashData, + hashDataLen, digest->digest.sha256)) return TPM_E_IOERROR; } digest->hashAlg = TPM_ALG_SHA256; diff --git a/src/vendorcode/eltan/security/verified_boot/vboot_check.c b/src/vendorcode/eltan/security/verified_boot/vboot_check.c index 07c6902..0171761 100644 --- a/src/vendorcode/eltan/security/verified_boot/vboot_check.c +++ b/src/vendorcode/eltan/security/verified_boot/vboot_check.c @@ -185,7 +185,7 @@ else hash_algorithm = VB2_HASH_SHA256; - status = cb_sha_endian(hash_algorithm, (const uint8_t *)start, size, digest); + status = cb_sha_little_endian(hash_algorithm, (const uint8_t *)start, size, digest); if ((CONFIG(VENDORCODE_ELTAN_VBOOT) && memcmp((void *)( (uint8_t *)CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_LOC + sizeof(digest) * hash_index), digest, sizeof(digest))) || status) { -- To view, visit https://review.coreboot.org/c/coreboot/+/36482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I037fa38c5961dab7a81e752c1685da2dc6b33d12 Gerrit-Change-Number: 36482 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/facebook/fbg1701: Add logo to the menu
by Wim Vervoorn (Code Review) 04 Nov '19

04 Nov '19

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36506 ) Change subject: mb/facebook/fbg1701: Add logo to the menu ...................................................................... mb/facebook/fbg1701: Add logo to the menu Allow the user to enable and disable the logo from make menuconfig. The file can ve selected as well. BUG=N/A TEST=build Change-Id: I630a9d14308131c180adaaa9e1fa5e6e11c3c61c Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> --- M src/mainboard/facebook/fbg1701/Kconfig 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/36506/1 diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig index a6c2846..3ade727 100644 --- a/src/mainboard/facebook/fbg1701/Kconfig +++ b/src/mainboard/facebook/fbg1701/Kconfig @@ -69,9 +69,14 @@ default 0xfff9c000 config FSP1_1_DISPLAY_LOGO - bool + bool "Enable logo" default n +config FSP1_1_LOGO_FILE_NAME + string "Logo file" + depends on FSP1_1_DISPLAY_LOGO + default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/logo.bmp" + config VENDORCODE_ELTAN_OEM_MANIFEST_LOC hex default 0xFFFE9000 -- To view, visit https://review.coreboot.org/c/coreboot/+/36506 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I630a9d14308131c180adaaa9e1fa5e6e11c3c61c Gerrit-Change-Number: 36506 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn Gerrit-MessageType: newchange

4 5

Change in coreboot[master]: vendorcode/eltan: cleanup of Kconfig files
by Wim Vervoorn (Code Review) 04 Nov '19

04 Nov '19

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36479 ) Change subject: vendorcode/eltan: cleanup of Kconfig files ...................................................................... vendorcode/eltan: cleanup of Kconfig files The vendorcode/eltan and vendorcode/eltan/security directories were both adding the mboot and verified_boot Kconfigs. BUG=N/A TEST=build Change-Id: I6b5f19b4660d60345391b7320ce42466fd2cc769 Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> --- M src/vendorcode/eltan/Kconfig M src/vendorcode/eltan/security/Kconfig 2 files changed, 5 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/36479/1 diff --git a/src/vendorcode/eltan/Kconfig b/src/vendorcode/eltan/Kconfig index dc756ab..319e90a 100644 --- a/src/vendorcode/eltan/Kconfig +++ b/src/vendorcode/eltan/Kconfig @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright (C) 2014-2018 Eltan B.V. +## Copyright (C) 2014-2019 Eltan B.V. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -17,6 +17,5 @@ bool if USE_VENDORCODE_ELTAN -source src/vendorcode/eltan/security/mboot/Kconfig -source src/vendorcode/eltan/security/verified_boot/Kconfig +source src/vendorcode/eltan/security/Kconfig endif diff --git a/src/vendorcode/eltan/security/Kconfig b/src/vendorcode/eltan/security/Kconfig index 2af5808..6b93d2a 100644 --- a/src/vendorcode/eltan/security/Kconfig +++ b/src/vendorcode/eltan/security/Kconfig @@ -1,6 +1,6 @@ ## This file is part of the coreboot project. ## -## Copyright (C) 2018 Eltan B.V. +## Copyright (C) 2018-2019 Eltan B.V. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -12,5 +12,7 @@ ## GNU General Public License for more details. ## +menu "Eltan Security Settings" source src/vendorcode/eltan/security/mboot/Kconfig source src/vendorcode/eltan/security/verified_boot/Kconfig +endmenu -- To view, visit https://review.coreboot.org/c/coreboot/+/36479 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b5f19b4660d60345391b7320ce42466fd2cc769 Gerrit-Change-Number: 36479 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/icelake: Make use of "all-y" to avoid exclusive stage files...
by Subrata Banik (Code Review) 04 Nov '19

04 Nov '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36546 ) Change subject: soc/intel/icelake: Make use of "all-y" to avoid exclusive stage files in Makefile.inc ...................................................................... soc/intel/icelake: Make use of "all-y" to avoid exclusive stage files in Makefile.inc This patch makes use of "all-y" in order to replace all common stage (bootblock, verstage, romstage, postcar, ramstage) files inclusion in Makefile.inc Change-Id: I11001d0d381ec9c1df41bc331da845f51e666a44 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/icelake/Makefile.inc 1 file changed, 7 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/36546/1 diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 80dcdc1..a4ebd20 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -8,29 +8,26 @@ subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c + bootblock-y += bootblock/bootblock.c bootblock-y += bootblock/cpu.c bootblock-y += bootblock/pch.c -bootblock-y += pmutil.c bootblock-y += bootblock/report_platform.c bootblock-y += espi.c bootblock-y += gpio.c -bootblock-y += gspi.c -bootblock-y += i2c.c bootblock-y += memmap.c -bootblock-y += spi.c bootblock-y += p2sb.c -bootblock-y += uart.c romstage-y += espi.c romstage-y += gpio.c -romstage-y += gspi.c -romstage-y += i2c.c romstage-y += memmap.c -romstage-y += pmutil.c romstage-y += reset.c -romstage-y += spi.c -romstage-y += uart.c ramstage-y += acpi.c ramstage-y += chip.c @@ -41,18 +38,13 @@ ramstage-y += fsp_params.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += gspi.c -ramstage-y += i2c.c ramstage-y += lockdown.c ramstage-y += memmap.c ramstage-y += p2sb.c ramstage-y += pmc.c -ramstage-y += pmutil.c ramstage-y += reset.c ramstage-y += smmrelocate.c -ramstage-y += spi.c ramstage-y += systemagent.c -ramstage-y += uart.c ramstage-y += sd.c smm-y += gpio.c @@ -63,17 +55,6 @@ smm-y += uart.c postcar-y += memmap.c -postcar-y += pmutil.c -postcar-y += i2c.c -postcar-y += gspi.c -postcar-y += spi.c -postcar-y += uart.c - -verstage-y += gspi.c -verstage-y += i2c.c -verstage-y += pmutil.c -verstage-y += spi.c -verstage-y += uart.c CPPFLAGS_common += -I$(src)/soc/intel/icelake CPPFLAGS_common += -I$(src)/soc/intel/icelake/include -- To view, visit https://review.coreboot.org/c/coreboot/+/36546 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11001d0d381ec9c1df41bc331da845f51e666a44 Gerrit-Change-Number: 36546 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/icelake: Make TSEG_BASE align to TSEG_SIZE
by Subrata Banik (Code Review) 04 Nov '19

04 Nov '19

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36542 ) Change subject: soc/intel/icelake: Make TSEG_BASE align to TSEG_SIZE ...................................................................... soc/intel/icelake: Make TSEG_BASE align to TSEG_SIZE Change-Id: I77d1cb2fd287f45859cde37a564ea7c147d5633f Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/icelake/smmrelocate.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/36542/1 diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index edcc49d..6ac17a2 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -178,6 +178,7 @@ const u32 rmask = ~(4 * KiB - 1); smm_region(&tseg_base, &tseg_size); + tseg_base = ALIGN(tseg_base, tseg_size); smm_subregion(SMM_SUBREGION_CHIPSET, &params->ied_base, &params->ied_size); /* SMRR has 32-bits of valid address aligned to 4KiB. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/36542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77d1cb2fd287f45859cde37a564ea7c147d5633f Gerrit-Change-Number: 36542 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019