coreboot-gerrit November 2019

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Change in coreboot[master]: cbfs: store header offset as absolute value BE from fmap_top
by Marty E. Plummer (Code Review) 04 Nov '19

04 Nov '19

Marty E. Plummer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36346 ) Change subject: cbfs: store header offset as absolute value BE from fmap_top ...................................................................... cbfs: store header offset as absolute value BE from fmap_top Change-Id: Idc99b0c133faa2aa15d06f998e7371d332ffa490 Signed-off-by: Marty E. Plummer <hanetzer(a)startmail.com> --- M src/lib/cbfs.c M util/cbfstool/cbfstool.c 2 files changed, 9 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/36346/1 diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 91368fb..8fb747f 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -296,13 +296,14 @@ size_t fmap_top = ___FMAP__COREBOOT_BASE + ___FMAP__COREBOOT_SIZE; - /* Find location of header using signed 32-bit offset from + /* Find location of header using unsigned 32-bit offset from * end of CBFS region. */ offset = fmap_top - sizeof(int32_t); if (rdev_readat(bdev, &rel_offset, offset, sizeof(int32_t)) < 0) return -1; - offset = fmap_top + rel_offset; + /* Subtract after converting to the native byte ordering */ + offset = fmap_top - ntohl(rel_offset); if (rdev_readat(bdev, &header, offset, sizeof(header)) < 0) return -1; diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 65c5e08..c829005 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -285,8 +285,8 @@ static void fill_header_offset(void *location, uint32_t offset) { - // TODO: When we have a BE target, we'll need to store this as BE - write_le32(location, offset); + // Store as BE as all other cbfs data structures are + write_be32(location, offset); } static int update_master_header_loc_topswap(struct cbfs_image *image, @@ -380,7 +380,10 @@ uint32_t header_offset = CBFS_SUBHEADER(entry) - buffer_get(&image.buffer); - header_offset = -(buffer_size(&image.buffer) - header_offset); + /* Store as absolute value (positive) and subtract + * it in src/lib/cbfs.c:cbfs_master_header_props + */ + header_offset = buffer_size(&image.buffer) - header_offset; h_loc = (void *)(buffer_get(&image.buffer) + buffer_size(&image.buffer) - 4); -- To view, visit https://review.coreboot.org/c/coreboot/+/36346 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc99b0c133faa2aa15d06f998e7371d332ffa490 Gerrit-Change-Number: 36346 Gerrit-PatchSet: 1 Gerrit-Owner: Marty E. Plummer <hanetzer(a)startmail.com> Gerrit-MessageType: newchange

4 17

Change in coreboot[master]: mb/google/hatch: update DLL values for Kindred
by Jamie Chen (Code Review) 04 Nov '19

04 Nov '19

Jamie Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36076 ) Change subject: mb/google/hatch: update DLL values for Kindred ...................................................................... mb/google/hatch: update DLL values for Kindred Update emmc DLL values for Kindred BUG=b:131401116 BRANCH=none TEST=Boot to OS 100 times on Kindred EVT Change-Id: Ibd840b31bb0e5a742495758de55b532e6c3946aa Signed-off-by: Jamie Chen <jamie.chen(a)intel.com> --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/36076/1 diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index 272cbfb..9d33fa9 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -61,7 +61,7 @@ # Refer to EDS-Vol2-14.3.8. # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78. # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x0F10" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911" # EMMC TX DATA Delay 2 # Refer to EDS-Vol2-14.3.9. @@ -69,7 +69,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79. # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2F2D2D" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828" # EMMC RX CMD/DATA Delay 1 # Refer to EDS-Vol2-14.3.10. @@ -77,7 +77,7 @@ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C121936" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b" # EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-14.3.12. @@ -88,13 +88,13 @@ # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1182D" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D" # EMMC Rx Strobe Delay # Refer to EDS-Vol2-14.3.11. # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39. # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. - register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1414" + register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515" device domain 0 on device pci 15.0 on -- To view, visit https://review.coreboot.org/c/coreboot/+/36076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd840b31bb0e5a742495758de55b532e6c3946aa Gerrit-Change-Number: 36076 Gerrit-PatchSet: 1 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-MessageType: newchange

6 9

Change in coreboot[master]: soc/intel/broadwell: Use sb/intel/common/acpi/platform.asl
by Arthur Heymans (Code Review) 04 Nov '19

04 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36583 ) Change subject: soc/intel/broadwell: Use sb/intel/common/acpi/platform.asl ...................................................................... soc/intel/broadwell: Use sb/intel/common/acpi/platform.asl Change-Id: I6d8d04289254317af8d7cc55c89431d408414384 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/broadwell/acpi/platform.asl 1 file changed, 1 insertion(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/36583/1 diff --git a/src/soc/intel/broadwell/acpi/platform.asl b/src/soc/intel/broadwell/acpi/platform.asl index 7c6bdd7..15a820f 100644 --- a/src/soc/intel/broadwell/acpi/platform.asl +++ b/src/soc/intel/broadwell/acpi/platform.asl @@ -16,44 +16,7 @@ /* Enable ACPI _SWS methods */ #include <soc/intel/common/acpi/acpi_wake_source.asl> - -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method (TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method (_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store (Arg0, PICM) -} +#include <southbridge/intel/common/acpi/platform.asl> /* * The _PTS method (Prepare To Sleep) is called before the OS is -- To view, visit https://review.coreboot.org/c/coreboot/+/36583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d8d04289254317af8d7cc55c89431d408414384 Gerrit-Change-Number: 36583 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

3 3

Change in coreboot[master]: mb/*/*/others: Use sb/intel/common/acpi/platform.asl
by Arthur Heymans (Code Review) 04 Nov '19

04 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36582 ) Change subject: mb/*/*/others: Use sb/intel/common/acpi/platform.asl ...................................................................... mb/*/*/others: Use sb/intel/common/acpi/platform.asl Change-Id: Iabfd680fdb50534e6b9f6cfdecda9f8de0f8a610 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/adi/rcc-dff/acpi/platform.asl M src/mainboard/adi/rcc-dff/dsdt.asl M src/mainboard/google/jecht/acpi/platform.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/intel/harcuvar/acpi/platform.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/littleplains/acpi/platform.asl M src/mainboard/intel/littleplains/dsdt.asl M src/mainboard/intel/mohonpeak/acpi/platform.asl M src/mainboard/intel/mohonpeak/dsdt.asl M src/mainboard/intel/wtm2/acpi/platform.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/scaleway/tagada/acpi/platform.asl M src/mainboard/scaleway/tagada/dsdt.asl 14 files changed, 7 insertions(+), 266 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/36582/1 diff --git a/src/mainboard/adi/rcc-dff/acpi/platform.asl b/src/mainboard/adi/rcc-dff/acpi/platform.asl index 6ba95ce..059cd74 100644 --- a/src/mainboard/adi/rcc-dff/acpi/platform.asl +++ b/src/mainboard/adi/rcc-dff/acpi/platform.asl @@ -14,44 +14,6 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _WAK method is called on system wakeup */ Method(_WAK,1) diff --git a/src/mainboard/adi/rcc-dff/dsdt.asl b/src/mainboard/adi/rcc-dff/dsdt.asl index 310ad04..4b7023f 100644 --- a/src/mainboard/adi/rcc-dff/dsdt.asl +++ b/src/mainboard/adi/rcc-dff/dsdt.asl @@ -31,6 +31,7 @@ #include <arch/x86/acpi/debug.asl> // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" // global NVS and variables diff --git a/src/mainboard/google/jecht/acpi/platform.asl b/src/mainboard/google/jecht/acpi/platform.asl index 06de271..fee0670 100644 --- a/src/mainboard/google/jecht/acpi/platform.asl +++ b/src/mainboard/google/jecht/acpi/platform.asl @@ -14,44 +14,6 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 */ diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index e216b13..9af639e 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -25,6 +25,7 @@ ) { // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" // Thermal handler diff --git a/src/mainboard/intel/harcuvar/acpi/platform.asl b/src/mainboard/intel/harcuvar/acpi/platform.asl index ea66a9f..8d8229a 100644 --- a/src/mainboard/intel/harcuvar/acpi/platform.asl +++ b/src/mainboard/intel/harcuvar/acpi/platform.asl @@ -16,44 +16,6 @@ * */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 */ diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index 9bc42cf..d26987f 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -27,6 +27,7 @@ ) { // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/littleplains/acpi/platform.asl b/src/mainboard/intel/littleplains/acpi/platform.asl index 6ba95ce..059cd74 100644 --- a/src/mainboard/intel/littleplains/acpi/platform.asl +++ b/src/mainboard/intel/littleplains/acpi/platform.asl @@ -14,44 +14,6 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _WAK method is called on system wakeup */ Method(_WAK,1) diff --git a/src/mainboard/intel/littleplains/dsdt.asl b/src/mainboard/intel/littleplains/dsdt.asl index 310ad04..4b7023f 100644 --- a/src/mainboard/intel/littleplains/dsdt.asl +++ b/src/mainboard/intel/littleplains/dsdt.asl @@ -31,6 +31,7 @@ #include <arch/x86/acpi/debug.asl> // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" // global NVS and variables diff --git a/src/mainboard/intel/mohonpeak/acpi/platform.asl b/src/mainboard/intel/mohonpeak/acpi/platform.asl index 6ba95ce..059cd74 100644 --- a/src/mainboard/intel/mohonpeak/acpi/platform.asl +++ b/src/mainboard/intel/mohonpeak/acpi/platform.asl @@ -14,44 +14,6 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _WAK method is called on system wakeup */ Method(_WAK,1) diff --git a/src/mainboard/intel/mohonpeak/dsdt.asl b/src/mainboard/intel/mohonpeak/dsdt.asl index 310ad04..4b7023f 100644 --- a/src/mainboard/intel/mohonpeak/dsdt.asl +++ b/src/mainboard/intel/mohonpeak/dsdt.asl @@ -31,6 +31,7 @@ #include <arch/x86/acpi/debug.asl> // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" // global NVS and variables diff --git a/src/mainboard/intel/wtm2/acpi/platform.asl b/src/mainboard/intel/wtm2/acpi/platform.asl index 270464e..b510fc1 100644 --- a/src/mainboard/intel/wtm2/acpi/platform.asl +++ b/src/mainboard/intel/wtm2/acpi/platform.asl @@ -14,44 +14,6 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 */ diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 42fd7ea..0c4ddd2 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -26,6 +26,7 @@ 0x20110725 // OEM revision ) { + #include <southbridge/intel/common/acpi/platform.asl> // Some generic macros #include "acpi/platform.asl" diff --git a/src/mainboard/scaleway/tagada/acpi/platform.asl b/src/mainboard/scaleway/tagada/acpi/platform.asl index ea66a9f..8d8229a 100644 --- a/src/mainboard/scaleway/tagada/acpi/platform.asl +++ b/src/mainboard/scaleway/tagada/acpi/platform.asl @@ -16,44 +16,6 @@ * */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} - /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 */ diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index 9bc42cf..d26987f 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -27,6 +27,7 @@ ) { // Some generic macros + #include <southbridge/intel/common/acpi/platform.asl> #include "acpi/platform.asl" #include "acpi/mainboard.asl" -- To view, visit https://review.coreboot.org/c/coreboot/+/36582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabfd680fdb50534e6b9f6cfdecda9f8de0f8a610 Gerrit-Change-Number: 36582 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.asl
by Patrick Georgi (Code Review) 04 Nov '19

04 Nov '19

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36581 ) Change subject: soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.asl ...................................................................... soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.asl Change-Id: I64a27cb080838c986a12a40c80d0c91824b9d04c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36581 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/baytrail/acpi/platform.asl M src/soc/intel/braswell/acpi/platform.asl M src/soc/intel/fsp_baytrail/acpi/platform.asl 3 files changed, 3 insertions(+), 112 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/src/soc/intel/baytrail/acpi/platform.asl b/src/soc/intel/baytrail/acpi/platform.asl index 2bd43a7..885a7d5 100644 --- a/src/soc/intel/baytrail/acpi/platform.asl +++ b/src/soc/intel/baytrail/acpi/platform.asl @@ -14,43 +14,7 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} +#include <southbridge/intel/common/acpi/platform.asl> /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 diff --git a/src/soc/intel/braswell/acpi/platform.asl b/src/soc/intel/braswell/acpi/platform.asl index 85aae11..fdf2788 100644 --- a/src/soc/intel/braswell/acpi/platform.asl +++ b/src/soc/intel/braswell/acpi/platform.asl @@ -16,45 +16,8 @@ /* Enable ACPI _SWS methods */ #include <soc/intel/common/acpi/acpi_wake_source.asl> +#include <southbridge/intel/common/acpi/platform.asl> -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, /* APM command */ - APMS, 8 /* APM status */ -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} - -/* - * The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} /* * The _PTS method (Prepare To Sleep) is called before the OS is diff --git a/src/soc/intel/fsp_baytrail/acpi/platform.asl b/src/soc/intel/fsp_baytrail/acpi/platform.asl index 270464e..01be351 100644 --- a/src/soc/intel/fsp_baytrail/acpi/platform.asl +++ b/src/soc/intel/fsp_baytrail/acpi/platform.asl @@ -14,43 +14,7 @@ * GNU General Public License for more details. */ -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} +#include <southbridge/intel/common/acpi/platform.asl> /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 -- To view, visit https://review.coreboot.org/c/coreboot/+/36581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64a27cb080838c986a12a40c80d0c91824b9d04c Gerrit-Change-Number: 36581 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.asl
by Patrick Georgi (Code Review) 04 Nov '19

04 Nov '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36581 ) Change subject: soc/intel/{braswell,baytrail}: Use sb/common/intel/platform.asl ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64a27cb080838c986a12a40c80d0c91824b9d04c Gerrit-Change-Number: 36581 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Nov 2019 11:47:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/lynxpoint: Use sb/intel/common/platform.asl
by Patrick Georgi (Code Review) 04 Nov '19

04 Nov '19

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36580 ) Change subject: sb/intel/lynxpoint: Use sb/intel/common/platform.asl ...................................................................... sb/intel/lynxpoint: Use sb/intel/common/platform.asl Change-Id: I86260a374a3f60f16dc73573e7989f0a4ffec818 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36580 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/asrock/h81m-hds/dsdt.asl M src/mainboard/google/beltino/acpi/platform.asl M src/mainboard/google/slippy/acpi/platform.asl M src/mainboard/intel/baskingridge/acpi/platform.asl M src/mainboard/lenovo/t440p/dsdt.asl M src/mainboard/supermicro/x10slm-f/dsdt.asl D src/southbridge/intel/lynxpoint/acpi/platform.asl 7 files changed, 6 insertions(+), 59 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/src/mainboard/asrock/h81m-hds/dsdt.asl b/src/mainboard/asrock/h81m-hds/dsdt.asl index 67088fd..8c4d5b8 100644 --- a/src/mainboard/asrock/h81m-hds/dsdt.asl +++ b/src/mainboard/asrock/h81m-hds/dsdt.asl @@ -25,7 +25,7 @@ ) { #include "acpi/platform.asl" - #include <southbridge/intel/lynxpoint/acpi/platform.asl> + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/mainboard/google/beltino/acpi/platform.asl b/src/mainboard/google/beltino/acpi/platform.asl index cbe0c6f..54a9cd4 100644 --- a/src/mainboard/google/beltino/acpi/platform.asl +++ b/src/mainboard/google/beltino/acpi/platform.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <southbridge/intel/lynxpoint/acpi/platform.asl> +#include <southbridge/intel/common/acpi/platform.asl> /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 diff --git a/src/mainboard/google/slippy/acpi/platform.asl b/src/mainboard/google/slippy/acpi/platform.asl index 10b0efb..5b0d276 100644 --- a/src/mainboard/google/slippy/acpi/platform.asl +++ b/src/mainboard/google/slippy/acpi/platform.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <southbridge/intel/lynxpoint/acpi/platform.asl> +#include <southbridge/intel/common/acpi/platform.asl> /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 diff --git a/src/mainboard/intel/baskingridge/acpi/platform.asl b/src/mainboard/intel/baskingridge/acpi/platform.asl index 4d610d5..bb2d6f9 100644 --- a/src/mainboard/intel/baskingridge/acpi/platform.asl +++ b/src/mainboard/intel/baskingridge/acpi/platform.asl @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <southbridge/intel/lynxpoint/acpi/platform.asl> +#include <southbridge/intel/common/acpi/platform.asl> /* The _PTS method (Prepare To Sleep) is called before the OS is * entering a sleep state. The sleep state number is passed in Arg0 diff --git a/src/mainboard/lenovo/t440p/dsdt.asl b/src/mainboard/lenovo/t440p/dsdt.asl index 82358aa..69cd416 100644 --- a/src/mainboard/lenovo/t440p/dsdt.asl +++ b/src/mainboard/lenovo/t440p/dsdt.asl @@ -32,7 +32,7 @@ { #include "acpi/platform.asl" #include <cpu/intel/common/acpi/cpu.asl> - #include <southbridge/intel/lynxpoint/acpi/platform.asl> + #include <southbridge/intel/common/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> diff --git a/src/mainboard/supermicro/x10slm-f/dsdt.asl b/src/mainboard/supermicro/x10slm-f/dsdt.asl index 6ed19ee..57e9a86 100644 --- a/src/mainboard/supermicro/x10slm-f/dsdt.asl +++ b/src/mainboard/supermicro/x10slm-f/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock("dsdt.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 0x20181220) { #include "acpi/platform.asl" - #include <southbridge/intel/lynxpoint/acpi/platform.asl> + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> #include <cpu/intel/common/acpi/cpu.asl> diff --git a/src/southbridge/intel/lynxpoint/acpi/platform.asl b/src/southbridge/intel/lynxpoint/acpi/platform.asl deleted file mode 100644 index e370668..0000000 --- a/src/southbridge/intel/lynxpoint/acpi/platform.asl +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* The APM port can be used for generating software SMIs */ - -OperationRegion (APMP, SystemIO, 0xb2, 2) -Field (APMP, ByteAcc, NoLock, Preserve) -{ - APMC, 8, // APM command - APMS, 8 // APM status -} - - -/* Port 80 POST */ - -OperationRegion (POST, SystemIO, 0x80, 1) -Field (POST, ByteAcc, Lock, Preserve) -{ - DBG0, 8 -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap - Return (SMIF) // Return value of SMI handler -} - -/* The _PIC method is called by the OS to choose between interrupt - * routing via the i8259 interrupt controller or the APIC. - * - * _PIC is called with a parameter of 0 for i8259 configuration and - * with a parameter of 1 for Local Apic/IOAPIC configuration. - */ - -Method(_PIC, 1) -{ - // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) -} -- To view, visit https://review.coreboot.org/c/coreboot/+/36580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86260a374a3f60f16dc73573e7989f0a4ffec818 Gerrit-Change-Number: 36580 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: sb/intel/lynxpoint: Use sb/intel/common/platform.asl
by Patrick Georgi (Code Review) 04 Nov '19

04 Nov '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36580 ) Change subject: sb/intel/lynxpoint: Use sb/intel/common/platform.asl ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86260a374a3f60f16dc73573e7989f0a4ffec818 Gerrit-Change-Number: 36580 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Nov 2019 11:46:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/*/*: Use sb/intel/common/acpi/platform.asl
by Arthur Heymans (Code Review) 04 Nov '19

04 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36579 ) Change subject: mb/*/*: Use sb/intel/common/acpi/platform.asl ...................................................................... mb/*/*: Use sb/intel/common/acpi/platform.asl Change-Id: Ifc0799d26394a525d764fb4ffc096b48060ee22f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- D src/mainboard/asrock/g41c-gs/acpi/platform.asl M src/mainboard/asrock/g41c-gs/dsdt.asl D src/mainboard/asus/p5qpl-am/acpi/platform.asl M src/mainboard/asus/p5qpl-am/dsdt.asl D src/mainboard/foxconn/d41s/acpi/platform.asl M src/mainboard/foxconn/d41s/dsdt.asl D src/mainboard/foxconn/g41s-k/acpi/platform.asl M src/mainboard/foxconn/g41s-k/dsdt.asl D src/mainboard/gigabyte/ga-g41m-es2l/acpi/platform.asl D src/mainboard/intel/d510mo/acpi/platform.asl M src/mainboard/intel/d510mo/dsdt.asl D src/mainboard/intel/dg41wv/acpi/platform.asl M src/mainboard/intel/dg41wv/dsdt.asl D src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl M src/mainboard/lenovo/thinkcentre_a58/dsdt.asl 15 files changed, 7 insertions(+), 231 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/36579/1 diff --git a/src/mainboard/asrock/g41c-gs/acpi/platform.asl b/src/mainboard/asrock/g41c-gs/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/asrock/g41c-gs/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index 002dfca..18d6def 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -25,7 +25,7 @@ ) { // global NVS and variables - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> Scope (\_SB) { diff --git a/src/mainboard/asus/p5qpl-am/acpi/platform.asl b/src/mainboard/asus/p5qpl-am/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/asus/p5qpl-am/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl index 002dfca..18d6def 100644 --- a/src/mainboard/asus/p5qpl-am/dsdt.asl +++ b/src/mainboard/asus/p5qpl-am/dsdt.asl @@ -25,7 +25,7 @@ ) { // global NVS and variables - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> Scope (\_SB) { diff --git a/src/mainboard/foxconn/d41s/acpi/platform.asl b/src/mainboard/foxconn/d41s/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/foxconn/d41s/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index 8dc1194..d33b523 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -24,7 +24,7 @@ 0x20090419 // OEM revision ) { - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <cpu/intel/speedstep/acpi/cpu.asl> diff --git a/src/mainboard/foxconn/g41s-k/acpi/platform.asl b/src/mainboard/foxconn/g41s-k/acpi/platform.asl deleted file mode 100644 index bda0df7..0000000 --- a/src/mainboard/foxconn/g41s-k/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index 002dfca..18d6def 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -25,7 +25,7 @@ ) { // global NVS and variables - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> Scope (\_SB) { diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/platform.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/intel/d510mo/acpi/platform.asl b/src/mainboard/intel/d510mo/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/intel/d510mo/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index 8dc1194..d33b523 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -24,7 +24,7 @@ 0x20090419 // OEM revision ) { - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> #include <cpu/intel/speedstep/acpi/cpu.asl> diff --git a/src/mainboard/intel/dg41wv/acpi/platform.asl b/src/mainboard/intel/dg41wv/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/intel/dg41wv/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index 002dfca..18d6def 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -25,7 +25,7 @@ ) { // global NVS and variables - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> Scope (\_SB) { diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl b/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl deleted file mode 100644 index 6c92a4e..0000000 --- a/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit <damien(a)zamaudio.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Method(_PIC, 1) -{ - /* Remember the OS' IRQ routing choice. */ - Store(Arg0, PICM) -} - -/* SMI I/O Trap */ -Method(TRAP, 1, Serialized) -{ - Store (Arg0, SMIF) /* SMI Function */ - Store (0, TRP0) /* Generate trap */ - Return (SMIF) /* Return value of SMI handler */ -} diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl index 002dfca..18d6def 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl +++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl @@ -25,7 +25,7 @@ ) { // global NVS and variables - #include "acpi/platform.asl" + #include <southbridge/intel/common/acpi/platform.asl> #include <southbridge/intel/i82801gx/acpi/globalnvs.asl> Scope (\_SB) { -- To view, visit https://review.coreboot.org/c/coreboot/+/36579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc0799d26394a525d764fb4ffc096b48060ee22f Gerrit-Change-Number: 36579 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: include: Remove EC_EVENT_* from elog.h
by Yu-Ping Wu (Code Review) 04 Nov '19

04 Nov '19

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36499 ) Change subject: include: Remove EC_EVENT_* from elog.h ...................................................................... include: Remove EC_EVENT_* from elog.h All of the EC_EVENT_* macros can be replaced with the EC_HOST_EVENT_* macros defined in ec_commands.h, which is synchronized from Chromium OS ec repository. BRANCH=none BUG=none TEST=emerge-kukui coreboot Change-Id: I12c7101866d8365b87a6483a160187cc9526010a Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/ec/google/chromeec/ec.c M src/include/elog.h M src/mainboard/google/parrot/smihandler.c M src/mainboard/google/stout/ec.c 4 files changed, 14 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/36499/1 diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 32f06bb..48102d3 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -97,7 +97,7 @@ static void google_chromeec_elog_add_recovery_event(void *unused) { uint64_t *events = cbmem_find(CBMEM_ID_EC_HOSTEVENT); - uint8_t event_byte = EC_EVENT_KEYBOARD_RECOVERY; + uint8_t event_byte = EC_HOST_EVENT_KEYBOARD_RECOVERY; if (!events) return; @@ -107,7 +107,7 @@ if (*events & EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT)) - event_byte = EC_EVENT_KEYBOARD_RECOVERY_HWREINIT; + event_byte = EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT; elog_add_event_byte(ELOG_TYPE_EC_EVENT, event_byte); } diff --git a/src/include/elog.h b/src/include/elog.h index 0328a86..1692a80 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -61,37 +61,6 @@ /* Embedded controller event */ #define ELOG_TYPE_EC_EVENT 0x91 -#define EC_EVENT_LID_CLOSED 0x01 -#define EC_EVENT_LID_OPEN 0x02 -#define EC_EVENT_POWER_BUTTON 0x03 -#define EC_EVENT_AC_CONNECTED 0x04 -#define EC_EVENT_AC_DISCONNECTED 0x05 -#define EC_EVENT_BATTERY_LOW 0x06 -#define EC_EVENT_BATTERY_CRITICAL 0x07 -#define EC_EVENT_BATTERY 0x08 -#define EC_EVENT_THERMAL_THRESHOLD 0x09 -#define EC_EVENT_DEVICE_EVENT 0x0a -#define EC_EVENT_THERMAL 0x0b -#define EC_EVENT_USB_CHARGER 0x0c -#define EC_EVENT_KEY_PRESSED 0x0d -#define EC_EVENT_INTERFACE_READY 0x0e -#define EC_EVENT_KEYBOARD_RECOVERY 0x0f -#define EC_EVENT_THERMAL_SHUTDOWN 0x10 -#define EC_EVENT_BATTERY_SHUTDOWN 0x11 -#define EC_EVENT_FAN_ERROR 0x12 -#define EC_EVENT_THROTTLE_STOP 0x13 -#define EC_EVENT_HANG_DETECT 0x14 -#define EC_EVENT_HANG_REBOOT 0x15 -#define EC_EVENT_PD_MCU 0x16 -#define EC_EVENT_BATTERY_STATUS 0x17 -#define EC_EVENT_PANIC 0x18 -#define EC_EVENT_KEYBOARD_FASTBOOT 0x19 -#define EC_EVENT_RTC 0x1a -#define EC_EVENT_MKBP 0x1b -#define EC_EVENT_USB_MUX 0x1c -#define EC_EVENT_MODE_CHANGE 0x1d -#define EC_EVENT_KEYBOARD_RECOVERY_HWREINIT 0x1e -#define EC_EVENT_EXTENDED 0x1f /* Power */ #define ELOG_TYPE_POWER_FAIL 0x92 diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c index 5883cdc..92d361d 100644 --- a/src/mainboard/google/parrot/smihandler.c +++ b/src/mainboard/google/parrot/smihandler.c @@ -42,7 +42,7 @@ #if CONFIG(ELOG_GSMI) if (!battery_critical_logged) elog_add_event_byte(ELOG_TYPE_EC_EVENT, - EC_EVENT_BATTERY_CRITICAL); + EC_HOST_EVENT_BATTERY_CRITICAL); battery_critical_logged = 1; #endif break; @@ -50,7 +50,8 @@ printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n"); #if CONFIG(ELOG_GSMI) - elog_add_event_byte(ELOG_TYPE_EC_EVENT, EC_EVENT_LID_CLOSED); + elog_add_event_byte(ELOG_TYPE_EC_EVENT, + EC_HOST_EVENT_LID_CLOSED); #endif /* Go to S5 */ write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10)); @@ -71,7 +72,8 @@ printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n"); #if CONFIG(ELOG_GSMI) - elog_add_event_byte(ELOG_TYPE_EC_EVENT, EC_EVENT_LID_CLOSED); + elog_add_event_byte(ELOG_TYPE_EC_EVENT, + EC_HOST_EVENT_LID_CLOSED); #endif /* Go to S5 */ write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10)); diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c index a54b80b..660bb76 100644 --- a/src/mainboard/google/stout/ec.c +++ b/src/mainboard/google/stout/ec.c @@ -76,7 +76,8 @@ printk(BIOS_ERR, " EC Fan Error\n"); critical_shutdown = 1; #if CONFIG(ELOG_GSMI) - elog_add_event_word(EC_EVENT_BATTERY_CRITICAL, EC_EVENT_FAN_ERROR); + elog_add_event_word(EC_HOST_EVENT_BATTERY_CRITICAL, + EC_HOST_EVENT_THROTTLE_START); #endif } @@ -86,7 +87,8 @@ printk(BIOS_ERR, " EC Thermal Device Error\n"); critical_shutdown = 1; #if CONFIG(ELOG_GSMI) - elog_add_event_word(EC_EVENT_BATTERY_CRITICAL, EC_EVENT_THERMAL); + elog_add_event_word(EC_HOST_EVENT_BATTERY_CRITICAL, + EC_HOST_EVENT_THERMAL); #endif } @@ -98,14 +100,15 @@ printk(BIOS_ERR, " EC Critical Battery Error\n"); critical_shutdown = 1; #if CONFIG(ELOG_GSMI) - elog_add_event_word(ELOG_TYPE_EC_EVENT, EC_EVENT_BATTERY_CRITICAL); + elog_add_event_word(ELOG_TYPE_EC_EVENT, + EC_HOST_EVENT_BATTERY_CRITICAL); #endif } if ((ec_reg & 0x8F) == 0x8F) { printk(BIOS_ERR, " EC Read Battery Error\n"); #if CONFIG(ELOG_GSMI) - elog_add_event_word(ELOG_TYPE_EC_EVENT, EC_EVENT_BATTERY); + elog_add_event_word(ELOG_TYPE_EC_EVENT, EC_HOST_EVENT_BATTERY); #endif } -- To view, visit https://review.coreboot.org/c/coreboot/+/36499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12c7101866d8365b87a6483a160187cc9526010a Gerrit-Change-Number: 36499 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019